US09590121B2
An optoelectronic device includes a first electrode and a second electrode facing each other, a photoelectric conversion layer between the first electrode and the second electrode, and a buffer layer between at least one of the photoelectric conversion layer and the first electrode, and the photoelectric conversion layer and the second electrode, the buffer layer including one of MoOx1 (2.58≦x1<3.0), ZnOx2 (1.0≦x2<2.0), TiOx3 (1.5≦x3<2.0), VOx4 (1.5≦x4<2.0), TaOx5 (1.0≦x5<2.5), WOx6 (2.0
US09590120B2
A capacitor structure is described. A capacitor structure including a substrate; a source/drain region formed in the substrate to form an active area having an active area width; and a plurality of gates formed above the substrate. The source/drain region having a reflection symmetry. Each of the plurality of gates having a gate width. The gate width is configured to be less than said active area width. And, the plurality of gates are formed to have reflection symmetry.
US09590115B2
A semiconductor device includes a first conductor, a second conductor, a first insulator, a second insulator, a third insulator, a semiconductor, and an electron trap layer. The semiconductor includes a channel formation region. The electron trap layer overlaps with the channel formation region with the second insulator interposed therebetween. The first conductor overlaps with the channel formation region with the first insulator interposed therebetween. The second conductor overlaps with the electron trap layer with the third insulator interposed therebetween. The second conductor does not overlap with the channel formation region.
US09590113B2
The present invention generally relates to TFTs and methods for fabricating TFTs. For either back channel etch TFTs or for etch stop TFTs, multiple layers for the passivation layer or the etch stop layers permits a very dense capping layer to be formed over a less dense back channel protection layer. The capping layer can be sufficiently dense so that few pin holes are present and thus, hydrogen may not pass through to the semiconductor layer. As such, hydrogen containing precursors may be used for the capping layer deposition.
US09590112B2
An object is to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. In a transistor including an oxide semiconductor film, the oxide semiconductor film is subjected to dehydration or dehydrogenation performed by heat treatment. In addition, as a gate insulating film in contact with the oxide semiconductor film, an insulating film containing oxygen, preferably, a gate insulating film including a region containing oxygen with a higher proportion than the stoichiometric composition is used. Thus, oxygen is supplied from the gate insulating film to the oxide semiconductor film. Further, a metal oxide film is used as part of the gate insulating film, whereby reincorporation of an impurity such as hydrogen or water into the oxide semiconductor is suppressed.
US09590110B2
A sensor circuit with high sensitivity to ultraviolet light. Ultraviolet light is detected using a transistor containing an oxide semiconductor. When the transistor is irradiated with ultraviolet light or light including ultraviolet light, the drain current of the transistor depends on the intensity of the ultraviolet light. Data on the intensity of ultraviolet light is obtained by measuring the drain current of the transistor. Since the band gap of an oxide semiconductor is wider than that of silicon, the sensitivity to light with a wavelength in the ultraviolet region can be increased. Furthermore, an increase in dark current caused by temperature rise in the sensor circuit can be suppressed, resulting in a wider allowable ambient temperature range of the sensor circuit.
US09590108B2
A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.
US09590098B2
A method for producing a semiconductor device includes a first step of forming a first insulating film around the fin-shaped semiconductor layer; a second step of forming a pillar-shaped semiconductor layer and a first dummy gate formed of a first polysilicon; a third step of forming a second dummy gate on sidewalls of the first dummy gate and the pillar-shaped semiconductor layer; a fourth step of forming a fifth insulating film left as a sidewall around the second dummy gate, forming a second diffusion layer in an upper portion of the fin-shaped semiconductor layer and a lower portion of the pillar-shaped semiconductor layer, and forming a metal-semiconductor compound on the second diffusion layer; a fifth step of forming a gate electrode and a gate line; and a sixth step of depositing a second gate insulating film around the pillar-shaped semiconductor layer and on the gate electrode and the gate line, removing a portion of the second gate insulating film on the gate line, depositing a second metal, etching back the second metal, removing the second gate insulating film on the pillar-shaped semiconductor layer, depositing a third metal, and etching a portion of the third metal and a portion of the second metal to form a first contact in which the second metal surrounds a sidewall of an upper portion of the pillar-shaped semiconductor layer, a second contact that connects an upper portion of the first contact and an upper portion of the pillar-shaped semiconductor layer, and a third contact made of the second metal and the third metal and formed on the gate line.
US09590095B2
A semiconductor device includes field electrode structures regularly arranged in lines in a cell area and forming a first portion of a regular pattern. Termination structures are formed in an inner edge area surrounding the cell area, wherein at least portions of the termination structures form a second portion of the regular pattern. Cell mesas separate neighboring ones of the field electrode structures from each other in the cell area and include first portions of a drift zone, wherein a voltage applied to a gate electrode controls a current flow through the cell mesas. At least one doped region forms a homojunction with the drift zone in the inner edge area.
US09590094B2
By thermal oxidation a field oxide layer is formed that lines first and second trenches that extend from a main surface into a semiconductor layer. After the thermal oxidation, field electrodes and trench gate electrodes of power transistor cells are formed in the first and second trenches. A protection cover including a silicon nitride layer is formed that covers a cell area with the first and second trenches. With the protection cover covering the cell area, planar gate electrodes of lateral transistors are formed in a support area of the semiconductor layer.
US09590088B2
A current aperture vertical electron transistor (CAVET) with ammonia (NH3) based molecular beam epitaxy (MBE) grown p-type Gallium Nitride (p-GaN) as a current blocking layer (CBL). Specifically, the CAVET features an active buried Magnesium (Mg) doped GaN layer for current blocking purposes. This structure is very advantageous for high power switching applications and for any device that requires a buried active p-GaN layer for its functionality.
US09590085B2
A method for fabricating a semiconductor device comprises forming a fin in a layer of III-V compound semiconductor material on a silicon-on-insulator substrate; forming a semiconductor extension on the fin, the semiconductor extension comprising a III-V compound semiconductor material that is different from a material forming the fin in the III-V compound semiconductor layer; forming a dummy gate structure and a spacer across and perpendicular to the fin; forming a source/drain layer on a top surface of the substrate adjacent to the dummy gate structure; planarizing the source/drain layer; removing the dummy gate structure to expose a portion of the semiconductor extension on the fin; removing the exposed portion of the semiconductor extension; etching the semiconductor extension to undercut the spacer; and forming a replacement gate structure in place of the removed dummy gate structure and removed exposed portion of the semiconductor extension.
US09590084B2
A device includes a source region, a drain region, and a semiconductor channel connecting the source region to the drain region. The semiconductor channel includes a source-side channel portion adjoining the source region, wherein the source-side channel portion has a first bandgap, and a drain-side channel portion adjoining the drain region. The drain-side channel portion has a second bandgap different from the first bandgap.
US09590081B2
A method of making a graphene base transistor with reduced collector area comprising forming a graphene material layer, forming a collector material, depositing a dielectric, planarizing the dielectric, cleaning and removing the native oxide, transferring a base graphene material layer to the top surface of the graphene material layer, bonding the base graphene material layer, and photostepping and defining a second graphene material layer. A method of making a graphene base transistor with reduced collector area comprising forming an electron injection region, forming an electron collection region, and forming a base region. A graphene base transistor with reduced collector area comprising an electron emitter region, an electron collection region, and a base region.
US09590079B2
A semiconductor device and method of making such device is presented herein. The method includes disposing a gate layer over a dielectric layer on a substrate and further disposing a cap layer over the gate layer. A first transistor gate is defined having an initial thickness substantially equal to a combined thickness of the cap layer and the gate layer. A first doped region is formed in the substrate adjacent to the first transistor gate. The cap layer is subsequently removed and a second transistor gate is defined having a thickness substantially equal to the thickness of the gate layer. Afterwards, a second doped region is formed in the substrate adjacent to the second transistor gate. The first doped region extends deeper in the substrate than the second doped region, and a final thickness of the first transistor gate is substantially equal to the thickness of the second transistor gate.
US09590075B2
A semiconductor device includes a semiconductor layer of a first conductivity type and a semiconductor layer of a second conductivity type formed thereon. The semiconductor device also includes a body layer extending a first predetermined distance into the semiconductor layer of the second conductivity type and a pair of trenches extending a second predetermined distance into the semiconductor layer of the second conductivity type. Each of the pair of trenches consists essentially of a dielectric material disposed therein and a concentration of doping impurities present in the semiconductor layer of the second conductivity type and a distance between the pair of trenches define an electrical characteristic of the semiconductor device. The semiconductor device further includes a control gate coupled to the semiconductor layer of the second conductivity type and a source region coupled to the semiconductor layer of the second conductivity type.
US09590066B2
Some embodiments include a semiconductor construction having a gate extending into a semiconductor base. Conductively-doped source and drain regions are within the base adjacent the gate. A gate dielectric has a first segment between the source region and the gate, a second segment between the drain region and the gate, and a third segment between the first and second segments. At least a portion of the gate dielectric comprises ferroelectric material. In some embodiments the ferroelectric material is within each of the first, second and third segments. In some embodiments, the ferroelectric material is within the first segment or the third segment. In some embodiments, a transistor has a gate, a source region and a drain region; and has a channel region between the source and drain regions. The transistor has a gate dielectric which contains ferroelectric material between the source region and the gate.
US09590062B2
A semiconductor device is produced by: creating an opening in a mask formed on a semiconductor body; creating, underneath the opening, a trench in the semiconductor body which has a side wall and a trench bottom; creating, while the mask is on the semiconductor body, an insulating layer covering the trench bottom and the side wall; depositing a spacer layer including a first electrode material on the insulating layer; removing the spacer layer from at least a portion of the insulating layer that covers the trench bottom; filling at least a portion of the trench with an insulating material; removing the part of the insulating material laterally confined by the spacer layer so as to leave an insulating block in the trench; and filling at least a portion of the trench with a second electrode material so as to form an electrode within the trench.
US09590061B2
A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, formed with a gate trench at a surface side of the cell portion, and a gate electrode buried in the gate trench via a gate insulating film, forming a channel at a portion lateral to the gate trench at ON-time, the outer peripheral portion has a semiconductor surface disposed at a depth position equal to or deeper than a depth of the gate trench, and the semiconductor device further includes a voltage resistant structure having a semiconductor region of a second conductivity type formed in the semiconductor surface of the outer peripheral portion.
US09590048B2
In an embodiment, an electronic device includes a semiconductor layer having a surface, a gate and a first current electrode on the surface and a dielectric layer extending between the gate and the first current electrode and including charged ions having a predetermined charge profile.
US09590045B2
A graphene base transistor comprises on a semiconductor substrate surface an emitter pillar and an emitter-contact pillar, which extend from a pillar foundation in a vertical direction. A dielectric filling layer laterally embeds the emitter pillar and the emitter-contact pillar above the pillar foundation. The dielectric filling layer has an upper surface that is flush with a top surface of the emitter pillar and with the at least one base-contact arm of a base-contact structure. A graphene base forms a contiguous layer between a top surface of the emitter pillar and a top surface of the base-contact arm. A collector stack and the base have the same lateral extension parallel to the substrate surface and perpendicular to those edges of the top surface of the emitter pillar and the base-contact arm that face each other.
US09590043B2
A semiconductor device includes a semiconductor substrate, and a P-well and an N-type drift region disposed in the semiconductor substrate. The P-well includes a lower well region and an upper well region disposed above the lower well region. The lower well region includes a first surface that is near the N-type drift region, and the upper well region includes a second surface that is near the N-type drift region. A distance from the first surface of the lower well region to the N-type drift region is greater than a distance from the second surface of the upper well region to the N-type drift region.
US09590041B1
A semiconductor structure includes a semiconductor substrate, a dielectric structure formed on the semiconductor substrate and including at least a recess formed therein, a fin formed in the recess, and a dislocation region formed in the fin. The semiconductor substrate includes a first semiconductor material. The fin includes the first semiconductor material and a second semiconductor material. A lattice constant of the second semiconductor material is different from a lattice constant of the first semiconductor material. A topmost portion of the dislocation region is higher than an opening of the recess.
US09590030B2
According to one embodiment, a semiconductor device is provided. The semiconductor device has a first region formed of semiconductor and a second region formed of semiconductor which borders the first region. An electrode is formed to be in ohmic-connection with the first region. A third region is formed to sandwich the first region. A first potential difference is produced between the first and the second regions in a thermal equilibrium state, according to a second potential difference between the third region and the first region.
US09590023B2
An organic light-emitting display apparatus includes: a plurality of dummy pixels including a dummy pixel circuit; a plurality of pixels including a first pixel including: a light-emitting element configured to emit light in response to a driving current supplied from the dummy pixel circuit; and a pixel circuit separated from the light-emitting element; a plurality of voltage lines configured to apply a power voltage to a power node of a second pixel; and a plurality of repair lines including: a first repair line coupling the dummy pixel circuit and the light-emitting element and configured to transfer to the light-emitting element the driving current supplied from the dummy pixel circuit; and a second repair line coupling the dummy pixel circuit and the power node of the second pixel and configured to apply to the dummy pixel circuit the power voltage that is applied to the power node.
US09590019B2
A display apparatus capable of controlling light transmittance includes: a transparent organic light emitting device comprising a first region including an emission region capable of emitting light and a second region adjacent to the first region in a horizontal direction and including a transmission region capable of transmitting external light therethrough; and a light transmission control device coupled to and facing the transparent organic light emitting device, the light transmission control device comprising a third region formed at a location corresponding to the first region and a fourth region adjacent to the third region in the horizontal direction and positioned to correspond to the second region, wherein the fourth region comprises a sealed cavity having a transmission control material layer therein, and the transmission control material layer is configured to be selectively driven by the light transmission control device.
US09590014B2
Resistance variable memory cell structures and methods are described herein. A number of embodiments include a first resistance variable memory cell comprising a number of resistance variable materials in a super-lattice structure and a second resistance variable memory cell comprising the number of resistance variable materials in a homogeneous structure.
US09590009B2
A semiconductor light emitting element includes a base body, a first semiconductor layer, a second semiconductor layer, a first light emitting layer, a first conductive layer, a third semiconductor layer, a fourth semiconductor layer, a second light emitting layer, a second conductive layer, a first member, and a second member. The first member includes a first end portion and a second end portion. The first end portion is positioned between the base body and the first conductive layer and electrically connected to the first conductive layer, the second end portion not overlapping the second conductive layer. The second member includes a third end portion and a fourth end portion. The third end portion is positioned between the base body and the second conductive layer and electrically connected to the second conductive layer. The fourth end portion is electrically connected to the second end portion.
US09590008B2
A radiation-emitting semiconductor chip includes a carrier and a semiconductor body having a semiconductor layer sequence, wherein an emission region and a protective diode region are formed in the semiconductor body having the semiconductor layer sequence; the semiconductor layer sequence includes an active region that generates radiation and is arranged between a first semiconductor layer and a second semiconductor layer; the first semiconductor layer is arranged on a side of the active region facing away from the carrier; the emission region has a recess extending through the active region; the first semiconductor layer, in the emission region, electrically conductively connects to a first connection layer, wherein the first connection layer extends in the recess from the first semiconductor layer toward the carrier; the second semiconductor layer, in the emission region, electrically conductively connects to a second connection layer.
US09589998B2
A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.
US09589987B2
An array substrate includes a base substrate (10) and a gate line (11) and a data line (12) provided on the base, the gate line (11) and the data line (12) define a pixel unit, and in the pixel unit, a thin film transistor (13) is provided, the thin film transistor (13) includes a gate electrode (131), a gate insulation layer (132), an active layer (133), a source electrode (134) and a drain electrode (135). The gate insulation layer (132) includes a first gate insulation portion (1321) and a second gate insulation portion (1322), the gate electrode (131) is located between the first gate insulation portion (1321) and the second gate insulation portion (1322), and the second gate insulation portion (1322) is located between the gate electrode (131) and the active layer (133). The array substrate further includes a conductive pad (114), and a first via (15) corresponding to the conductive pad (114) is provided in the gate insulation layer (132) at both sides of the gate line (11), and the data line (12) is connected to the conductive pad (114) through the first via (15). The array substrate is capable of improving the definition, the resolution and the aperture ratio of a display device. A manufacturing method for an array substrate and a display device including such an array substrate are also disclosed.
US09589979B2
A memory device is described, which includes a block of memory cells comprising a plurality of stacks of horizontal active lines such as NAND string channel lines, with a plurality of vertical slices penetrated by, and surrounding, the horizontal active lines to provide a gate-all-around structure. A memory film is disposed between the horizontal active lines in the plurality of stacks and the vertical slices in the plurality of vertical slices. A 3D, horizontal channel, gate-all-around NAND flash memory is provided. A method for manufacturing a memory involves a buttress process. The buttress process enables horizontal channel, gate-all-around structures.
US09589977B1
The invention provides a non-volatile memory and a fabricating method thereof. The non-volatile memory includes a substrate, an embedded-type charge storage transistor, and a selection transistor. The substrate has an opening. The embedded-type charge storage transistor is disposed in the substrate. The embedded-type charge storage transistor includes a charge storage structure and a conductive layer. The charge storage structure is disposed on the substrate in the opening. The conductive layer is disposed on the charge storage structure and fills the opening. The selection transistor is disposed on the substrate at one side of the embedded-type charge storage transistor, wherein the selection transistor includes a metal gate structure. The non-volatile memory has excellent charge storage capacity.
US09589973B2
A pillar-shaped semiconductor memory device includes a silicon pillar, and a tunnel insulating layer, a data charge storage insulating layer, a first interlayer insulating layer, and a first conductor layer, which surround an outer periphery of the silicon pillar in that order, and a second interlayer insulating layer that is in contact with an upper surface or a lower surface of the first conductor layer. A side surface of the second interlayer insulating layer facing a side surface of the first interlayer insulating layer is separated from the side surface of the first interlayer insulating layer with a distance therebetween, the distance being larger than a distance from the side surface of the first interlayer insulating layer to a side surface of the first conductor layer facing the side surface of the first interlayer insulating layer.
US09589970B1
An antifuse one-time programmable (OTP) memory cell includes a semiconductor substrate, an isolation region, and a fin structure protruding from a top surface of the isolation region. The fin structure has an end portion with a sidewall surface above the top surface. A select gate transistor is disposed on the fin structure. The select gate transistor has a select gate traversing the fin structure, a select gate dielectric layer, a drain region, and a source region. A vertical program gate transistor is serially connected to the select gate transistor through the source region. The vertical program gate transistor has a program gate directly disposed on the isolation region and covering the sidewall surface of the end portion, and a program gate dielectric layer between the program gate and the sidewall surface.
US09589963B2
Multi-port semiconductor memory cells including a common floating body region configured to be charged to a level indicative of a memory state of the memory cell. The multi-port semiconductor memory cells include a plurality of gates and conductive regions interfacing with said floating body region. Arrays of memory cells and method of operating said memory arrays are disclosed for making a memory device.
US09589961B2
Disclosed is a semiconductor device functioning as a multivalued memory device including: memory cells connected in series; a driver circuit selecting a memory cell and driving a second signal line and a word line; a driver circuit selecting any of writing potentials and outputting it to a first signal line; a reading circuit comparing a potential of a bit line and a reference potential; and a potential generating circuit generating the writing potential and the reference potential. One of the memory cells includes: a first transistor connected to the bit line and a source line; a second transistor connected to the first and second signal line; and a third transistor connected to the word line, bit line, and source line. The second transistor includes an oxide semiconductor layer. A gate electrode of the first transistor is connected to one of source and drain electrodes of the second transistor.
US09589954B2
Electric-field concentration in the vicinity of a recess is suppressed. A gate insulating film is provided on a substrate that has a drain region and a first recess therein. The first recess is located between the gate insulating film and the drain region, and is filled with an insulating film. The insulating film has a second recess on its side close to the gate insulating film. An angle defined by an inner side face of the first recess and the surface of the substrate is rounded on a side of the drain region close to the gate insulating film.
US09589952B2
A reverse conducting IGBT is provided with a trench gate member that is provided in an IGBT region and has a lattice-pattern layout, and a trench member that is provided in a diode region and has a stripe-pattern layout. The diode region of the semiconductor substrate includes an anode region of a first conductive type, a drift region of a second conductive type and a barrier region of the second conductive type. The barrier region is electrically connected to a top surface electrode via a pillar member that extends from a top surface of the semiconductor substrate.
US09589946B2
According to one embodiment, a semiconductor device includes a first semiconductor chip; a first wiring and a second wiring which are provided above a first surface of the first semiconductor chip; a first terminal connected to one end of the first wiring and one end of the second wiring, and connected to an outside; a second terminal connected to the other end of the first wiring; and a third terminal connected to the other end of the second wiring, and connected to the second terminal.
US09589940B2
A light emitting device includes a substrate, a first light emitting element, a second light emitting element, a first conductive pattern, and a second conductive pattern. The first conductive pattern is provided on the substrate and includes a first element mounting portion and a first wire connecting portion. The second conductive pattern is provided on the substrate to form a first wiring gap between the first conductive pattern and the second conductive pattern. A first recess is provided between the first element mounting portion and the first wire connecting portion and is in communication with the first wiring gap. At least a part of an outer shape of the first element mounting portion is defined by the first wiring gap and the first recess on a third side of the first element mounting portion adjacent to the second conductive pattern.
US09589938B2
Embodiments of the present disclosure include devices and methods of forming the same. An embodiment is a device including a solder resist coating over a first side of a substrate, an active surface of a die bonded to the first side of the substrate by a first connector, and a surface mount device mounted to the die by a second set of connectors, the surface mount device being between the die and the first side of the substrate, the surface mount device being spaced from the solder resist coating.
US09589932B2
Representative methods are disclosed for fabricating device packages having a plurality of dies, a molding compound extending along sidewalls of the plurality of dies, and a polymer layer over and contacting the molding compound. The molding compound comprises a non-planar top surface, and a total thickness variation (TTV) of a top surface of the polymer layer is less than a TTV of the non-planar top surface of the molding compound. The device package further includes a conductive feature on the polymer layer, wherein the conductive feature is electrically connected at least one of the plurality of dies.
US09589921B2
In one semiconductor device, a semiconductor chip has first and second pad electrodes disposed on the main surface thereof, insulating films that cover the main surface of the semiconductor chip, a rewiring layer that is disposed between the insulating films, and a plurality of external terminals disposed on the top of the insulating film. The plane size of the first pad electrode and the second pad electrode differ from one another, and the first pad electrode and the second pad electrode are connected to any of the plurality of external terminals via the rewiring layer.
US09589920B2
An embedded die package and method of manufacture, the die package comprising a die having I/O contact pads in a passivation layer wherein the die contact pads are coupled to a first side of a feature layer by an adhesion/barrier layer, and a layer of pillars extends from a second side of the feature layer, the die, feature layer and the layer of pillars being encapsulated by a dielectric material and wherein the feature layer comprises routing lines that are individually drawn by laser exposure of photoresist under guidance of an optical imaging system for good alignment with both the I/O contact pads of the die and with the subsequently to be deposited pillars that are positioned with respect to the package edges.
US09589919B2
The present description relates to the field of fabricating microelectronic devices, wherein a microelectronic device may have a hexagonal confirmation for signal nodes and ground nodes which utilizes the cross-talk reduction by cancellation property of geometrically symmetry and orthogonality to reduce signal node to ground node ratio for increasing signaling density.
US09589918B2
A memory device structure includes circuitry formed over a substrate and at least one insulating portion formed over said circuitry, each of which includes a plurality of openings. The memory device also includes a plurality of electrical connections formed in respective openings of the plurality of openings of the at least one insulating portion, at least one bond pad formed within at least one of the at least one insulating portion, and a cap formed over the at least one bond pad.
US09589915B2
A semiconductor device includes a substrate defined with a seal ring region and a circuit region, the substrate includes a seal ring structure and an integrated circuit structure, the seal ring structure is disposed in the seal ring region and includes a plurality of stacked conductive layers interconnected by a plurality of via layers, the integrated circuit structure is disposed in the circuit region and includes an active or a passive device; a metal pad disposed over the seal ring region and contacted with the seal ring structure; a passivation layer disposed over the substrate and covering the metal pad; a polymeric layer disposed over the passivation layer and the circuit region; and a molding disposed over the passivation layer and the polymeric layer, wherein the seal ring structure is covered by the molding.
US09589914B2
According to various embodiments, a semiconductor chip may include: a semiconductor body region including a first surface and a second surface opposite the first surface; a capacitive structure for detecting crack propagation into the semiconductor body region; wherein the capacitive structure may include a first electrode region at least partially surrounding the semiconductor body region and at least substantially extending from the first surface to the second surface; wherein the capacitive structure further may include a second electrode region disposed next to the first electrode region and an electrically insulating region extending between the first electrode region and the second electrode region.
US09589910B2
A semiconductor device has a base substrate with first and second opposing surfaces. A first etch-resistant conductive layer is formed over the first surface of the base substrate. A second etch-resistant conductive layer is formed over the second surface of the base substrate. A first semiconductor die has bumps formed over contact pads on an active surface of the first die. The first die is mounted over a first surface of the first conductive layer. An encapsulant is deposited over the first die and base substrate. A portion of the base substrate is removed to form electrically isolated base leads between opposing portions of the first and second conductive layers. A second semiconductor die is mounted over the encapsulant and a second surface of the first conductive layer between the base leads. A height of the base leads is greater than a thickness of the second die.
US09589908B1
A method and apparatus are provided for manufacturing a packaged electronic device (200) which includes a carrier substrate (120) in which conductive interconnect paths (122) extend between first and second opposed surfaces, an integrated circuit die (125) affixed to the first surface of the carrier substrate for electrical connection to the plurality of conductive interconnect paths, and an array of conductors (110), such as BGA, LGA, PGA, C4 bump or flip chip conductors, affixed to the second surface of the carrier substrate for electrical connection to the plurality of conductive interconnect paths, where the array comprising a signal feed ball (112) and an array of shielding ground balls (111) surrounding the signal feed ball.
US09589901B2
A wafer can be provided to include a single crystalline semiconductor material with a predetermined crystal orientation. The wafer can include a laser mark at a determined position on a front surface or on a back surface of the wafer, where the determined position is configured to indicate the predetermined crystal orientation of the single crystalline semiconductor material.
US09589899B2
In a semiconductor device, a first gate structure having a first end portion is formed on a substrate. A second gate structure is formed on the substrate, and has a second end portion opposite to the first end portion of the first gate structure in a diagonal direction. A cross-coupling pattern is formed between the first and second gate structure, and electrically connects the first and second gate structures to each other. A first contact plug directly contacts an upper portion of the first end portion of the first gate structure and a first upper sidewall of the cross-coupling pattern. A second contact plug directly contacts an upper portion of the second end portion of the second gate structure and a second upper sidewall of the cross-coupling pattern. In the semiconductor device, a parasitic capacitance due to the cross-coupling structure may decrease.
US09589887B2
Dielectric breakdown is prevented between opposing two semiconductor chips, to improve the reliability of a semiconductor device. A first semiconductor chip has a wiring structure including a plurality of wiring layers, a first coil formed in the wiring structure, and an insulation film formed over the wiring structure. A second semiconductor chip has a wiring structure including a plurality of wiring layers, a second coil formed over the wiring structure, and an insulation film formed over the wiring structure. The first semiconductor chip and the second semiconductor chip are stacked via an insulation sheet with the insulation film of the first semiconductor chip and the insulation film of the second semiconductor chip facing each other. The first coil and the second coil are magnetically coupled with each other. Then, in each of the first and second semiconductor chips, wires and dummy wires are formed at the uppermost-layer wiring layer.
US09589881B2
A display device includes a display panel and a chip-on-film (COF) bonded to the display panel. The chip-on-film includes a film on which a driving chip is mounted, a plurality of film lines on the film, and at least one dummy pattern on the film between an adjacent pair of films in the plurality of film lines.
US09589869B2
Packaging solutions for devices and systems comprising lateral GaN power transistors are disclosed, including components of a packaging assembly, a semiconductor device structure, and a method of fabrication thereof. In the packaging assembly, a GaN die, comprising one or more lateral GaN power transistors, is sandwiched between first and second leadframe layers, and interconnected using low inductance interconnections, without wirebonding. For thermal dissipation, the dual leadframe package assembly can be configured for either front-side or back-side cooling. Preferred embodiments facilitate alignment and registration of high current/low inductance interconnects for lateral GaN devices, in which contact areas or pads for source, drain and gate contacts are provided on the front-side of the GaN die. By eliminating wirebonding, and using low inductance interconnections with high electrical and thermal conductivity, PQFN technology can be adapted for packaging GaN die comprising one or more lateral GaN power transistors.
US09589863B2
A power module and a thermal interface structure are provided herein. The thermal interface structure includes: a base and a plurality of filler particles distributed in the base. When the filler particles are under pressure, at least a part of the filler particles are deformed, and at least two adjacent filler particles partially contact with each other to form a heat-conducting path for transferring heat.
US09589857B2
An embodiment of the disclosure is a structure comprising an interposer. The interposer has a test structure extending along a periphery of the interposer, and at least a portion of the test structure is in a first redistribution element. The first redistribution element is on a first surface of a substrate of the interposer. The test structure is intermediate and electrically coupled to at least two probe pads.
US09589847B1
Techniques relate to forming an integrated circuit. Trench contacts are formed on top of at least one source and drain of an intermediate structure. An interlayer dielectric is formed on top of the intermediate structure. A trench is cut through the interlayer dielectric, through at least one of the trench contacts, down to a shallow trench isolation area. The trench is filled with a filling material. Upper contacts are formed on top of the trench contacts in the interlayer dielectric. A first metal layer pattern is patterned such that a separation is formed by a filling material width of the filling material. First metal layers are formed according to the first metal layer pattern, where tips of the first metal layers are aligned to the filling material that fills the trench, such that the tips of the first metal layers are separated by the filling material width.
US09589846B1
A method for forming a semiconductor device is provided. First, a dielectric layer is provided on a substrate, wherein a first recess and a second recess are formed in the dielectric layer. After a mask layer is filled into the first recess and the second recess, the mask layer in the second recess is removed away, thereby forming a patterned mask layer. Subsequently, a nitride treatment is performed to remove unwanted residue of the mask layer in the second recess.
US09589845B1
A method is provided for forming a fin cut that enables a single diffusion break in very dense CMOS structures formed using bulk semiconductor substrates. A dummy gate is removed from a finned structure to expose the top regions of the fins, the bottom fin regions being within a shallow trench isolation region. Selective vapor phase etching follows sequential ion implantation of the top and bottom fin regions to form a diffusion break cut region. The non-implanted regions of the substrate and the shallow trench isolation region remain substantially intact during each etching procedure. Double diffusion break cut regions are also enabled by the method.
US09589840B2
The present disclosure relates to a semiconductor package and a manufacturing method thereof. The semiconductor package includes a semiconductor element including a main body, a plurality of conductive vias, and at least one filler. The conductive vias penetrate through the main body. The filler is located in the main body, and a coefficient of thermal expansion (CTE) of the filler is different from that of the main body and the conductive vias. Thus, the CTE of the overall semiconductor element can be adjusted, so as to reduce warpage.
US09589828B2
A layer of partially planarized organosilicate (DUO) is spin-coated onto a layer of high density plasma (HDP) oxide on a silicon wafer after the shallow trench isolation (STI) is filled with the HDP oxide. Then the DUO layer is etched using a specialized process specifically tuned to etch the DUO and high density plasma (HDP) oxide at a certain selectivity. The higher areas of the wafer topography (active Si areas) have thinner DUO and as the etch process proceeds it starts to etch through the HDP oxide in these areas (active Si areas). The etch process is stopped after a certain depth is reached and before touching down on the silicon nitride oxidation layer. The DUO is removed and a standard chemical-mechanical polish (CMP) is performed on the silicon wafer. After the CMP step the silicon nitride is removed, exposing the silicon substrate between the field oxides.
US09589827B2
A method of manufacturing a semiconductor device that involves etching a trench in a semiconductor substrate, epitaxially growing a crystalline structure in the trench and forming semiconductor structures on either side of the crystalline structure. Crystalline oxides may include rare earth oxides, aluminum oxides or Perovskites.
US09589819B1
A substrate processing apparatus includes a robot having: an end effector, a first link structure including a fixing portion having a front end to which the end effector is fixed, a support portion, and a first hole formed in the support portion, a second link structure including a second hole, and a shaft inserted into the first and second holes, the shaft including an upper end having a height equal to or smaller than a height of the substrate mounted on the end effector; a vacuum transfer chamber, wherein the robot is installed in the vacuum transfer chamber; at least one process chamber disposed adjacent to the vacuum transfer chamber and configured to thermally process the substrate transferred from the vacuum transfer chamber by the robot; a module including one or more process chambers; and a cooling mechanism installed above the first link structure or the shaft.
US09589811B2
A method may include providing a patterned feature extending from a substrate plane of a substrate, the patterned feature including a semiconductor portion and a coating in an unhardened state extending along a top region and along sidewall regions of the semiconductor portion; implanting first ions into the coating, the first ions having a first trajectory along a perpendicular to the substrate plane, wherein the first ions form a etch-hardened portion comprising a hardened state disposed along the top region; and directing a reactive etch using second ions at the coating, the second ions having a second trajectory forming a non-zero angle with respect to the perpendicular, wherein the reactive etch removes the etch-hardened portion at a first etch rate, wherein the first etch rate is less than a second etch rate when the second ions are directed in the reactive etch to the top portion in the unhardened state.
US09589807B1
A method for eliminating interlayer dielectric (ILD) dishing and controlling gate height uniformity is provided. Embodiments include forming a plurality of polysilicon gates over a substrate, each gate having spacers formed on sides of the polysilicon gates and a nitride cap formed on an upper surface; forming a gapfill material between adjacent polysilicon gates; forming an oxide over the gapfill material between the adjacent polysilicon gates; removing the nitride caps; removing a portion of the oxide between the adjacent polysilicon gates, forming a recess; and forming an ILD cap layer in the recess between the adjacent polysilicon gates.
US09589803B2
This description relates to a gate electrode of a field effect transistor. An exemplary structure for a field effect transistor includes a substrate; a gate electrode over the substrate including a first top surface and a sidewall; a source/drain (S/D) region at least partially disposed in the substrate on one side of the gate electrode; a spacer on the sidewall distributed between the gate electrode and the S/D region; and a contact etch stop layer (CESL) adjacent to the spacer and further comprising a portion extending over the S/D region, wherein the portion has a second top surface substantially coplanar with the first top surface.
US09589799B2
Methods of forming high etch selectivity, low stress ashable hard masks using plasma enhanced chemical vapor deposition are provided. In certain embodiments, the methods involve pulsing low frequency radio frequency power while keeping high frequency radio frequency power constant during deposition of the ashable hard mask using a dual radio frequency plasma source. According to various embodiments, the low frequency radio frequency power can be pulsed between non-zero levels or by switching the power on and off. The resulting deposited highly selective ashable hard mask may have decreased stress due to one or more factors including decreased ion and atom impinging on the ashable hard mask and lower levels of hydrogen trapped in the ashable hard mask.
US09589793B2
Described herein are semiconductor structures comprising laterally varying II-VI alloy layer formed over a surface of a substrate. Further, methods are provided for preparing laterally varying II-VI alloy layers over at least a portion of a surface of a substrate comprising contacting at least a portion of a surface of a substrate within a reaction zone with a chemical vapor under suitable reaction conditions to form a laterally varying II-VI alloy layer over the portion of the surface of the substrate, wherein the chemical vapor is generated by heating at least two II-VI binary compounds; and the reaction zone has a temperature gradient of at least 50-100° C. along an extent of the reaction zone. Also described here are devices such as lasers, light emitting diodes, detectors, or solar cells that can use such semiconductor structures. In the case of lasers, spatially varying wavelength can be realized while in the case of solar cells and detectors multiple solar cells can be achieved laterally where each cell absorbs solar energy of a given wavelength range such that entire solar spectrum can be covered by the said solar cell structure. For LED applications, spatial variation of alloy composition can be used to engineer colors of light emission.
US09589788B2
Provided are a polymer for an underlayer film, used in semiconductor and display manufacturing processes, an underlayer film composition for semiconductor and display manufacturing processes, containing the same, and a method for forming an underlayer film for semiconductor and display manufacturing processes using the underlayer film composition. The polymer according to the present invention is a polymer including a repeating unit represented by the following Chemical Formula 1: in Chemical Formula 1, Ar, R1 to R6, L, and R′ and R″ are the same as those in the detailed description of the present invention.
US09589781B2
A curved ion guide includes four curved rod electrodes arranged around a curved central axis, two deflecting auxiliary electrodes which face each other across the axis, and two focusing auxiliary electrodes which are located on a curved surface orthogonal to the plane P and including the axis and which face each other across the axis. Ions are focused by the effect of an electric field created by radio-frequency voltages applied to the curved rod electrodes, and a deflecting electric field having the effect of curving ions along the axis is created by direct-current voltages applied to the deflecting auxiliary electrodes. Furthermore, a focusing direct-current electric field having the effect of pushing ions from the vicinity of the focusing auxiliary electrodes toward the axis is created by a direct-current voltage having the same polarity as that of the ions and applied to the focusing auxiliary electrodes.
US09589780B2
Certain embodiments described herein are directed to systems including a cell downstream of a mass analyzer. In some instances, the cell is configured as a reaction cell, a collision cell or a reaction/collision cell. The system can be used to suppress unwanted ions and/or remove interfering ions from a stream comprising a plurality of ions.
US09589775B2
A mass spectrometry (MS) system may be cleaned by generating plasma and contacting an internal surface of the system to be cleaned with the plasma. The system may be switched between operating in an analytical mode and in a cleaning mode. In the analytical mode a sample is analyzed, and plasma may or may not be actively generated. In the cleaning mode the plasma is actively generated, and the sample may or may not be analyzed.
US09589773B2
Embodiments described herein relate to methods for determining a cleaning endpoint. A first plasma cleaning process may be performed in a clean chamber environment to determine a clean time function defined by a first slope. A second plasma cleaning process may be performed in an unclean chamber environment to determine a clean time function defined by a second slope. The first and second slope may be compared to determine a clean endpoint time.
US09589770B2
A system and method for providing intermediate reactive species from a remote plasma unit to a reaction chamber are disclosed. The system includes a pressure control device to control a pressure at the remote plasma unit as intermediate reactive species from the remote plasma unit are provided to the reaction chamber.
US09589768B2
The invention relates to an apparatus (1) for producing a reflection-reducing layer on a surface (21) of a plastics substrate (20). The apparatus comprises a first sputtering device (3) for applying a base layer (22) to the surface (21) of the plastics substrate (20), a plasma source (4) for plasma-etching the coated substrate surface (21), and a second sputtering device (5) for applying a protective layer (24) to the substrate surface (21). These processing devices (3, 4, 5) are arranged jointly in a vacuum chamber (2), which has inlets (8) for processing gases. In order to move the substrate (20) between the processing devices (3, 4, 5) in the interior of the vacuum chamber (2), a conveying apparatus (10) is provided which is preferably in the form of a rotary table (11). Furthermore, the invention relates to a method for producing such a reflection-reducing layer on the surface (21) of the plastics substrate (20).
US09589766B2
A charged particle beam drawing apparatus has a drawing unit that directs a charged particle beam and draws a pattern on a target and also has a control calculator that controls the drawing unit. The control calculator has a speed calculating unit configured to calculate a first drawing speed in a first area in a drawing area on the target according to a run-up start coordinate, a drawing start coordinate, and a predetermined first acceleration, and calculate the range of the first area according to the run-up start coordinate, the first acceleration, and a second drawing speed, and also has a drawing control unit configured to control the drawing unit so that, in the first area, drawing is performed at the first drawing speed and, in a second area that follows the first area, drawing is performed at the second drawing speed.
US09589759B2
An X-ray generator is provided using a transmission type target having a long life span, where it is possible to change the point for generating X-rays on the surface of the target while maintaining the vacuum chamber in a high vacuum state. A portion of a vacuum chamber 1 that includes a target 2 is linked to a main body portion 1a of the chamber through a linking member 5 as a movable chamber portion 1b. A fixed anode 12 is provided between the target 2 and the electrode 10 at the final stage from among a group of electrodes 8, 9 and 10 for electrostatically accelerating and converging electrons from an electron source 7 and is fixed to the main body portion 1a of the chamber in order to prevent the form of the electrical field from changing when the movable chamber portion 1b is shifted.
US09589741B2
A security switch has a switch head with an actuator and having a button top. The security switch is mounted in a housing wall. The actuator is designed so as to actuate contact elements of a switch module upon actuation into the switch position. The switch module is extended by a signaling switch block with contact elements located in the signaling flow path, wherein, in the assembly state of the security switch, the signaling switch block is subjected to an actuation pin that is rigidly arranged thereon. if the assembly state is undone or changed, the actuation pin disengages from the signaling switch block and signaling flow path opens. The actuation pin and signaling switch block are located outside the actuation region of the actuator of the security switch.
US09589730B2
A feed-through assembly is presented. The feed-through assembly includes a first end and a second end with a body therebetween. The first end comprises a substantially L-shaped end and a block. The substantially L-shaped end includes a first contact surface. The block includes a second contact surface.
US09589724B2
A chip electronic component may include an insulating layer formed on a lower portion of a side surface of an internal coil pattern to avoid a direct contact between the internal coil pattern and a magnetic material, thereby preventing a waveform distortion indicating a reduction in inductance at high frequency.
US09589720B2
A signal transmission device of aspects of the invention can include a master circuit connected to the primary sides of first and second transformers and a slave circuit connected to the secondary sides of the first and second transformers. The master circuit sets one of first and second transmitting/receiving circuits for transmitting operation and the other for receiving operation according to a control signal, and detecting a leading edge and a falling edge of the control signal, transmits a pulse signal with the pulse interval changing after a predetermined period of time. The slave circuit detects the change of the pulse interval of the signal received through third and fourth transmitting/receiving circuits and according to the detection result, sets one of the third and fourth transmitting/receiving circuits for receiving operation and the other for transmitting operation.
US09589713B2
A sintered ferrite magnet comprises a main phase of an M type Sr ferrite having a hexagonal crystal structure. An amount of Zn is 0.05 to 1.35 mass % in terms of ZnO, the sintered ferrite magnet does not substantially include a rare-earth element (R), and the following Formula (1) is satisfied, where a total amount of Sr, Ba and Ca is M3 in terms of mol, a total amount of Fe, Co, Mn, Zn, Cr and Al is M4 in terms of mol, and an amount of Si is M5 in terms of mol. 0.5≦{M3−(M4/12)}/M5≦4.8 (1).
US09589711B2
A resistor and a manufacturing method thereof are disclosed. Since a ceramic tube formed of a ceramic material is used and the ceramic tube is joined to sealing electrodes by use of brazing rings, joining strength and durability of the resistor are considerably improved. The resistor may be stably used at a high voltage due to excellent heat dissipation characteristics thereof.
US09589710B2
An insulator for a coaxial connector is disclosed. The insulator is constructed of dielectric material laser cut into a plurality of sections such that the insulator is able to move laterally, transversely, and rotationally to accommodate gimballing and radial misalignment of a transmission medium connected to the coaxial connector while maintaining dielectric properties to insulate and separate components of the coaxial connector.
US09589707B2
A composite bicycle frame which comprises of a main frame including interconnected tubes and substantially composed of a composite material and having a composite layup structure. At least one electric wire electrically interconnects electrical components mounted to or in the frame. The at least one electric wire is embedded in the composite material structure forming the composite main frame. The electric wire has connectable conductive ends at each of the opposed ends thereof.
US09589705B2
A connector for simultaneously connecting and disconnecting electrical and fluid paths includes an internal valve which activates fluid flow when the two sides of the connector are connected together to provide an electrical connection and deactivates the fluid flow when the connectors are disconnected. The connector bodies can be constructed of metal or other conductive materials providing an electrical connection, and can include holes or apertures to provide fluid paths through the connector bodies. Valves can be included in both mating connectors to prevent or allow fluid flow from both sides of the flow path.
US09589704B2
A cable having low values for resistance, inductance, and capacitance. The cable includes a plurality of conductors for each signal or leg, which may be configured as a braid of three subsets of braids of bonded pairs of insulated conductors. The bonded pairs may be twisted or untwisted, in close proximity such that inductance is reduced via magnetic field cancellation. Each leg may be separate and parallel, rather than interwoven or braided together, increasing the distance between the two signals and reducing capacitance. The legs may be positioned close to each other, such that their magnetic fields cancel to further reduce inductance.
US09589700B2
A cross-linked polyethylene composition for a power cable insulator including (A) 100 parts by weight of a polyethylene base resin, (B) 0.1 to 0.6 parts by weight of a hindered phenol-based antioxidant, (C) 1 to 4 parts by weight of a crosslinking agent, (D) 0.2 to 1.0 parts by weight of magnesium oxide and (E) 0.1 to 1.0 parts by weight of a scorch inhibitor, which advantageously exhibits superior resistance to water tree generated when a power cable insulator is exposed to outside water and electric field, and superior electrical insulation characteristics.
US09589693B2
The present invention relates to adhesives that are suitable for use as electrically conductive materials in the fabrication of electronic devices, integrated circuits, semiconductor devices, passive components, solar cells, solar modules, and/or light emitting diodes. The adhesives comprise at least one resin component, micron-sized electrically conductive particles having an average particle size of 2 μm to 50 μm, and from 0.01 to 15 wt. % of sub-micron-sized electrically conductive particles having a average particle size of 300 nm to 900 nm.
US09589688B2
A mobile radiation system is provided. The mobile radiation system comprises a mobile radiation device coupled to a control unit; a radiation blocker having an adaptor opening for receiving said mobile radiation device when said mobile radiation device is in a seated position on said radiation blocker; and a mobile carrier comprising a first compartment for housing said radiation blocker, a second compartment for housing said control unit, and a carrier motion device. The adaptor opening can dimensionally fit the mobile radiation device to block radiations from the mobile radiation device when said mobile radiation device is in the seated position. The mobile radiation device can produce radiation having peak radiation wavelength in a range of from about 250 nm to about 450 nm and can have a peak irradiation power in a range of from about 0.5 W/cm2 to about 10 W/cm2.
US09589663B2
A one-time programmable (OTP) memory capable of performing a multi-programming and a semiconductor memory device including the OTP memory are disclosed. The OTP memory includes a plurality of fuse cells in which two or more fuse cells are programmed at a time. In a program mode, in response to determining that a current flowing through each of the fuse cells increases to a predetermined value, the OTP memory blocks the current flowing through each of the fuse cells.
US09589658B1
Approaches for a memory including a cell array are provided. The memory includes a first device of the cell array which is connected to a bitline and a node and controlled by a word line, and a second device of the cell array which comprises a third device which is connected to a source line and the node and controlled by the word line and a fourth device which is connected between the word line and the node. In the memory, in response to another word line in the cell array being activated and the word line not being activated to keep the first device in an unprogrammed state, the third device isolates and floats the node such that a voltage level of a gate to source of the first device is clamped down by the fourth device to a voltage level around zero volts.
US09589656B2
According to one embodiment, a voltage generation circuit includes a first boost circuit, a voltage division circuit, a first detection circuit, a capacitor and a first switch. The first boost circuit outputs a first voltage. The voltage division circuit divides the first voltage. The first detection circuit is configured to detect a first monitor voltage supplied to the first input terminal, based on a reference voltage which is supplied to a second input terminal of the first detection circuit, and to control an operation of the first boost circuit. The capacitor is connected between an output terminal of the first boost circuit and the first input terminal of the first detection circuit. The first switch cuts off a connection between the capacitor and the first detection circuit, based on an output signal of the first detection circuit, until the first voltage is output from the first boost circuit.
US09589651B1
A semiconductor memory device according to an embodiment includes: a memory cell array including a plurality of charge accumulation type memory cells; and a control unit that controls the memory cell array. The control unit, when executing an erase operation on the memory cell array, applies an erase voltage to the memory cells. The erase voltage is a voltage in a pulse form. The control unit performs control that, compared to when the erase operation is in a first stage, increases a voltage value and shortens a pulse width of the erase voltage when the erase operation is in a second stage.
US09589648B1
A semiconductor memory device includes a memory string on a well, the memory string including a memory cell connected in series between first and second select transistors, a bit line and a source line respectively connected to the first and second select transistors, a well line connected to the well, first and second select lines respectively connected to gates of the first and second select transistors, a word line connected to a gate of the memory cell transistor, and a control circuit that performs a write operation on the first select transistor, the write operation including a pre-charge operation of the bit line, in which a first voltage is applied to the word line and the second select line, a second voltage higher than the first voltage to the source line and the well line, and a third voltage higher than the first voltage to the first select line.
US09589646B2
A page buffer circuit includes a plurality of page buffers including a first page buffer. The first page buffer is configured to load input data of the first page buffer, and input data of at least one neighboring page buffer. The first page buffer is also configured to apply a bias corresponding to the input data of the first page buffer, and the input data of the at least one neighboring page buffer to a bit line.
US09589644B2
Apparatus and methods are disclosed, such as a method that includes precharging channel material of a string of memory cells in an unselected sub-block of a block of memory cells to a precharge voltage during a first portion of a programming operation. A programming voltage can then be applied to a selected memory cell in a selected sub-block of the block of memory cells during a second portion of the programming operation. The selected memory cell is coupled to a same access line as an unselected memory cell in the unselected sub-block. Additional methods and apparatus are disclosed.
US09589642B2
A level shifter receiving an input with a relatively narrow voltage range and provides an output with a relatively wide voltage range. The level shifter including a transistor with a turn-on voltage. Control circuitry applies a bias to the level shifter such that the transistor does not receive the turn-on voltage.
US09589638B2
A first potential and a second potential lower than the first potential are applied to a first end of a memory gate electrode part of the nonvolatile memory and to a second end of the memory gate electrode part, respectively, so that a current is caused to flow in a direction in which the memory gate electrode part extends, then, a hole is injected from the memory gate electrode part into a charge accumulating part below it, therefore, an electron accumulated in the charge accumulating part is eliminated. By causing the current to flow through the memory gate electrode part of a memory cell region as described above, Joule heat can be generated to heat the memory cell. Consequently, in the erasing by a FN tunneling method in which the erasing characteristics degrade at a low temperature, the erasing speed can be improved by heating the memory gate electrode part.
US09589632B2
A resistive memory device includes a column decoder having a first switch unit, including at least one pair of switches arranged in correspondence to each of a plurality of signal lines, and a second switch unit including a pair of switches arranged in correspondence to the at least one pair of switches of the first switch unit. A first pair of switches of the first switch unit includes a first switch and a second switch that are of the same type, and a second pair of switches of the second switch unit includes a third switch and a fourth switch that are connected to the first pair of switches. A selection voltage is provided to the first signal line by passing through the first switch, and an inhibit voltage is provided to the first signal line by selectively passing through the first switch or the second switch.
US09589628B2
A semiconductor device includes a first memory block, a second memory block, a first refresh control block for generating a first block control signal and a second block control signal in response to a refresh pulse signal, a second refresh control block for generating a first refresh control pulse signal and a second refresh control pulse signal corresponding to a first refresh operation section of the first memory block and a second refresh operation section of the second memory block, respectively, in response to the refresh pulse signal and the first and second block control signals, and a third refresh control block for controlling the first and second memory blocks so that a first refresh operation of the first memory block and a second refresh operation of the second memory block are discontinuously performed in response to the first and second refresh control pulse signals.
US09589610B1
A memory circuit includes a pre-charging unit configured to charge a metal bit line during a pre-charging period, a sensing unit configured to sense a status of a memory cell coupled to the metal bit line during the pre-charging period, and a sink circuit configured to provide a sink current during the pre-charging period based on the status of the memory cell sensed by the sensing unit.
US09589608B2
In a semiconductor memory device storing a resistance difference as information, a long time is taken so as to charge and/or discharge a selected cell by an equalizer circuit, which results in a difficulty of a high speed operation. A selection circuit puts, in a selected state, at least three bit lines which includes a selected bit line connected to a selected memory cell together with unselected bit lines adjacent to the selected bit line on both sides of the selected bit line. The selected and the unselected bit lines are coupled to sense amplifiers through an equalizer circuit. The equalizer circuit puts both the selected and the unselected bit lines into charging states and thereafter puts only the selected bit line into a discharging state to perform a sensing operation. On the other hand, the unselected bit lines are continuously kept at the charging states during the sensing operation. This makes it possible to perform the sensing operation at a high speed with a rare malfunction.
US09589603B2
A semiconductor device may include: a fuse array including a plurality of fuses; a voltage generation unit suitable for generating a first measurement voltage having a preset level; and a measurement unit suitable for supplying the first measurement voltage to a sourcing node of the fuse array and a second measurement voltage, which is provided from an external through a first pad, to a sinking node of the fuse array, and outputting a current, which is caused by voltage difference between the first and second measurement voltages and passes through one or more of the multiple fuses, through the first pad.
US09589601B2
Various implementations described herein may refer to and may be directed to circuitry for an integrated circuit using topology configurations. For instance, in one implementation, such circuitry may include a memory array having a plurality of memory cells. Such circuitry may also include one or more reconfigurable sense amplifier devices coupled to the memory array and configured to amplify differential voltage levels received from the memory array. The reconfigurable sense amplifier devices may include a plurality of sense amplifier circuits configured to be arranged in one of a plurality of topology configurations, where the topology configurations include a parallel configuration and a cross parallel configuration. The reconfigurable sense amplifier devices may also include one or more switches configured to set the plurality of sense amplifier circuits into the plurality of topological configurations based on one or more control bits.
US09589597B2
This document describes techniques and apparatuses for small-screen movie-watching using a viewport. These techniques enable viewers to experience movies and other media programs using a small screen as a viewport to the movie rather than dramatically compressing or cropping the movie to fit the small screen. A viewer may select whatever portion of the movie imagery he or she desires to experience through the small screen at a size sufficient to perceive details of plot elements and an environment in which the plot elements interact. Thus, the viewer may follow plot elements central to the plot while also exploring the environment that provides context for these plot elements.
US09589593B2
According to one embodiment, in the case of rereading of data from a storage area of a storage is performed, data is read from the storage area a plurality of times, and a weighted average of pieces of the data read from the storage area the plurality of times is calculated, according to weights added to the pieces of data, as data reread from the storage area, in which the weights decreases as quality of the pieces of data read from the storage area decreases.
US09589585B2
An aspect of the present invention relates to magnetic powder, which is magnetoplumbite hexagonal strontium ferrite magnetic powder comprising 0.05 atomic percent to 3 atomic percent of Ca per 100 atomic percent of Fe, but comprising no rare earth elements or transition metal elements other than Fe, the average particle size of which ranges from 10 nm to 25 nm, and which is magnetic powder for magnetic recording.
US09589581B2
A microwave-assisted magnetic recording head according to an embodiment includes: a magnetic pole; a magnetic shield including a first portion and a second portion connecting to the first portion, a gap being present between the first portion and the magnetic pole; a recording coil disposed to at least one of the magnetic pole and the magnetic shield; and a spin torque oscillator including a nonmagnetic intermediate layer extending within and outside the gap, an oscillation layer disposed on a portion of the nonmagnetic intermediate layer in the gap, and a spin injection layer in which a magnetization direction is pinned and which is disposed on a portion of the nonmagnetic intermediate layer outside the gap so as to be separated from the oscillation layer.
US09589579B2
Various embodiments provide a tool, referred to herein as “Active Lab” that can be used to develop, debug, and maintain knowledge bases. These knowledge bases (KBs) can then engage various applications, technology, and communications protocols for the purpose of task automation, real time alerting, system integration, knowledge acquisition, and various forms of peer influence. In at least some embodiments, a KB is used as a virtual assistant that any real person can interact with using their own natural language. The KB can then respond and react however the user wants: answering questions, activating applications, or responding to actions on a web page.
US09589578B1
Technologies are described herein for invoking API calls through voice commands. An annotated API description is received at a voice API interface. The annotated API description comprises descriptions of one or more APIs and speech annotations for the one or more APIs. The voice API interface further receives a voice API command from a client. By utilizing the annotated API description and the speech annotations contained therein, the voice API interface converts the voice API command into an API call request, which is then sent to the corresponding service for execution. Once the service returns an API call result, the voice API interface interprets the API call result and further converts it into an audio API response based on the information contained in the annotated API description and the speech annotations. The audio API response is then sent to the client.
US09589572B2
In accordance with an embodiment of the present invention, a noise reduction method for speech processing includes estimating a noise/interference component signal by subtracting voice component signal from a first microphone input signal wherein the voice component signal is evaluated as a first replica signal produced by passing a second microphone input signal through a first adaptive filter; a stepsize is estimated to control adaptive update of the first adaptive filter, wherein the stepsize is evaluated by combing an open-loop approach and a closed-loop approach, the open-loop approach comprising voice/noise/interference classification and SNR estimation in voice area, and the closed-loop approach comprising calculating a normalized correlation between the first replica signal and the first microphone input signal. A noise/interference reduced signal is outputted by subtracting a second replica signal from a target signal which is the first microphone input signal or the second microphone input signal, wherein the second replica signal is produced by passing the estimated noise/interference component signal through a second adaptive filter.
US09589566B2
Embodiments of techniques or systems for fraud detection are provided herein. A communication may be received where the communication includes one or more voice signals from an individual. Frequency responses associated with these voice signals may be determined and analyzed and utilized to determine whether or not potential fraudulent activity is occurring. For example, if a frequency response is greater than a frequency threshold, potential fraudulent activity may be determined. Further, frequency responses may be cross referenced with voice biometrics, voice printing, or fraud pathway detection results. In this way, voice stress or frequency responses may be utilized to build other databases related to other types of fraud detection, thereby enhancing one or more aspects of fraud detection. For example, a database may include a voice library, a pathway library, or a frequency library which include characteristics associated with fraudulent activity, thereby facilitating identification of such activity.
US09589539B2
An electronic device according to an embodiment including: a sensor to detect a contact position of a touch operation on a screen of a display; a display controller to display, on the screen, first information indicative of a first process to be performed, and to display, on the screen, second information in place of the first information when a moving distance of a contact position of the touch operation exceeds a first value, the second information indicative of a second process to be performed; and a processor to perform the first process when the touch operation finishes while the first information is displayed on the screen and to perform the second process when the touch operation finishes while the second information is displayed on the screen.
US09589537B2
The present invention provides a shift register, a driving method, a gate driving apparatus and a display apparatus. Said shift register comprises a pull-up unit, a reset unit, a pull-down unit and a signal output; the pull-up unit is connected to said signal output and pulls up an output signal; the reset unit is connected to a control end of said pull-up unit and said signal output respectively and resets the potential of the control end of said pull-up unit after said output signal is at high level; the pull-down unit is connected to a control end of said pull-up unit and said signal output respectively and pulls down the potential of the control end of said pull-up unit and said output signal after said reset unit has reset the potential of the control end of said pull-up unit, so that said pull-up unit switches off.
US09589535B2
Disclosed is a social dress up game that may be a fun mobile app that may be played collaboratively with friends, using the photo capability of a mobile phone or smart mobile device. One player will separately take a picture of a friend, and then invite two friends to join. Each player will dress up one part or component of the whole body of the photo—head, body or legs. In the end, the three different parts will be merged into an interesting and unique image of their friend that they can also share with the game players. Since each game player would have worked on only that player's component, the resulting merged image will be a surprise to all players.
US09589533B2
A system displays graphics with an in-vehicle information system and a mobile electronic device. The in-vehicle information system receives encoded graphics data from the mobile electronic device and displays the encoded data with a graphical output device. The mobile electronic device executes program instructions to generate a series of graphics frames that are generated at a first frame rate and stored in an off-screen frame buffer in the mobile electronic device, generate encoded data corresponding to the series of graphics frames, and transmit the encoded data to the in-vehicle information system.
US09589523B2
A GOA circuit comprising GOA units and a liquid crystal display are disclosed. The N-staged GOA units charge the Nth-staged horizontal scanning line in the display region, and comprise N-staged pull-up control circuits, N-staged pull-up circuits, N-staged transfer circuits, N-staged pull-down circuits, and N-staged pull-down holding circuits. The N-staged pull-up circuits turn on when the Nth-staged gate signal point is at a high voltage level, receive a first clock signal and charge the N-staged horizontal scanning lines when the first clock signal is at a high voltage level. The N-staged transfer circuits receive a second clock signal when the Nth-staged gate signal point is at the high voltage level and output N-staged transfer signals to control the operation of the (N+1)-staged GOA units. The disclosure may ensure the scanning lines in the GOA circuit to be better charged for facilitating normal operation for each point in the circuit.
US09589521B2
A liquid crystal display apparatus having a wire-on-array structure is disclosed. The liquid crystal display apparatus has a plurality of driving IC units, a plurality of first conductive-wire sets and second conductive-wire sets. The driving IC units are arranged at intervals in a peripheral circuit area around the active area of the liquid crystal display apparatus. The first conductive-wire sets and the second conductive-wire sets are connected alternately between every two of the plurality of driving IC units. Each first conductive-wire set has a conducting structure for connecting to a common electrode. The arrangement of the first conductive-wire sets and the second conductive-wire sets facilitates achievement of thin bezel design.
US09589511B2
The present disclosure provides a backlight driving method and device and a display device, wherein the backlight includes a plurality of backlight scanning areas, each luminous body corresponding to each backlight scanning area is driven independently, including: acquiring display gray scale of a current frame of image and that of a previous frame of image in a backlight scanning area; determining a first backlight duty ratio according to the display gray scale of the current frame and that of the previous frame; if black frame insertion time in the first backlight duty ratio is smaller than a first black frame insertion time, acquiring a second backlight duty ratio, wherein black frame insertion time in the second backlight duty ratio is not less than the first black frame insertion time; determining drive timing of the luminous bodies in the current frame according to the second backlight duty ratio.
US09589505B2
An OLED pixel circuit includes a data strobe module, a threshold compensation module, a driving module, and a light-emitting module. Wherein, the data strobe module is used for inputting a data signal on a data signal line to the driving module under control of a scanning signal of a scanning signal line; the threshold compensation module is used for compensating a threshold voltage of the driving module; and the driving module is used for driving the light-emitting module to emit light according to the data signal provided by the data strobe module. The OLED pixel circuit can compensate shift and inconsistency of a threshold voltage of a transistor therein effectively, so that the drive current of the OLED will not affected by the threshold voltage of the transistor, making brightness of a display device more uniform.
US09589499B2
A display device and a method for controlling a luminance of the display device are disclosed. The display device includes an average picture level (APL) calculator which calculates an APL of an input image and outputs the APL of the input image and an APL curve data, a luminance adjuster which includes at least two luminance adjusting units enabled in response to a user input through a user interface and reduces a luminance of an APL section equal to or less than a predetermined reference value, a data modulator modulating data of the input image using a luminance defined in the APL curve data, and a display panel driving circuit which writes data from the data modulator on a display panel and reproduces the input image on the display panel.
US09589496B2
A method of accumulating data by a processor in a nonvolatile memory to track use of a device. The method includes: retrieving by the processor a next datum for accumulation into a first accumulation stored in the memory, the next datum representing a next use of the device; generating by the processor a next dither offset; adding by the processor the next dither offset to the next datum to produce a first sum; dividing by the processor the first sum by a scale factor to produce a quantized datum; and adding by the processor the quantized datum to the first accumulation. The first accumulation tracks the use of the device.
US09589489B2
The present invention discloses a probe frame for an array substrate detecting apparatus, the probe frame including a frame body and a signal distribution circuit board provided to the frame body, wherein the probe frame further includes: a circuit board provided to the frame body, the circuit board being provided with through holes, and the circuit board being provided therein with a plurality of signal transmission wires in a one to one correspondence with the through holes, one end of each signal transmission wire is inserted into its respective through hole and the other end thereof is electrically connected with an output end of the signal distribution circuit board; and a plurality of probes in a one to one correspondence with the through holes, wherein for each pair of the probe and the through hole, one end of the probe is inserted into the through hole so as to be electrically connected with the signal transmission wire within the through hole. Electrical connection between respective probes and the signal distribution circuit board are achieved through signal transmission wires in the circuit board, wiring on the probe frame is simple, and stability in signal connections between probes and the signal distribution circuit board can be improved. The present invention further provides an array substrate detecting apparatus including the above probe frame.
US09589482B2
Concepts and technologies are disclosed herein for bone conduction tags. According to one aspect of the concepts and technologies disclosed herein, a device can receive, via a transducer, a vibration signal from a body of a user. The vibration signal can be generated in response to the user interacting with a bone conduction tag. For example, the vibration signal can be generated in response to the user moving one or more fingers across the bone conduction tag. The device can analyze the vibration signal to determine an action that is to be performed. The device can perform the action or can instruct a further device to perform the action.
US09589480B2
In one embodiment, a method of providing a health coaching message to a user of a portable electronic coaching system includes receiving first data corresponding to a nutritional consumption of the user from the portable electronic coaching system of the user, receiving second data corresponding to a nutritional expenditure of the user from the portable electronic coaching system of the user, calculating, via a processor of the portable electronic coaching system, a nutritional value based on the first and second data, and receiving an electronic coaching message based on a comparison of the nutritional value to a predetermined value.
US09589470B2
An apparatus for detecting a vehicle running in a blind spot detects, with a predetermined accuracy, a first target position of a target which is present in a first detection area that extends obliquely rearward of the vehicle, detects, with an accuracy lower than the predetermined accuracy, a second target position related to a target which is present in a second detection area adjacent to the first detection area; calculates a first estimated position that corresponds to a subsequent position of the target that has been detected by the detection section as the first target position; and adopts the first estimated position as a position of the target when the first estimated position is included in a predetermined range centering on the second target position, adopts the second target position as a position of the target when the first estimated position is outside the predetermined range.
US09589469B2
A computer performs a process to determine whether an object is a predetermined object and a process to control a display unit to generate a first image based on a result of recognized object at a first timing and generate a second image based on a result of the recognized object at a second timing that is later than the first timing if the predetermined object is determined. The first image is an image formed by a pattern of markers representing a skeleton of the object, and the second image is an image formed by a pattern of markers corresponding to the pattern of markers in the first image, and the position of at least one marker of the pattern of markers in the first image differs from the position of the corresponding marker in the second image.
US09589468B2
A method, system and computer program product for allocating parking spaces for vehicles in a parking area. In one embodiment, the invention provides a system comprising a sensor system for generating output representing measurements of vehicles in the parking area, a marking system for identifying parking spaces in the parking area, and a controller for calculating parking spaces for vehicles. The controller obtains defined measurements for the vehicles in the parking area, and calculates for each of the vehicles, a respective one parking space in the parking area. Embodiments of the invention dynamically allocate parking spaces based on: (1) Determining the minimum space that should be enough for the size of the car that is being currently identified for parking; and (2) Maximizing utilization of space by preventing improper fragmentation, where because of allocating fixed size spaces to all cars, big/small/medium, fragments of space would be wasted.
US09589458B2
Methods and systems for utilizing a mobile computing device (e.g., such as a mobile phone) for use in controlling a model vehicle are described. Consistent with some embodiments, a mobile computing device provides various user controls for generating signals that are communicated to a radio transmitter device coupled with the mobile computing device, and ultimately broadcast to a receiver residing at a model vehicle. With some embodiments, the mobile computing device may be integrated with a controller housing which provides separate user controls, such that a combination of user controls present on the mobile computing device and the controller housing can be used to control a model vehicle.
US09589455B2
After start of pre-air-conditioning, when a preset set condition is satisfied, an in-vehicle terminal transmits information regarding a vehicle state and a screen display command for selection between continuation and termination of the pre-air-conditioning to a mobile terminal. The mobile terminal receives the screen display command and displays a notification indicating the vehicle state and a selection button for selection between the continuation and the termination of the pre-air-conditioning on a screen. After obtaining the vehicle state, the user selects whether to continue or terminate the pre-air-conditioning. In this manner, pre-air-conditioning suitable for each individual user can be performed.
US09589444B1
An electronic overload inspection and warning system for a roundsling having a strand positioned within a plurality of core strands and a cover. The system includes a wireless sensor system mountable to the roundsling. The wireless sensor system includes at least one strain gauge electrically connected with a wireless transmitter. The strain gauge measures strain on the strand. The system also includes a wireless base station and a carrier element. The wireless base station includes a wireless receiver configured to wirelessly communicate with multiple deployed wireless sensor systems. The carrier element is secured to the strand. The strain gauge is secured to the carrier element.
US09589438B1
A tag monitoring device configured to interface with a security tag adapted to be disposed on a corresponding product in a monitoring environment may include a transmitter, a receiver and processing circuitry. The transmitter transmits a periodic signal pulse during a transmit cycle. The receiver monitors for a response from the security tag after the transmit cycle. The processing circuitry is configured to control the receiver with respect to enabling the receiver to detect the response. The processing circuitry is configured to perform dynamic tuning of the receiver by calculating an average random noise level for a predetermined period of time, comparing the average random noise level to a first threshold and a second threshold, applying an incremental gain reduction in response to the average random noise level being greater than the first threshold, and applying an incremental gain increase in response to the average random noise level being less than the second threshold.
US09589437B2
Embodiments of the present disclosure provide a permissions-based alarm system for use in climbing environment. The permissions-based alarm system includes an identification device storing a permission setting relating to an aspect of the climbing environment and a detection module in communication with the identification device. The detection module detects the permission setting stored on the identification device and detects proximity of the identification device to an area restricted by the permission setting. When the identification device enters the restricted area of the climbing environment, an alert is provided.
US09589435B2
The disclosure is directed to providing a notification based on breaching a plurality of geo-fence perimeters. An embodiment detects a breach related to the plurality of geo-fence perimeters, the breach corresponding to a breach of one of the plurality of geo-fence perimeters, records the breach as one of a plurality of breaches, determines whether the plurality of breaches meet one or more conditions, and if the plurality of breaches meet the condition, issues a notification.
US09589434B2
Apparatus, systems and techniques associated with battery powered wireless camera systems. One aspect of the subject matter described in this specification can be embodied in a system that includes a battery powered wireless camera including an internal battery to provide energy and a burst transmission unit to transmit information during burst periods. The system includes a base station, separated from the battery powered wireless camera, in wireless communication with the battery powered wireless camera to receive information from the battery powered wireless camera. The base station is configured to process the received information and includes a web server to transmit the processed information to a client. Other embodiments of this aspect include corresponding systems, apparatus, and computer program products.
US09589428B2
A point-of-sale system includes a stand that supports a tablet computer. The tablet computer can run a merchant application to provide the typical functionality for a point-of-sale system. The stand can be rotatable to face either the merchant or the customer. The stand can incorporate a card reader. The tablet computer can be connected through a hub to other peripheral components, such as a controllable cash drawer, a printer and/or a bar code reader. The cash drawer can include a slidable drawer having sliding rails that are hidden from a top view of the drawer.
US09589420B2
A method of conducting a wagering game includes receiving a first wager amount from a player. The first wager amount initiating a first play of the wagering game. The first wager amount is deducted from an available-credits pool. An outcome of the first play is determined. In response to the outcome of the first play being a winning outcome, a credit amount associated with the winning outcome is added to the available-credits pool. Prior to a second play of the wagering game, it is determined that the available-credits pool is less than the first wager amount and, in response to that determination, an option to risk the available-credits pool is provided. The result of the risk being either (i) a triggering of the second play of the wagering game at the first wager amount or (ii) a reduction of the available-credits pool to zero.
US09589419B2
The present invention provides a gaming machine which is capable of realizing an appropriate balance between players' profits and slot machine providers' profits. When a first number of bets have been selected, a control device executes a first basic unitary game which completes when a first time interval has elapsed after starting the game. When a second number of bets have been selected, the control device executes a second basic unitary game which completes when a second time interval shorter than the first time interval has elapsed after starting the game. On the basis of the fact that the first basic unitary game has been executed, the control device executes a first progressive game in which a first payout rate can be realized. On the basis of the fact that the second basic unitary game has been executed, the control device executes a second progressive game in which a second payout rate higher than the first payout rate can be realized. When a second number of bets have been selected, information relating to the second payout rate is displayed.
US09589411B2
Systems, apparatus, methods, and articles of manufacture provide for modular vending systems utilizing reloadable product dispensing modules, including, but not limited to, vertical product dispensing modules comprising a vertical conveyor and a mounting structure for releasably engaging with module holder structures of modular vending machines, and a central controller device for communicating with a plurality of modular vending machines.
US09589409B2
A banknote handling apparatus that performs a depositing handling or a depositing/dispensing handling by transporting banknotes along a transport path includes a recognizing unit that recognizes an inserted banknotes; a deposit acceptability judging unit that determines, based on a recognition result obtained by the recognizing unit, whether the banknotes is acceptable for deposit; a reject reason identifying unit that identifies a reject reason of rejected banknotes that is determined to be unacceptable for deposit by the deposit acceptability judging unit; and a dispensing handling unit that sorts and dispenses the rejected banknotes based on the reject cause identified by the reject cause identifying unit.
US09589407B2
An apparatus for receiving and sorting disks includes a wheel having at least one well for receiving a disk, a motor coupled to the wheel, a collecting device positioned relative to the wheel, a disk sensor, an ejector, and a controller. The collecting device has at least a first collector and a second collector configured for receiving disks. The disk sensor is configured to detect a value of a parameter of a disk received in the well and generate a parameter value signal. The ejector is coupled to the wheel proximate the well and configured to eject a disk from the well in a plane parallel to a bottom surface of the wheel in response to an eject signal. The controller is operably coupled with the disk sensor and the ejector.
US09589404B2
A system includes a processor configured to determine that a number of invalid attempts to input a code into a vehicle door keypad has passed a predetermined threshold. The processor is also configured to notify a registered user through a vehicle telematics system of the invalid attempts and selectively ignore future attempts to input the code.
US09589396B2
A system is provided for controlling admission to a special admission zone of a live performance event for a plurality of patrons. The special admission zone is separate and distinct from a general admission area of the event and has a fixed maximum capacity. The duration of the event is divided into a plurality of predefined time periods. The system includes a set of patron-issued wristbands containing electronically writeable and readable RFID chips. The RFID chips of each wristband are electronically encoded with a respective unique serial number that is electronically associated with one of the plurality of predefined time periods. A processor is programmed to verify when each patron in possession of a wristband requests entry to the special admission zone and to initiate transmission of event video or event still images to a social media site or event video to a web channel upon successful verification.
US09589393B2
A system for determining a driver log entry comprises a processor and a memory. The processor is configured to determine a log start time. The processor is configured to determine a driver identity after the log start time. The processor is configured to determine whether a change to the driver identity has occurred based at least in part on a sensor data. In the event that the driver identity has changed, the processor is configured to determine a log stop time and determine a driver log entry using the log start time, the driver identity, and the log stop time.
US09589387B2
Disclosed herein are an image processing apparatus and an image processing method for realistically expressing an object. The image processing apparatus includes a volume data generator configured to generate volume data using received signals of an object, and a volume rendering unit configured to perform volume rendering using the volume data to acquire a projection image, and apply a subsurface scattering effect according to virtual lighting information, to the projection image with respect to a user's viewpoint to produce a final image.
US09589386B2
In one embodiment, a method for generating textured graphics includes identifying border colors of pixels around two texture images and generating arrangements of border texels from the border colors that are positioned next to the two images in a texture atlas. The method includes generating mip-maps of the texture atlas with texels in the jump level assigned with the border color of the corresponding textures in the full-resolution texture atlas instead of the averaged color of the textures that would be assigned using a traditional mip-map process. The method includes storing the texture atlas including the two texture images and the border texels in a memory for use in generating repeated textures on an object in a virtual environment using at least one of the texture images with a mip-map without seam artifacts between the repeated textures.
US09589382B2
Systems and methods for rendering an image using a render setup graph are provided. The render setup graph may be used to configure and manage lighting configuration data as well as external processes used to render the computer-generated image. The render setup graph may include a dependency graph having nodes interconnected by edges along which objects and object configuration data may be passed between nodes. The nodes may be used to provide a source of objects and object configuration data, configure visual effects of an object, partition a set of objects, call external processes, perform data routing functions within the graph, and the like. In this way, the render setup graph may advantageously be used to organize configuration data and execution of processes for rendering an image.
US09589372B1
A method for managing a content overlay. The method included a processor identifying a first image and a second image from an augmented reality (AR) device. The method further includes identifying a first element of interest within the first image. The method further includes associating a corresponding first AR content overlay for the first element of interest. The method further includes determining one or more differences between the first image and the second image, wherein the second image includes at least the first element of interest. The method further includes modifying a position of at least the first AR content overlay based, at least in part, on the one or more differences between the first image and the second image.
US09589369B2
A method and device for determining at least one set of matching attributes between a plurality of images is disclosed. Two dimensional images are projected to a three dimensional space then searched for matching attributes. Searching for corresponding attributes is much easier and computationally less intensive in the 3D space compared to a search in the 2D space. The method includes steps of projecting at least part of the images of said plurality to a 3-dimensional space resulting in a plurality of 3-D projected images (image1_3D, image2_3D), searching for at least one corresponding set of elements within the 3D projected images of the plurality of 3-D projected images, and calculating back said corresponding elements within the original images of the plurality and providing said corresponding elements within said original images as said at least one set of matched attributes.
US09589366B2
Graphics processing is performed in which a decision is made in individual tiles whether or not to sample at a reduced sampling rate. A sampling pattern is selected from a set of sampling patterns having the same reduced sampling rate. The sampling pattern is dithered over a set of frames to reduce the visual appearance of visual artifacts via temporal color averaging.
US09589365B2
A method and an apparatus for expressing a motion object are disclosed. The method includes obtaining a stereo image in which the motion object has been captured, the stereo image including a depth image; extracting a key point from the motion object in the stereo image; determining, based on statistical information relating to three-dimensional motion of pixels within a first predetermined region surrounding the key point, a dominant direction of the key point; determining, based on the dominant direction of the key point, motion vectors of pixels within a second predetermined region surrounding the key point to obtain rotation invariant motion vectors; and extracting, based on the determined motion vectors of the pixels within the second predetermined region surrounding the key point, a feature describing the key point. The present invention can extract features of motion object that are irrelevant to a viewing angle of a camera.
US09589364B2
Disclosed herein are an ultrasound imaging apparatus and a method for controlling the same. An occluded region generated in a 2D image may be removed by performing frame interpolation on a surface region of an object by extracting the surface region of the object from 3D ultrasonic volume data and calculating a motion vector in the extracted surface region, and an amount of calculation may be reduced by calculating a motion vector of the surface region in 3D volume data. The ultrasound imaging apparatus includes a volume data generator configured to acquire volume data which relates to the object, a surface region extractor configured to extract the surface region of the object based on the acquired volume data, and a frame interpolator configured to perform frame interpolation on the extracted surface region of the object.
US09589359B2
An apparatus, system, and method are described herein. The apparatus includes an emitter and a plurality of sensors. The emitter and the sensors are asymmetrically placed in the system with respect to the emitter. Data from the emitter and sensors is used to generate a high accuracy depth map and a dense depth map. A high resolution and dense depth map is calculated using the high accuracy depth map and the dense depth map.
US09589345B2
Systems and methods for accelerated arterial spin labeling (ASL) using compressed sensing are disclosed. In one aspect, in accordance with one example embodiment, a method includes acquiring magnetic resonance data associated with an area of interest of a subject, wherein the area of interest corresponds to one or more physiological activities of the subject. The method also includes performing image reconstruction using temporally constrained compressed sensing reconstruction on at least a portion of the acquired magnetic resonance data, wherein acquiring the magnetic resonance data includes receiving data associated with ASL of the area of interest of the subject.
US09589344B2
A controller has a function that: poygonizes and converts three-dimensional volume data, which is generated by a modality, into polygon data; divides this polygon data into a plurality of clusters; calculates an L2 norm vector of spherical harmonics as a feature vector with respect to each of the clusters based on the polygon data constituting each cluster; identifies whether each cluster is a target or not, based on each calculated feature vector and learning data; and displays an image of a cluster identified as the target at least on a screen.
US09589341B2
An information processor includes a detection unit detecting a photographic subject region of an image, a characteristic amount generation unit generating a characteristic amount including at least positional information of the photographic subject region for each of the detected photographic subject region, a combined characteristic amount generation unit generating a combined characteristic amount corresponding to the image by combining the characteristic amount generated for each of the photographic subject region, and an identification unit identifying a label corresponding to a combination of a photographic subject appearing in the image based on the generated combined characteristic amount.
US09589337B2
The present invention relates to an apparatus and method for recovering images damaged by weather phenomena, including: an input unit for receiving an image; a damaged image detection unit for detecting an image damaged by weather phenomena; an image recovery unit for recovering the damaged image; and an output unit for outputting the recovered image, wherein the damaged image recovery unit can recover the contrast and/or color of the damaged image.
US09589336B2
A method is based on first projection data, recorded during a relative rotational movement between an x-ray source of a CT device and at least one examination object lying partly outside the field of view of the CT device. Contour data of the surface of the examination object is useable to enhance the reconstruction of the incomplete first projection data. The spatial correlation between the first projection data and the contour data is known. The first projection data is expanded by way of the contour data to modified projection data, so that the modified projection data includes information about the contour of the examination object lying outside the field of view of the CT device. In an embodiment of the inventive reconstruction of image data by way of the modified projection data, fewer or no artifacts occur by comparison with reconstruction of image data from just the first image data.
US09589334B2
A system for automated tonal balancing, comprising a rectification server that groups and processes images for use in tone-matching and provides them to a tone-matching server, that then performs tone-matching operations on the images and provides them as output for review or storage, and methods for tonal balancing using the system of the invention.
US09589333B2
An image correction apparatus for correcting distortion of an image, the image being obtained by photographing a subject, which is provided with a specifying unit for specifying a relationship in position between points on the subject in a three-dimensional space based on both a relationship in position between the points on the subject in the image in a two-dimensional space and a photographing angle relative to a surface of the subject, an obtaining unit for obtaining information of distortion of the image that is reflected by the relationship in position between the points on the subject in the three-dimensional space, specified by the specifying unit, and a correcting unit for correcting the distortion of the image based on the information of distortion of the image obtained by the obtaining unit.
US09589328B2
A group point spread function (238) for a blurry image (18) can be determined by dividing the blurry image (18) into a plurality of image regions (232), estimating a region point spread function (234) for at least two of the image regions (232); and utilizing at least two of the region point spread functions (234) to determine the group point spread function (238). The group point spread function (238) can be determined by the decomposition of the estimated region point spread functions (234) into some basis function, and subsequently determining a representative coefficient from the basis functions of the region point spread functions (234) to generate the group point spread function (238).
US09589322B2
Briefly, the disclosure describes embodiments of methods or apparatuses for processing, such as smoothing, a set of labeled measurements at a variety of scale levels. In one or more non-limiting embodiments purely for illustrative purposes, relatively fine details of labeled measurements may be displayed utilizing a relatively low-scale map, such as a map showing individual towns and/or villages. For display utilizing a relatively higher scale map, such as a map showing larger geopolitical areas, for example, relatively fine details may be omitted.
US09589320B2
An image-pickup unit includes an image sensor and a color filter. Each filter segment of the color filter corresponds to one of a plurality of pixels of the image sensor, and the plurality of filter segments include first to Z-th (2L−1≦Z≦2L, where L is an integer equal to or larger than four) filter segments having spectral transmittances for transmitted wavelength bands different from each other among light from an object. Each pixel of the image sensor receives light of a plurality of wavelength bands. The plurality of filter segments are irregularly disposed.
US09589316B1
Described herein are technologies that facilitate computationally low-intensity creation of additional frames in a sequence of frames created by real-time three-dimensional (3D) rendering. More particularly, the technologies described herein generate an interposed two-dimensional (2D) screen-space projection (e.g., the resulting rendered image) in between a pair of fully rendered surrounding frames in a sequence of rendered frames. The interposed 2D screen-space projection is generated based upon information derived from the pair of surrounding frames.
US09589311B2
Techniques to saturate a graphics processing unit (GPU) with independent threads from multiple kernels are described. An apparatus may include a graphics processing unit driver for a graphics processing unit having a first partition including a first plurality of execution units and a second partition including a second plurality of execution units, the graphics processing unit driver to dispatch one or more threads of a first kernel to the first partition and to dispatch one or more threads of a second kernel to the second partition to increase a utilization of the plurality of execution units and avoid hardware resource competition.
US09589310B2
One embodiment of the present invention sets forth a technique for splitting a set of vertices into a plurality of batches for processing. The method includes receiving one or more primitives each containing an associated set of vertices. For each of the one or more primitives, one or more vertices are gathered from the set of vertices, the vertices are arranged into one or more batches, the batch is routed to a processing pipeline line to process each batch as a separate primitive, and the one or more batches are processed to produce results identical to those of processing the entire primitive as a single entity.
US09589308B2
Methods and apparatus for reproducing the appearance of a photographic print on a display device are disclosed. An environment model is built from received light conditions at a light sensor attached to a display surface. The environment model and a surface model are applied to an input image to generate an output image. The surface model represents reflective characteristics of a simulated surface on which display of the input image is simulated. The output image simulates an effect of the received light conditions on the input image as simulated on the surface.
US09589307B2
A method of selling absorbent articles wherein the absorbent articles are co-packaged sets of absorbent articles bearing similar and/or related graphics.
US09589304B2
Provided are method and system of providing a social network service (SNS) in which life cycle concepts of creatures are a motif. Particularly, user's personal connection information and relationships between users are separately expressed as a structure of a creature made in a graphic, and a non-disclosure information portion for private use and a disclosure information portion for public use are clearly divided.
US09589300B2
A method for completing a transaction is presented. The method comprises establishing network communications between a user and a server, receiving information, at the server, regarding the transaction, seeking available information pertinent to the transaction from at least one source external to the server and the user, processing data from the available information using a rules based engine including rules established on behalf of a party to the transaction located at the server, and presenting an offer set to the user based on at least one decision made by the rules based engine. The transaction may be one according to a variety of scenarios, and the user may be an appropriate party to the transaction. The user may employ various devices to contact the server and seek to complete the transaction.
US09589298B2
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for account authentication. A method includes receiving a user request to include financial data describing a financial account in an interface, the financial account being associated with a financial institution. The method further includes redirecting the user to a first webpage associated with the financial institution, where the user inputs into the first webpage login credentials for accessing the financial account. The method further includes, in response to the user inputting into the first webpage login credentials for accessing the financial account, receiving, from the financial institution, an access token other than the login credentials for accessing the financial account. The method further includes storing the access token for use in accessing and aggregating financial data describing the financial account.
US09589297B2
Disclosed herein are representative embodiments of methods, apparatus, and systems for distributing a resource (such as electricity) using a resource allocation system. One of the disclosed embodiments is a method for operating a transactive thermostatic controller configured to submit bids to a market-based resource allocation system. According to the exemplary method, a first bid curve is determined, the first bid curve indicating a first set of bid prices for corresponding temperatures and being associated with a cooling mode of operation for a heating and cooling system. A second bid curve is also determined, the second bid curve indicating a second set of bid prices for corresponding temperatures and being associated with a heating mode of operation for a heating and cooling system. In this embodiment, the first bid curve, the second bid curve, or both the first bid curve and the second bid curve are modified to prevent overlap of any portion of the first bid curve and the second bid curve.
US09589291B1
Systems and methods are provided for analyzing received item information for a number of items in order to determine whether each item is already included in an electronic catalog. The item information for each item may be analyzed in order to determine whether the received item information is a close match with any known item previously included in the electronic catalog. When close matches are found for one or more items, one or more modifications may be applied to at least a portion of the received item information in order to match stored item information for the corresponding close match. One or more rules associated with the determined modifications may then be generated and applied to receive item information for other items that fit certain determined criteria.
US09589287B2
Embodiments are directed towards providing analytics and marketplace data to members of a user community. In some embodiments, the analytics and marketplace data are generated based on machine data provided by the members. The analytics and marketplace data may enable automatically identifying, configuring, monitoring, controlling, managing, and/or maintaining a machine or a collection/system of machine components. The analytics may include, but are not limited to analytics related to machine component reliability, machine maintenance conditions, machine prohibited conditions, machine usages, machine alert conditions, and the like. The marketplace data may include information relating to the maintenance of the machine, replacement components or alternative components for the machine, and the like for various machines. Marketplace data may include an aggregation of electronic (e)-commerce data. The marketplace data may be provided is based on data aggregated from various sources, including vendors, suppliers, buyers, sellers, online auctioneers, or other members of the user community.
US09589279B2
A social networking system user interacts with a terminal associated with a brand, such as kiosk included in a retail location associated with the brand. The terminal provides authorization information to a user device that identifies the terminal and the brand associated with the terminal. Information identifying the user and the authorization information is communicated to the social networking system, which retrieves interactions between the user and objects associated with the brand in the social networking system. The retrieved interactions are communicated to the terminal, which generates content describing the user's interactions with the objects and presents the generated content to the user. A description of the user interaction and/or of the generated content may be communicated to the social networking system for distribution to additional users.
US09589265B2
A mobile payment method is to be implemented by a transaction device, and includes: receiving payment information, transmitting the payment information to a payment institution server, providing the payment information to a payment device, and receiving a payment result. The payment device is enabled to generate a payment request when the payment institution server determines that the payment information received from the payment device conforms to the payment information received from the transaction device, and to transmit the payment request to the payment institution server for subsequent processing of the payment according to the payment information included in the payment request.
US09589261B2
Embodiments of the invention relate to an invention for accessing a remotely located mobile device of a user based on certain events is provided. The system, method, and computer program product are configured to: (a) monitor one or more transaction involving a transaction vehicle of a user; (b) determine a physical location of a transaction vehicle based at least partially on the one or more transactions; (c) determine a geographic location of a mobile device of the user, wherein the mobile device is associated with the transaction vehicle; (d) determine whether or not the transaction vehicle of the user and the mobile device of the user are co-located; and (e) reconfigure one or more applications accessible to the mobile device or one or more functional features of the mobile device based at least partially on determining that the mobile device and the transaction vehicle of the user are not co-located.
US09589253B2
A workflow authoring system is described herein that provides a design-time authoring environment and a runtime component for displaying interactive, structured instructional content. The authoring environment provides custom controls, templates, and sample pages that allow authors to create a runnable workflow application. The application is a structured, interactive content type that provides users a better way to learn about data flows, workflows, and processes. The application also provides the ability to filter content based on specific actions the user takes, answers that the user provides, information that is retrieved from the user's environment, and so forth. This content model facilitates improved net satisfaction (NSAT) with software products, as users more readily find the information they are looking for and receive more dynamic instructional material. Authors that may not have programming experience can use the system to create rich, interactive content.
US09589252B2
The invention relates to systems, methods, and computer program products for rule-based maintenance of an archive. A system is provided that includes: a computing platform including a processor and a storage device, a database comprising rules relating to maintenance of information stored in an archive, a software module stored in the storage device comprising executable instructions that when executed by the processor cause the processor to: (a) receive information related to at least one event; (b) compare the information related to the at least one event to the rules relating to maintenance of information stored in the archive; and (c) determine whether to update information stored in an archive based at least partially on the comparison of the information related to the at least one event and the rules relating to maintenance of information stored in the archive.
US09589243B2
Methods and systems are provided for performing field project management. A user enters a request on a terminal device to initiate an automated field management process. In response to the request, a field management resource is generated and displayed to the user on the terminal device. The user is then directed to perform a plurality of tasks associated with the automated field management process in a specific order. Data associated with the field management resource is received from the user through the terminal device and analyzed. A field management report is then generated electronically based on the analyzed data and the field management resource. Data and reports are synchronized between a central server system and one or more terminal devices used by field users.
US09589241B2
In an exemplary embodiment of the present disclosure, an electrical system is provided. The system comprises a controller including a plurality of machine implemented processing sequences. The electrical system also includes a plurality of sensors configured to receive input related to the environmental conditions of the environment surrounding the plurality of sensors and transmit the input to the controller, at least one power source in electrical communication with the controller. The electrical system further includes at least one storage device in electrical communication with the controller, and at least one device sensor in communication with an end user. The at least one device sensor includes memory, and the memory includes priority information regarding the priority of a device associated with the at least one device sensor. The at least one device sensor is operable to transmit information to the controller.
US09589234B2
A missing case of a fixed scope can be detected among a plurality of business rules of unrestricted forms. According to one or more embodiments, the described detecting includes building a rules inhibition graph for the plurality of business rules representing a constraint model comprising a plurality of nodes and describing a plurality of cases which make the plurality of business rules non-applicable; labeling the rules inhibition graph with values satisfying constraints of the constraint model by search and inference and determining a missing case when a consistent labeling satisfying the constraints of the constraint model is obtained. Using one or more of the described embodiments missing cases which may result from unforeseen interactions of overlapping tests over an a priori unknown number of attributes among arbitrary business rules may be detected.
US09589232B2
A component in a graph-based computation having data processing components connected by linking elements representing data flows is updated by receiving a rule specification, generating a transform for transforming data based on the rule specification, associating the transform with a component in the graph-based computation, and in response to determining that a new rule specification has been received or an existing rule specification has been edited, updating the transform associated with the component in the graph-based computation according to the new or edited rule specification. A computation is tested by receiving a rule specification including a set of rule cases, receiving a set of test cases, each test case containing a value for one or more of the potential inputs, and for each test case, identifying one of the rule cases that will generate an output given the input values of the test case.
US09589228B1
Systems and methods for creating and revising information objects, such as proposed storylines, product descriptions, etc., are provided. In some examples, a computational linguistics program may be used to generate an information object, the fitness of which may be assessed using an AAI as the fitness function of an evolutionary algorithm. Satisfactory information objects may be forwarded for execution, e.g. production, whereas unsatisfactory objects may be refined by adapting the objects themselves and/or the algorithm used to generate the objects using evolutionary algorithm techniques.
US09589227B2
The present invention relates to a method and a corresponding apparatus for identifying a product (1) or information relating to the product (1). In the method, a concealed code on the product (1) is identified, wherein the code is given by a set of ellipsometric parameters, and the method comprises the following steps of: measuring ellipsometric variables for at least one defined point (8) on a surface (9) of the product (1), comparing the measured ellipsometric variables with at least one reference code, and determining a match between the measured ellipsometric variables and the reference code or one of the reference codes or determining a mismatch with each reference code.
US09589222B2
A non-transitory storage medium encoded with a computer readable information processing program executed by a computer with a near field wireless communication function is provided. The information processing program causes the computer to perform the steps of exchanging data with any proximate information storage medium and proceeding with game processing in accordance with a time difference between predetermined timing and one of timing at which exchange of data with the information storage medium is enabled and timing at which exchange of data with the information storage medium is disabled.
US09589219B1
In various example embodiments, a system and method for reading magnetic information by a mobile device are presented. In example embodiments, the mobile device comprises a housing having an integrated surface for swiping a magnetic swipe card and a magnetometer, positioned within the housing, for detecting direction and strength of magnetic fields to read magnetic information from a variety of sources and to produce digital magnetometer output signals. The digital magnetometer output signals represent magnetic information derived from the magnetic swipe card and from the Earth's magnetic fields (or other sources). Each of the digital magnetometer output signals having a magnitude related to the strength of the detected magnetic fields. The mobile device determines at least some of the digital magnetometer output signals represent the magnetic information derived from the magnetic swipe card and provides that information to a magnetic card application for processing. The mobile device determine at least some of the digital magnetometer output signals represent the magnetic information derived from the Earth's magnetic fields and provides that information to a compass application for processing.
US09589218B2
Method for the remote supply, display and/or presentation of dynamic informative contents by generating a QR code with a dynamic content, which provides to define a quantity n of a series of QR codes to be generated, to generate x URL addresses on the Internet, until x=n, to verify the univocity of each of the x URL addresses generated, by comparing them with a list of URL addresses, to generate n QR codes, each encoding the x=n URL addresses generated and verified as univocal, to assign a generated and univocal URL address to a specific accredited service user in a form that can be loaded and modified dynamically, to configure the generated and assigned URL address in order to display the informative contents, to optically acquire the QR code and to decode the encoded URL address, directing the user to the informative contents of the URL address.
US09589215B2
An image forming apparatus capable of properly reproducing, even when a setting operation is interrupted by a cause unintended by a user, settings desired by the user, and thereby improving the user-friendliness. In a case where a cause of interruption of a job setting operation is generated at a timing other than a predetermined timing, information on the displayed screen and information on the job settings are stored. When the cause of interruption has been removed, the stored screen information and information on job settings are read out, and the interrupted state of the job setting operation is reproduced.
US09589209B2
Some embodiments include a method of operating a computing device to learn user preferences of how to process digital images. The computing device can record a user image selection, associated with a user account, of at least one of digital image versions of a base digital image. The computing device can determine a context attribute to associate with the user image selection. The computing device can compute an image processing rule associated with the user account by applying machine learning or statistical analysis on multiple user image selections associated with the context attribute, the multiple user image selections including the user image selection.
US09589207B2
Techniques where a computer or mobile device performs video analysis of a person performing a physical activity are described. The computer or mobile device performs video analysis based on one or more reference skeletons. The reference skeleton may be superimposed over captured video of the person performing the physical activity or compared to a generated player skeleton based on the captured video to determine derivation from the reference skeleton in the physical activity performed by the person.
US09589202B1
Some aspects of the invention relate to a mobile apparatus including an image sensor configured to convert an optical image into an electrical signal. The optical image includes an image of a vehicle license plate. The mobile apparatus includes a license plate detector configured to process the electrical signal to recover information from the vehicle license plate image. The mobile apparatus includes an interface configured to transmit the vehicle license plate information to a remote apparatus and receive an insurance quote for a vehicle corresponding to the vehicle license plate in response to the transmission.
US09589197B2
A method quickly recognizes a person by identification codes derivable from biometric data includes registering a user, and recognizing a registered user, through a respective recognition event. Each registration event includes acquiring at least one biometric datum related to blood vessels of the user. The acquired biometric datum is encoded into a respective registration identification code and associated with the user. The user and the associated registration identification code are registered. Each recognition event includes acquiring biometric datum related to the user's blood vessels and encoding the acquired biometric datum into a respective recognition identification code. Based on the registered registration identification codes, a comparison set of comparison identification codes is prepared and compared. For each comparison, a matching level is estimated and the user is recognized or refused recognition based on the estimated matching levels.
US09589196B2
A mobile computing device may include a biometric sensor in proximity with a color-controlled layer. Where the color of the color-controlled layer may be changed, a processor of the mobile computing device may control the color of the color-controlled layer responsive to sensing various conditions. For example, the color of the color-controlled layer may be controlled, by default, to match the housing of the mobile computing device. Responsive to sensing an approaching user finger, the color-controlled layer may be controlled to change color. The color-controlled layer may be controlled to change color again upon contact of the finger, upon removal of the finger and upon determining authentication success. The color-controlled layer may be structured as a mix of heating elements and thermochromic polymer elements.
US09589195B2
A method using Long Wave Infrared Imaging Polarimetry for improved mapping and perception of a roadway or path and for perceiving or detecting obstacles comprises recording raw image data using a polarimeter to obtain polarized images of the roadway or area. The images are then corrected for non-uniformity, optical distortion, and registration. IR and polarization data products are computed, and the resultant data products are converted to a multi-dimensional data set for exploitation. Contrast enhancement algorithms are applied to the multi-dimensional imagery to form enhanced object images. The enhanced object images may then be displayed to a user, and/or an annunciator may announce the presence of an object. Further, the vehicle may take evasive action based upon the presence of an object in the roadway.
US09589192B2
Provided are an information processing system, an information processing method, and a program capable of favorably estimating the association between persons appearing in pictures. This information processing system includes: a correspondence relationship estimation unit for determining a scale indicating a possibility that one or more persons appearing in pictures captured respectively at a first time by a plurality of video cameras, and one or more persons appearing in pictures captured respectively at a second time, which is later than the first time, by the plurality of video cameras, are respectively associated with each other, and estimating a correspondence relationship between the person appearing at the first time and the person appearing at the second time in consideration of all scales relating to at least one person appearing at one of the first time and the second time, and all persons appearing at the other time; and a person-to-be-tracked registration unit for receiving an input of correspondence information to the effect that at least a part of one or more persons captured at the first time corresponds, or does not correspond, with at least a part of one or more persons captured at the second time.
US09589184B1
Provided herein are systems, methods and computer readable media for classification of documents using a location hierarchy. An example method may include receiving a feature vector r that represents occurrence counts of references in a document's text to each of a group of named entities, and determining whether the document is associated with the particular location by querying, to determine a query result, using feature vector r, at least one location-specific classifier from a group of location-specific classifiers, wherein the location-specific classifier is associated with the particular location, and wherein the location-specific classifier is configured to generate a positive output value in response to receiving an input feature vector representing occurrence count of at least one reference to the particular named entity and determining that the document is associated with the particular location in an instance in which the query result includes data indicating that the positive output value was generated by the location-specific classifier that is associated with the particular location.
US09589175B1
Subject matter disclosed herein relates to arrangements and techniques that provide for identifying objects within an image such as the face position of a user of a portable electronic device. An application specific integrated circuit (ASIC) is configured to locate objects within images. The ASIC includes an image node configured to process an image and a search node configured to search the image for an object in the image. The search node includes an integral image generation unit configured to generate an integral image of the image and a Haar feature evaluation unit configured to evaluate search windows of the integral image with respect to Haar-like features. The ASIC also includes an ensemble node configured to confirm the presence of the object in the image.
US09589165B2
A system and method for calibrating a barcode scanning tunnel comprises providing a scanning tunnel having a moveable surface, a camera, and a dimensioning device. Orientations of the dimensioning device and camera are estimated. Instances of a calibration object on the moveable surface are acquired by the dimensioning device and the camera, and a relationship is defined between the two devices. A calibration object is moved along the moveable surface through the devices' fields of view, controlling the camera's focal distance according to the relationship, so that the dimensioning device and the camera acquire instances of the calibration object, and the relationship is revised.
US09589157B2
A method for protecting an operation sequence executed by a portable data carrier from spying out, wherein the data carrier has at least a processor core, a main memory and a cache memory with a plurality of cache lines. The processor core is able to access, upon executing the operation sequence, at least two data values, with the data values occupying at least one cache line in the cache memory and being respectively divided into several portions so that the occurrence of a cache miss or a cache hit is independent of which data value is accessed. A computer program product and a device have corresponding features. The invention serves to thwart attacks based on an evaluation of the cache accesses during the execution of the operation sequence.
US09589146B2
An approach for hiding sensitive data in log files is provided. The approach uses a background program embedded within an operating system. The background program intercepts a write operation of an application and, in response to determining that the write operation is for a log file, gets content of the write operation. The background program checks a knowledge base that comprises information for the sensitive data and identifies the sensitive data in the content of the write operation. The background program masks the sensitive data in the content of the write operation, in response to determining that the content of the write operation has the sensitive data to be masked. In the log file, the background program writes modified content in which the sensitive data is masked.
US09589141B2
A method for detecting against unauthorized transmission of digital works comprises the steps of maintaining a registry of information permitting identification of digital copyrighted works, monitoring a network for transmission of at least one packet-based digital signal, extracting at least one feature from the at least one digital signal, comparing the extracted at least one feature with registry information and applying business rules based on the comparison result.
US09589133B2
Preventing return-oriented programming exploits by identifying a set of contiguous computer software instructions extending from a first location within a computer memory to a second location within the computer memory, where the set of computer software instructions includes a return-oriented programming gadget, copying the set of computer software instructions to extend from a third location within the computer memory to a fourth location within the computer memory, placing a branching instruction at the first memory location, where the branching instruction branches to the third location, appending a return branching instruction to the copy of the set of computer software instructions, where the return branching instruction branches to a fifth location within the computer memory that immediately follows the second location, and overwriting at least a portion of the return-oriented programming gadget between the first location and the second location.
US09589129B2
A source of side-loaded software is determined. An action may be performed in response to the determination of the source. In one case, the handling of an application on a mobile device may be based on whether the source of the application is trusted or untrusted. If a software application being newly-installed on a mobile device of a user is determined to be untrusted, installation or execution is blocked. In one approach, the determination of the source includes: determining whether a first source identifier of a first application matches a white list of source identifiers or a black list of source identifiers; and sending the first source identifier and a first application identifier for the first application to a different computing device.
US09589127B2
Systems and methods are disclosed for collaborative authentication of a person based on an interaction with another person. A request for collaborative authentication is sent to the computing device of a person wanting to access a system, including an authentication ID unique to the request. The person collaborates with another person associated with the system and provides the second person with the authentication ID. The second person sends the authentication ID to the system such that the system associates the second person with the first person. Data is sent to the second person in order to challenge the first person. The first person responds to the challenge using the computing device and the system receives the response. The system compares the response to an expected answer and can either allow or deny the first person access to the system based on the comparison. Co-location may also be verified.
US09589125B2
A 3D graphical password authentication method displays a 3D grid upon a user's request to access a restricted resource. The 3D graphical password authentication method requires the user to enter his or her access password by touching one or more intersections, namely touching the corresponding sensitive areas, on the 3D grid with an input device. A password is then produced as a sequence of the coordinates of the intersections touched along with penup values.
US09589117B2
A computer security system comprises a security module adapted to control access to a secure computer resource by a user via a client based on verification of a security credential provided by the user. The computer security system also comprises verification data disposed on the client and accessible by the security module. The security module is adapted to enable the user to recover the security credential based on a response received from the user associated with the verification data.
US09589114B2
This document describes policies for digital rights management that enable distribution of full-function versions of applications that, while fully functional, have functions limited by an associated policy. A policy may be replaced or updated, thereby enabling use of previously limited functions without distribution of another version of the application.
US09589109B2
A code signing system and method is provided. The code signing system operates in conjunction with a signed software application having a digital signature and includes an application platform, an application programming interface (API), and a virtual machine. The API is configured to link the software application with the application platform. The virtual machine verifies the authenticity of the digital signature in order to control access to the API by the software application.
US09589107B2
Methods and systems are described for monitoring patient speech to determine compliance of the patient with a prescribed regimen for treating for a brain-related disorder. Patient speech is detected with an audio sensor at the patient location, and speech data is transmitted to a monitoring location. Patient speech is processed at the patient location and/or monitoring location to identify speech parameters and/or patterns that indicate whether the patient has complied with the prescribed treatment regimen. Patient identity may be determined through biometric identification or other authentication techniques. The system may provide a report to an interested party, for example a medical care provider, based on whether (and/or the extent to which) the patient has complied with the prescribed treatment regimen. The monitoring system may transmit a report to a wireless device such as a pager or cell phone, generate an alarm or notification, and/or store information for later use.
US09589086B2
A method for measuring a surface structure of a chip or a wafer is provided that includes obtaining an image of the surface structure of the chip, and then performing an image extraction on the image to convert the extracted image into a first circuit design file. A standard image is selected to convert into a second circuit design file, and then the standard image and at least one target in the image are compared to obtain a difference therebetween. According to the difference, at least one data of the surface structure may be made, wherein the data is selected from one of line edge roughness (LER), line width roughness (LWR), contact edge roughness (CER), critical dimension (CD), bias, 3 sigma, maximum, minimum, etc. and repeating defect.
US09589085B1
A system, method, and computer program product for viewing analog simulation check violations in an EDA framework. Embodiments combine input data tables into a single data table for each check type using SQL inner join operations, create a SQL view of the single data table to list individual check violations, and output the view for user inspection of the corresponding check violations. Embodiments normalize the input data tables to include details of circuit nodes, elements, and paths implicated in the check violations. Additional views combine views of different check types into unified summary tables. Embodiments create a second view to aggregate individual check violations that involve the same circuit objects over time, and output the second view. Output views are self-describing, to enable a single graphical user interface to operate across multiple simulator versions. Metadata tables describe data types presented in various view columns, and user interactions allowed therewith.
US09589081B2
The invention relates to a method for simulating karstification phenomena in a karstic region, comprising a) defining a gridded geological model of the karstic region, in order to model a plurality of environments including a first environment described by values of at least one geological grid parameter, and a second environment described by values of edge parameters between two grid nodes, b) simulating stochastic displacements of particles in the grid of the geological model, the probability of each displacement of a particle being calculated taking into account values describing the environment within which the displacement is carried out, and c) modifying the values describing the first and/or second environment according to the courses taken by the particles.
US09589077B2
A method for designing a lens of a lighting device having a first spherical surface refracting light generated from an LED device that is a light source and a second spherical surface refracting the light passing through the first spherical surface includes determining an irradiation surface that is an area onto which light passing through the second spherical surface is irradiated, forming a reference circle disposed within the irradiation surface; designing a free curved surface of the first spherical surface by using light emitted from the LED device as an input direction vector and a coordinate within the reference circle as an output direction vector to calculate normal vectors, and designing a free curved surface of the second spherical surface by using light refracted by the first spherical surface as an input direction vector and a coordinate within the irradiation surface as an output direction vector to calculate normal vectors.
US09589073B2
Methods and systems for keyword spotting, i.e., for identifying textual phrases of interest in input data. The input data may be communication packets exchanged in a communication network. A keyword spotting system holds a dictionary (or dictionaries) of textual phrases for searching input data. The input data and the patterns are assigned to multiple different pattern matching algorithms. For example, a share of the traffic is handled by one algorithm and smaller traffic shares may be handled by the others. The system monitors the algorithms performance as they process the data to search for a match. The ratio of traffic splitting among the algorithms is dynamically reassigned or adjusted to maximize the overall performance.
US09589066B2
A method according to one embodiment includes outputting one page of a multipage compilation of information; receiving a request to show portions of multiple pages of the multipage compilation of information, the request originating from a user input device; selecting the portions of the multiple pages of the multipage compilation of information; generating a view having the selected portions; and outputting the view to a graphical display device.
US09589060B1
Computer-implemented systems and methods are provided for analyzing and responding to a query from a user. Consistent with certain embodiments, systems and methods are provided for receiving a query from the user and dividing the query into query segments based on a set of grammar rules. Further, systems and methods are provided for selecting a first segment from the query segments, receiving at least one tuple stored in association with the user, selecting a second segment from the at least one tuple. Additionally, systems and methods are provided for receiving information related to the first and second segments, and generating a response to the query based on the received information. In addition, systems and methods are provided for transmitting information to a display device for presenting the response to the user.
US09589055B2
Method and system for delivery of personal search services and advertising. The method includes collecting information from the user about the user's personal search engine, including, but not limited to digital content data sources, link crawl depth of those digital content data sources, and time interval to refresh the index of the digital content data sources created. In one embodiment of the present invention users do not pay a fee in return for allowing the provider to present advertising to the user as the user uses the invention. In another embodiment, advertisers purchase advertising display services from the provider to be displayed to specific users.
US09589043B2
A unified context-aware content archive system allows enterprises to manage, enforce, monitor, moderate, and review business records associated with a variety of communication modalities. The system may store an information infoset derived or inferred from one or more documents representing communications according to the variety of communication modalities as interaction transcripts. An interaction transcript represents interactions between participants through the documents rather than the documents themselves allowing for derivation or inference of communication events, chronologies, and mappings to be stored in a common data structure. In one aspect, events correlation is provided between participants of communications that can be established by general time series analysis for the purposes of extracting meaningful statistics and interaction contexts and other characteristics of data. In another aspect, chronological mappings are provided of conversations between an established start and end time frame.
US09589042B1
Disclosed are various embodiments for synchronizing application state information across devices. More specifically, embodiments of the disclosure are related to facilitating idempotency of application state information. Idempotency is maintained by using a timestamp embedded within application state information and/or by determining that the application state information is associated with an accumulating value.
US09589041B2
Techniques are provided for client and server integration for scalable replication. A replication client transmits change records to a database server over a stream. The database server determines at least one batch comprising change records for at least one transaction. The database server generates dependency data for at least one change record in a batch based on at least one constraint identifier for at least one column. The database server determines an ordered grouping of the change records based on an operation type of each change record and the dependency data of each change record, wherein change records sharing operation types are grouped together unless a division based on the dependency data is determined. The database server generates a reordered transaction comprising a plurality of reordered operations based on the ordered grouping of the change records of the particular batch.
US09589037B2
The present disclosure generally relates to computing methods and applications. A service platform includes standard functionalities that can be used in different applications, such as composite applications. The service platform includes a database that stores application specific information, which is mapped to the standard functionalities. To use these functionalities, different applications initialize relevant parts of the database and use predefined standards to access these functionalities.
US09589003B2
A sparse dataset structure is created by creating column vectors for one or more columns in a dataset that have at least one significant value. Each column vector includes data values for columns of the dataset. Each column vector that is a sparse column vector includes a look-up index array and a value array. Entries in the look-up index array represent columns. The value array includes values for a row in a column. Each entry in the value array points to a row entry in the look-up index array. A side structure includes a row index and a column index. The row index includes a location for an entry for each row where entries point to a location in the column index that identifies a column that has a first significant entry for a row. Alternatively a sparse dataset could be constructed with sparse rows.
US09589002B2
A method, of managing storage of content of a system (400) in storage units (430) including run units which do not allow spin-down functionality and spin-down units which allow spin-down functionality, comprises: establishing a storage tiering rule (702) which sets a policy indicating what content is eligible to be stored on a run unit and what content is eligible to be stored on a spin-down unit, the storage tiering rule being applicable to at least a group of the contents in the content system to determine stored content eligibility thereof for storage in the storage units and migration between the storage units; and identifying candidates of contents to migrate between the storage units (706), based on the storage tiering rule, state of the content system, and the stored content eligibility of the at least a group of the contents.
US09588998B2
Provided are techniques for determining whether a character code point value of a first plurality of character code point values corresponds to a second character code point value from a second plurality of character code point values, first value associated with a first encoding version and the second value associated with a second encoding. In response to the first value does not corresponding to any of the second character code point values, a determination is made as to whether the value corresponds to a third character code point value of a third plurality of code point values stored in a character value record table (CVRT). In response the value corresponding to the third value, an entry in the CVRT that associates the character with the third value is made; and the character is stored in conjunction with an application associated with the second encoding using the third value.
US09588991B2
An image search device includes a common memory and a plurality of parallel processors for executing a same instruction. The image search device transfers, from storage, a plurality of representative feature vectors, which respectively represent a plurality of clusters including a plurality of image feature vectors, stores, in the common memory, one or more query feature vectors extracted from an image serving as a query, calculates a distance between the plurality of transferred representative feature vectors and the query feature vector using the plurality of parallel processors, and selects one or more of a plurality of images based on a distance between the plurality of image feature vectors, which belong to the cluster selected by the calculated distance, and the query feature vector.
US09588990B1
Image similarity operations are performed in which a seed image is analyzed, and a set of semantic classifications are determined from analyzing the seed image. The set of semantic classifications can include multiple positive semantic classifications. A distance measure is determined that is specific to the set of semantic classifications. The seed image is compared to a collection of images using the distance measure. A set of similar images is determined from comparing the seed image to the collection of images.
US09588989B2
Search systems and computer-implemented search methods are described. In one aspect, a search system includes a communications interface configured to access a plurality of data items of a collection, wherein the data items include a plurality of image objects individually comprising image data utilized to generate an image of the respective data item. The search system may include processing circuitry coupled with the communications interface and configured to process the image data of the data items of the collection to identify a plurality of image content facets which are indicative of image content contained within the images and to associate the image objects with the image content facets and a display coupled with the processing circuitry and configured to depict the image objects associated with the image content facets.
US09588986B2
For data backup and recovery based on linked file repositories with each of the linked file repositories representing an individual file system capable of storing at least one version of a file and being connected to at least one server system, each of the linked file repositories are placed in a certain position for storing a certain version of the file. Each position of each of the linked file repositories is continuously numbered. A number of the versions of the file are determined by the position of the one of the linked file repositories.
US09588984B2
In some examples, a distributed file system is described. The distributed file system may include multiple data nodes and a director unit. The multiple data nodes may each include one or more data blocks. The director unit may include multiple master nodes configured in a peer-to-peer distributed architecture and operably coupled to the multiple data nodes. Each of the master nodes may be configured to receive a task related to managing data with respect to the distributed file system; to manage a distribution of the task among one or more of the plurality of master nodes; and to communicate a task status and a status of at least a part of the distributed file system to each of the other master nodes.
US09588976B1
Systems and methods for data storage management technology that optimizes the creation and storage of file objects. The method includes: receiving a request to create a file object; storing a first portion of the file object in a buffer in a first data storage; determining a location in a second data storage in view of a predicted size of the file object; migrating the first portion of the file object from the buffer to the location in the second data storage; and in response to receiving a second portion of the file object, storing the second portion in the second data storage without storing the second portion in the buffer in the first data storage.
US09588966B2
Technology is disclosed that improves language coverage by selecting sentences to be used as training data for a language processing engine. The technology accomplishes the selection of a number of sentences by obtaining a group of sentences, computing a score for each sentence, sorting the sentences based on their scores, and selecting a number of sentences with the highest scores. The scores can be computed by dividing a sum of frequency values of unseen words (or n-grams) in the sentence by a length of the sentence. The frequency values can be based on posts in one or more particular domains, such as the public domain, the private domain, or other specialized domains.
US09588950B2
A method is disclosed for assigning measurement data of a body of a patient to information data related to the same body. The method includes providing annotated measurement data, providing annotated information data, translating the first group of annotations into a first group of universal annotations and the second group of annotations into a second group of universal medical annotations in a universal annotation ontology management system, comparing the universal annotations of the first group of universal annotations with the universal annotations of the second group of universal annotations, and assigning the universal annotations to each other. An assignment system and a universal annotation ontology management system are also disclosed.
US09588949B2
Some examples described are directed to detecting that an object in a graphical user interface (GUI) obscures presentation of a first portion of a word below the object in a layering order of the GUI. A second portion of the word is displayed in the GUI. Some examples are further directed to evaluating the second portion of the word against a plurality of words prohibited for presentation via the GUI. Some examples are further directed to detecting, in response to evaluation of the second portion of the word against the plurality of words, that the second portion of the word is one of the plurality of words. Some examples are further directed to modifying presentation of the word in response to detection that the second portion of the word is one of the plurality of words prohibited for presentation via the GUI.
US09588942B2
An image processing apparatus includes a reception unit configured to receive specification of a plurality of material electronic documents and an instruction on generation of an integrated electronic document based on the plurality of material electronic documents, a display unit configured to, when the reception unit receives the instruction, display on a display unit a setting screen for receiving setting on the generation of the integrated electronic document from the plurality of material electronic documents before the integrated electronic document is generated, and a generation unit configured to, based on the setting received via the setting screen, generate the integrated electronic document from the plurality of material electronic documents.
US09588937B2
Embodiments of the invention relate to an array of processor core circuits with reversible tiers. One embodiment comprises multiple tiers of core circuits and multiple switches for routing packets between the core circuits. Each tier comprises at least one core circuit. Each switch comprises multiple router channels for routing packets in different directions relative to the switch, and at least one routing circuit configured for reversing a logical direction of at least one router channel.
US09588933B2
The present invention discloses a single wire serial interface (SSI) master module, including: a sample delay controlling unit, configured to send a delay instruction; the state machine unit, configured to wait, according to the delay instruction, for a delay period starting from a moment when an SSI master module completes sending the last bit of address information in a read operation frame, and then send a sample control signal to a selector unit; the selector unit, configured to enable a transmission channel with a sampling unit after receiving the sample control signal; and the sampling unit, configured to sample data information from an SSI slave module. In the present invention, the state machine unit delays sending the sample control signal, and the sampling unit is controlled to delay sampling the data information, which avoids a data reception error caused by slow discharging of an IO PAD.
US09588929B2
A peripheral component interface-express (PCI-E) standard selection setting system and microserver are disclosed, in which a selection controller selects an arrangement setting in storage elements to arrange the PCI-E control chip, whereby each of the second PCI-E standard ports is or is not arranged as an upstream PCI-E standard port, so that a single PCI-E standard control chip may arrange one of the multitude of PCI-E standard ports as an upstream PCI-E standard port, so that the upstream PCI-E standard port may have a data transmission with one of the multitude of system on chips (SOCs) connected with the PCI-E standard control chip.
US09588920B1
Methods and systems for sending and receiving information in a network are provided. The method includes configuring a port trunk as a PCI-Express function by an adapter, where the port trunk includes a plurality of network links that couple an adapter port to a port of another device; configuring the port of the other device for using the port trunk for sending and receiving information to and from the adapter port; transferring data by the adapter port on a same link for a write operation belonging to a same transaction for writing the data at a storage location; and receiving a confirmation for completing the write operation from the port of the other device after the data is written at the storage location, where the port of the other devices also uses a same link for sending information to the adapter port for the same transaction.
US09588915B2
A method of operating a system on chip (SoC) includes calculating a first residence time indicating an amount of time that at least one task resides in an execution queue in the SoC, wherein the at least one task is assigned to at least one core of a multi-core processor in the SoC, calculating a total unit residence time indicating an amount of time that all tasks other than the at least one task reside in the execution queue, calculating a second residence time for the at least one core by adding the first residence time of the at least one task and the total unit residence time, and adjusting at least one of an operating frequency and a voltage of the at least one core based on the second residence time.
US09588913B2
Embodiments of the present invention provide systems, methods, and computer program products for managing computing devices to handle an input/output (I/O) request. In one embodiment, the I/O request may eligible for performance throttling based, at least in part, on the associated importance level for performing the received I/O request and one or more characteristics of the received I/O request. Embodiments of the present invention provide systems, methods, and computer program products for throttling the I/O request and transmitting the I/O request to a storage controller.
US09588907B2
In a portable data carrier having a non-volatile memory, a memory controller and a memory interface, an effected initial operation of the data carrier is checked through a request to a security unit of the data carrier via a security interface connected to the security unit. For this purpose, the data carrier comprises a memory portion comprising the memory interface and a body portion comprising the security interface, which are interconnected such that the memory portion can be folded out of the body portion, so that simultaneously the memory interface is laid open for a connection to an end device and the electrical connection between the security unit and the security interface is disconnected irreversibly.
US09588905B2
Methods, systems, and computer program products are provided for optimizing selection of files for eviction from a first storage pool to free up a predetermined amount of space in the first storage pool. A method includes analyzing an effective space occupied by each file of a plurality of files in the first storage pool, selecting one or more of the plurality of files as one or more candidate files for eviction, based on the identified one or more data blocks, and evicting the one or more candidate files for eviction from the first storage pool to a second storage pool.
US09588901B2
Various systems and methods for caching and tiering in cloud storage are described herein. A system for managing storage allocation comprises a storage device management system to maintain an access history of a plurality of storage blocks of solid state drives (SSDs) managed by the storage device management system; and automatically configure each of a plurality of storage blocks to operate in cache mode or tier mode, wherein a ratio of storage blocks operating in cache mode and storage blocks operating in tier mode is based on the access history.
US09588890B2
The disclosed technology provides an electronic device includes a semiconductor memory that includes a first contact plug over a substrate; an interlayer dielectric layer located over the first contact plug and having a hole which exposes at least a portion of the first contact plug; a first electrode layer formed along a sidewall and a bottom surface of the hole to be in contact with the first contact plug; a variable resistance layer over the first electrode layer and structured to include (1) a first portion that extends along the sidewall of the hole in a direction perpendicular to the substrate and exhibits a variable resistance and (2) a second portion that is parallel to the bottom surface of the hole and does not exhibit a variable resistance, and a second electrode layer formed over the variable resistance layer.
US09588885B1
A method for collection instance resizing. The method may include identifying at least one collection object within a collection framework of a virtual machine. The method may also include determining the at least one identified collection object satisfies at least one preconfigured criteria. The method may further include determining a garbage collection cycle count associated with the at least one identified collection object exceeds a preconfigured threshold. The method may also include determining an occupancy ratio associated with the at least one identified collection object is less than a preconfigured shrink threshold. The method may further include restructuring the at least one identified collection object based on the at least one identified collection object satisfying the at least one preconfigured criteria, the garbage collection cycle count exceeding the preconfigured threshold, and the occupancy ratio being less than the preconfigured shrink threshold.
US09588878B2
A computer comprises an input unit configured to acquire an input operation; a first program execution unit configured to execute a computing program performing a computation based on the input operation acquired by the input unit; a test scenario storage unit configured to store a plurality of test scenarios for the computing program; and a second program execution unit configured to execute a monitoring program determining whether or not the input operation acquired by the input unit corresponds to any of the plurality of the stored test scenarios.
US09588867B2
An information processing device that is powered by a battery is provided. The information processing device includes a processor. The processor evaluates a virtual remaining capacity of the battery corresponding to each of a plurality of operating systems running on a hypervisor executed by the information processing device, by using characteristic information that indicates a characteristic of each of the plurality of operating systems and a physical remaining capacity value that indicates a physical remaining capacity of the battery. In addition, the processor reports, to each individual operating system of the plurality of operating systems, a virtual remaining capacity value obtained by evaluating the virtual remaining capacity of the battery corresponding to the individual operating system.
US09588860B2
Systems and methods are provided for generating a pseudo-random bit sequence at an output frequency using a clock signal operating at a first frequency that is lower than the output frequency. A first bit sequence of a particular type is generated using a clock signal operating at a first frequency. A second bit sequence is generated using the clock signal operating at the first frequency, where the second bit sequence is a delayed version of the first bit sequence. A delayed version of the first bit sequence is generated using the second bit sequence and another bit sequence, wherein the delayed version is delayed based on the particular type and a difference between the output frequency and the first frequency. The first bit sequence and the delayed version are combined to generate a pseudo-random bit sequence at the output frequency.
US09588856B2
Provided are a system, computer program, and method for restoring redundancy in a storage group when a storage device in the storage group fails. In response to detecting a failure of a first storage device in a storage group, wherein the storage group stores each of a plurality of extents in the first storage device and a second storage device to provide redundancy, a determination is made whether a spare storage device that has a storage capacity less than that of the storage group. One of the extents in a storage location in the second storage device that is beyond an upper limit of positions in the spare storage device is moved to a new storage location. The spare drive is incorporated into the storage group to provide redundant storage for the storage group, wherein the extents in the storage group are copied to the spare drive.
US09588848B2
Disclosed is a system and method for restoring modified data. An example method includes intercepting, by an activity tracking module, a request from a program to modify data; determining, by an analysis module, parameters of the intercepted request; generating, by the analysis module, a request to generate a backup copy of the data based on at least one of the determined parameters of the intercepted request; and generating and storing, by a backup module, the backup copy of the data in an electronic database.
US09588847B1
A method and system for recovering a corrupt virtual disk is discussed. A request to recover the disk may be received. A recovery snapshot for the last point-in-time the system was stable may be synthesized. A difference may be identified between that recovery snapshot and the corrupt disk. A virtual machine may communicate with both the difference and the corrupt disk, and the difference may be merged with the corrupt disk.
US09588845B2
A processor includes a storage configured to receive a snapshot of a state of the processor prior to performing a set of computations in an approximating manner. The processor also includes an indicator that indicates an amount of error accumulated while the set of computations is performed in the approximating manner. When the processor detects that the amount of error accumulated has exceeded an error bound, the processor is configured to restore the state of the processor to the snapshot from the storage.
US09588841B2
Provided are a method, system, and apparatus using reliability information from multiple storage units and a parity storage unit to recover data for a failed one of the storage units. A decoding operation of the codeword is performed in each of the storage units comprising the data storage units other than the target data storage unit and the parity storage unit to produce reliability information. In response to the decoding operation failing for at least one additional failed storage unit comprising the data and/or parity storage units other than the target data storage unit that failed to decode, reliability information is obtained for the data portion of the at least one additional failed storage unit. The reliability information obtained from the storage units other than the target data storage unit is used to produce corrected data for the data unit in the target data storage unit.
US09588827B2
Embodiments of the present invention provide a method, system and computer program product for single program code message retrieval for message queues. In an embodiment of the invention, a message queue data processing system can be configured for single program code message retrieval for message queues. The system can include a message queue executing in a host server and providing an API to applications communicatively coupled to the message queue over a computer communications network. The API exposed by the message queue can include a single program call including program code enabled to open a queuing resource in the message queue, to retrieve all messages in a message buffer from the queuing resource and to close the queuing resource.
US09588826B2
Embodiments of the invention provide a programming model for CPU-GPU platforms. In particular, embodiments of the invention provide a uniform programming model for both integrated and discrete devices. The model also works uniformly for multiple GPU cards and hybrid GPU systems (discrete and integrated). This allows software vendors to write a single application stack and target it to all the different platforms. Additionally, embodiments of the invention provide a shared memory model between the CPU and GPU. Instead of sharing the entire virtual address space, only a part of the virtual address space needs to be shared. This allows efficient implementation in both discrete and integrated settings.
US09588818B2
A parallel computer system includes a plurality of calculation nodes and a job management apparatus to allocate jobs to the plurality of calculation nodes. The job management apparatus includes a controller to execute a process including searching a vacant resource generated as a result of job allocation, the vacant resource including one or more of the plurality of calculation nodes each having a vacant state in a range between current time and a scheduled start time point of a certain allocated job, retrieving the job allocatable to the vacant resource, from the unallocated jobs when the vacant resource is found, and allocating the retrieved job to the vacant resource.
US09588815B1
An apparatus comprises at least one processing platform implemented using at least one processing device comprising a processor coupled to a memory. The processing platform comprises virtualization infrastructure, an assurance layer and an analytic layer. The assurance and analytic layers are configured to provide data collection and event management functionality to support automation relating to resources of the virtualization infrastructure and associated workloads. By way of example, the assurance and analytic layers illustratively comprise respective deterministic and indeterministic functional groupings of components. The functional groupings of components of the assurance and analytic layers are utilized to implement closed-loop remediation workflows and other types of automation relating to the virtualization infrastructure resources and their associated workloads.
US09588814B2
The present disclosure is directed to fast approximate conflict detection. A device may comprise, for example, a memory, a processor and a fast conflict detection module (FCDM) to cause the processor to perform fast conflict detection. The FCDM may cause the processor to read a first and second vector from memory, and to then generate summaries based on the first and second vectors. The summaries may be, for example, shortened versions of write and read addresses in the first and second vectors. The FCDM may then cause the processor to distribute the summaries into first and second summary vectors, and may then determine potential conflicts between the first and second vectors by comparing the first and second summary vectors. The summaries may be distributed into the first and second summary vectors in a manner allowing all of the summaries to be compared to each other in one vector comparison transaction.
US09588811B2
A method for analysis of thread latency includes: determining a thread of interest; computing a summation of time periods in which the thread of interest stays in a run queue to determine a thread in-run-queue time; computing a summation of time periods in which the thread of interest is preempted by other threads to determine a thread preempted time; and evaluating thread latency of the thread of interest according to the thread preempted time to the thread in-run-queue time.
US09588806B2
Methods and apparatus, including computer program products, are provided for transporting processes within a distributed computing system, such as a cluster. In one aspect, the computer-implemented method may receive an event at a first node. The event may correspond to a process instance for handling the received event. The process instance may be transported from a second node to the first node. The process instance may be transported from a persistence when the process instance is inactive and, when the process instance is active, the process instance may be persisted to enable transport to the first node. Related apparatus, systems, methods, and articles are also described.
US09588804B2
A portable computing device synchronously offloads tasks from a first processing resource to an alternative processing resource. Offload requests are centralized and communicated to a dispatch controller. The request defines the alternative processing resource and the location of items in a common or shared memory related to a thread that is desired to be transferred or dispatched from the primary processing resource to the identified alternative processing resource. The dispatch controller, in response to the request, creates a task dispatch packet that provides the information required to switch the context of the thread that was previously executing on the primary processing resource to the alternative processing resource. The common or shared memory space is leveraged to provide desired performance. Results generated by the alternative processing resource are available in the shared memory space upon return to the primary processing resource.
US09588803B2
Techniques for leveraging legacy code to deploy native-code desktop applications over a network (e.g., the Web) are described herein. These techniques include executing an application written in native code within a memory region that hardware of a computing device enforces. For instance, page-protection hardware (e.g., a memory management unit) or segmentation hardware may protect this region of memory in which the application executes. The techniques may also provide a narrow system call interface out of this memory region by dynamically enforcing system calls made by the application. Furthermore, these techniques may enable a browser of the computing device to function as an operating system for the native-code application. These techniques thus allow for execution of native-code applications on a browser of a computing device and, hence, over the Web in a resource-efficient manner and without sacrificing security of the computing device.
US09588801B2
An apparatus and method for improving the efficiency with which speculative critical sections are executed within a transactional memory architecture. For example, a method in accordance with one embodiment comprises: waiting to execute a speculative critical section of program code until a lock is freed by a current transaction; responsively executing the speculative critical section to completion upon detecting that the lock has been freed, regardless of whether the lock is held by another transaction during the execution of the speculative critical section; once execution of the speculative critical section is complete, determining whether the lock is taken; and if the lock is not taken, then committing the speculative critical section and, if the lock is taken, then aborting the speculative critical section.
US09588795B2
Various aspects of the disclosure relate to monitoring of resource usage in a virtualized environment, including usage of a physical processor that executes a virtual machine or an application of the virtualized environment. By monitoring physical computing resources (e.g., by number and type) that are used to execute a virtual machine or an application of the virtualized environment, a user may, for example, be informed as to when physical computing resources are used in excess or less than the limits set by the license. In some embodiments, additional actions may be taken to update the license to better satisfy the user's resource requirements or reduce the amount paid annually for ongoing technical services. To inform a user, or form the basis for the additional actions, a report may be generated that includes data describing how a virtual machine or application executed on the physical computing resources.
US09588793B2
Systems and methods for creating new virtual machines based on post-boot virtual machine snapshots. An example method may include: receiving a request to create a new virtual machine, identifying, in view of the request, a virtual machine snapshot, the virtual machine snapshot including one or more elements of an initialized virtual machine, determining an update efficiency metric with respect to the virtual machine snapshot, and in response to a determination that the update efficiency metric reflects that updating the virtual machine snapshot is relatively more efficient than creating a new virtual machine in lieu of the virtual machine snapshot, creating the new virtual machine in view of the virtual machine snapshot.
US09588789B2
A management apparatus deploys, when loads of one or more first virtual machines deployed on a first system satisfy a first load condition, one or more second virtual machines on a second system, and distributes processing of a business operation across the first and second virtual machines. The management apparatus allows a different second virtual machine to be added to the second system when, after the second virtual machines are deployed, the loads of the first virtual machines satisfy the first load condition and loads of the second virtual machines satisfy a second load condition. The management apparatus restricts the addition of the different second virtual machine to the second system when, after the second virtual machines are deployed, the loads of the first virtual machines satisfy the first load condition but the loads of the second virtual machines do not satisfy the second load condition.
US09588785B2
Systems and methods are disclosed for configuring a web application based on a general property hierarchy. An application property scheme including one or more property hierarchy levels may be generated based on values within a system configuration file. Each level defines configuration values for various properties associated with the web application. A property retrieval subsystem of the general property hierarchy may be used to look up configuration values from the appropriate hierarchy level(s) of the application property scheme in order to configure one or more properties of the web application during its execution. The values in the system configuration file may be changed and the changes may be reflected dynamically in the application property scheme without substantial interruption to the execution of the web application.
US09588779B2
A method, apparatus and computer program product that allows for maintaining correct states of all sub-components in a state machine, even as sub-components leave the state machine and later rejoin in some previous state. Preferably, this is achieved without requiring the system to remember the states of all sub-components or a log of every event that was fed into the state machine. Thus, the technique does not require any knowledge of the previous state of the sub-components nor the need to preserve a complete log of events that were fed into the state machine. The state machine may be used to enhance the operation of a technological process, such as a workload management environment.
US09588778B2
Embodiments of the present invention disclose a method, system, and computer program product for a JNI object access system. A computer receives a JNI reference and obtains the pointer data and call site of the referenced object. The computer determines whether a record of the object and call site exist and, if not, the respective records are created. The computer applies a heuristic analysis of the object and call site in which it determines whether the object is larger than a threshold size, whether the object is part of a particular region of the heap, whether the call site is associated with a read-only or a read-write function, and whether the object or call site has caused more non-moving garbage collections than a threshold number. Based on the heuristic, the computer either copies the object data or pins the object and any non-moving garbage collections are recorded.
US09588774B2
A common boot sequence facility is provided that enables a control utility (e.g., operating system, control program, or other standalone tool, as examples) to be booted in a plurality of configurations without changing the boot sequence. An operating system or other control utility uses the common boot sequence to be able to be booted in either a first architecture configuration that initializes in one architecture, e.g., ESA/390 and then switches to, for instance, another architecture, e.g., z/Architecture, for processing; or in a second architectural configuration that initializes and processes in the another architecture, e.g., z/Architecture.
US09588765B2
A processor includes a front end with logic to identify a multiplier, multiplicand, and mathematical mode based upon an instruction. The processor also includes a multiplier circuit to apply Booth encoding to multiply the multiplier and multiplicand. The multiplier circuit includes circuitry to determine leftmost and rightmost partial products of multiplying the multiplier and multiplicand using Booth encoding. The circuitry includes a most significant bit (MSB) array and least significant bit (LSB) array corresponding to the multiplier. The multiplier circuit also includes logic to selectively enable selectors of the circuitry to find partial products based upon the mathematical mode of the instruction.
US09588761B2
A maintenance toolkit for the implementation of computer programs is envisaged. The toolkit receives computer programs containing a plurality of modules. These modules contain a plurality of components. On reception of a computer program, the toolkit extracts metadata from the modules and the components present in the computer program, and then stores the metadata it in a local repository. The envisaged toolkit then creates a table identifying the components and modules inter-dependent and intra-dependent on each other and also creates a hierarchy table based on the identified dependencies. This allows the toolkit to create a dependency table which is then stored for future reference along with other corresponding information. When a user has any query related to any module or component present in the computer program, the toolkit accepts the query and creates reports based on the dependency data and user query. These reports are then provided to the user.
US09588759B1
Supplemental functionalities may be provided for an executable program via an ontology instance. In some embodiments, a computer program (e.g., an executable program or other computer program) associated with an ontology may be caused to be run. The ontology may include information indicating attributes for a set of applications. An instance of the ontology may be obtained, which may correspond to an application of the set of applications. Based on the ontology instance, supplemental information may be generated for the computer program. The supplemental information may be related to one or more functionalities of the application to be added to the executable program. The supplemental information may be provided as input to the computer program. The supplemental information, at least in part, may cause the one or more functionalities of the application to be made available via the executable program.
US09588754B2
Drag and drop operations are associated with the installation of web applications. In some instances, drag and drop operations include the selection of an icon associated with a URL in a web browser. When the selected icon is dragged to a taskbar of a desktop, a corresponding web application file is created.
US09588753B2
A method and a system environment are disclosed that allow for installation of an instance of an ensemble application into a container in excess capacity of an existing server and that allows the instance to coexist with a legacy application on the server and communicate with other instances of the ensemble application on other servers.
US09588750B2
A method, computer-readable storage medium, and computer system are provided. In an embodiment, install a first program product with an installation manager. Run a pseudo first program product while the first program product is installing. Perform functions of the first program product with the pseudo first program product while the first program product is installing.
US09588749B2
Creating a deployment package for deploying an application. The method includes identifying a configuration dataset. The method further includes identifying a plurality of target environments. The method further includes transforming the configuration dataset, during build time, for each of the target environments to create a plurality of different configuration datasets corresponding to the different target environments. The method further includes packaging the plurality of configuration datasets with a deployable application entity to create a package that can be deployed to a plurality of different targets to make application deployment across multiple targets more efficient.
US09588746B2
A compiler includes a vector instruction processing mechanism that generates instructions for vector instructions in a way that assures correct operation in a bi-endian environment, wherein the processor architecture contains instructions with an inherent endian bias. The compiler uses a code generation endian preference that is specified by the user, and that determines a natural element order. When the compiler processes a computer program, it generates instructions for vector operations by determining whether the vector instruction has an endian bias that matches the specified endian preference (i.e., the inherent element order of the vector instruction matches the natural element order). When the vector instruction has no endian bias, or when the endian bias of the vector instruction matches the specified endian preference, the compiler generates one or more instructions for the vector instruction as it normally does. When the endian bias of the vector instruction does not match the specified endian preference, the compiler generates instructions to fix the mismatch.
US09588744B2
Exemplary embodiments provide computer-implemented methods, computer-readable media, and systems for changing the identifier associated with an entity, such as a variable or function, in a portion of code. During editing, a reference may be maintained that identifies the location of each instance of the entity in the code. When the identifier associated with one instance of the entity is changed, the change in the identifier may be propagated throughout the code to change each instance of the identifier in the code. The identifier may be changed without interrupting the workflow of the user and without the need to change to a separate refactoring mode. In some embodiments, a syntactical analysis may be performed and some or all instances of the identifier may be changed based on one or more rules.
US09588741B2
An apparatus is provided for building an application. The apparatus may include at least one memory and at least one processor configured to generate a build of an application in a C Object-Oriented Programming Language. The processor is also configured to generate a unity file including a plurality of source files having references to one or more header files. At least two of the source files include references to a same header file. The processor is also configured to compile the unity file including the plurality of source files to obtain an object file. The processor is also configured to link the object file to generate an executable of the application. Corresponding computer program products and methods are also provided.
US09588740B1
An application term of a declarative programming language is provided for creating an application to be executed on a node in a cloud network. The application term is independent of an application configuration for the application prior to compilation of the application term and the application configuration is associated with the application at execution time. A resource term for preparing a resource for the application is provided independent of the application configuration prior to compilation and the application configuration prepares the resource of a selected node for the application at execution time. An action term for performing an action and a task term for performing a task of the action are provided independent of the application configuration prior to compilation. The terms are compiled and executed to build the application in the cloud network.
US09588739B2
Web API recommendations for a context of an application are provided. A ranked list of recommended Web APIs and a set of Web API recommendations regarding the context of the application is sent to a client device via a network. In response to determining that a selection of a set of Web APIs in the ranked list of recommended Web APIs was received, the set of Web APIs selected is added to the context of the application to generate a new context of the application. A display of a relationship among the set of Web APIs added to the new context of the application is sent to the client device via the network.
US09588737B2
A random number generating includes a light source to emit a luminous flux having light intensity distribution symmetrical about a center axis, and a plurality of single-photon detectors arranged at an equal radial distance from an extending line of the central axis of the light source to generate a bit value of either 0 or 1 according to whether a photon is detected or not.
US09588736B2
A logic circuit computes various modal interval arithmetic values using a plurality of arithmetic function units. A multiplexer gates the desired arithmetic values to a storage register.
US09588733B2
A system and method can support queue processing in a computing environment. A lazy sorting priority queue in a concurrent system can include a priority queue and one or more buffers. The one or more buffers, which can be first-in first-out (FIFO) buffers, operate to store one or more requests received from one or more producers, and move at least one message to the priority queue when no consumer is waiting for processing a request. Furthermore, the priority queue operates to prioritize one or more incoming requests received from the one or more buffers, and allows one or more consumers to pick up the requests based on priority.
US09588730B2
Techniques for displaying a multiuser augmented reality world on a first augmented reality device. Embodiments capture a visual scene for display. The visual scene includes a first user and wherein the visual scene is captured using one or more camera devices. Visual scene data for a second user is received from a second augmented reality device. Embodiments rendering a sequence of frames for display which depict the first user and the second user in an augmented reality world, where the depiction of the first user is based on the captured visual scene, and where the depiction of the second user is based on the received visual scene data.
US09588716B1
Backup operations for shared volumes are described. A shared volume is identified as used by a virtual machine scheduled for a backup operation by a first distributed system node. A second distributed system node is identified that has a responsibility for sending control signals to the shared volume. An association is saved of the second distributed system node to the shared volume. The responsibility for sending control signals to the shared volume is assigned to the first distributed system node. The backup operation is executed for the shared volume by the first distributed system node. The responsibility for sending control signals to the shared volume is assigned to the second distributed system node.
US09588707B2
An approach for object storage power consumption optimization in a networked storage environment is provided. In a typical embodiment, a plurality of memory devices are organized into pods having a predetermined number of memory devices and to which redundantly replicated objects are intelligently placed. At least one pod is activated in a read-write configuration, such that data written to the networked storage environment is written to this pod. At least one other pod is a deactivated pod, which has at least one designated memory device in a read-only configuration and a remainder of devices in a deactivated state. Requests for data contained in this deactivated pod are serviced by the designated memory device in the read-only configuration. In some embodiments, the activated and deactivated pods are rotated based on an event.
US09588706B2
Embodiments of the present invention provide systems and methods for selectively dumping memory by using usertokens to specify an address range from 64-bit storage to be included or excluded from a memory dump. Embodiments of the present invention can be used to reduce the requirement for programs to manage lists of address ranges which represent pertinent data for applications.
US09588704B2
According to certain aspects, a system can include a client computing device configured to: in response to user interaction, store an identifier associated with a first tag in association with a first file; and in response to instructions to perform a secondary copy operation, forward the first file, a second file, and the identifier associated with the first tag. The system may also include a secondary storage controller computer(s) configured to: based on a review of the identifier associated with the first tag, identify the first file as having been tagged with the first tag; electronically obtain rules associated with the first tag; perform on the first file at least a first secondary storage operation specified by the rules associated with the first tag; and perform on the second file at least a second secondary storage operation, wherein the first and second secondary storage operations are different.
US09588701B2
A method performed by a data storage device includes receiving, from a host device, a first instruction of a first set of instructions to write a first group of pages of data to a memory of the data storage device and receiving a second instruction of the first set of instructions to write the first group of pages of data. A first stage of a multi-stage programming operation is performed at a first physical address of the memory using a first copy of the first group of pages, and a second stage of the multi-stage programming operation is performed at the first physical address of the memory using a second copy of the first group of pages. The first copy and the second copy are received from the host device in association with the first instruction and the second instruction, respectively.
US09588688B2
Embodiments of the present invention provide systems and methods for selectively dumping memory by using usertokens to specify an address range from 64-bit storage to be included or excluded from a memory dump. Embodiments of the present invention can be used to reduce the requirement for programs to manage lists of address ranges which represent pertinent data for applications.
US09588682B2
A thumb operated keyboard device provides a keyboard which can be held such that a user's thumbs are free and positioned to manipulate keys on the keyboard. The device includes a rectangular panel. Each of a plurality of keys is positioned on a front face of the panel. The panel is configured for operationally coupling to a computer such that the computer receives input from manipulation of the keys on the panel. Each of a plurality of pads is coupled to a peripheral edge of the panel. Each of the pads is positioned to extend around an associated corner of the panel to abut a user's fingers such that the panel is holdable in a stable position with the user's thumbs positioned proximate the front face to manipulate the keys. Alternatively, projections extend from a back face of the panel to facilitate holding the panel.
US09588679B2
Various embodiments utilize a layout viewport and a visual viewport separate from the layout viewport. The layout viewport is utilized for such things as page layout operations and reporting Document Object Model values to script. The layout viewport can be thought of as an initial rectangle which is equivalent in size to the initial containing block. The initial containing block is a containing block that contains web content that is initially visible to the user. The visual viewport is separate from the layout viewport and is allowed to be freely manipulated relative to the layout viewport. For example, the visual viewport may “push” the layout viewport around when it collides with the layout viewport boundaries. The visual viewport can be thought of as the rectangle that is visible to the user.
US09588676B1
Methods and apparatus include determine velocity of a detected presence in a first direction relative to a capacitive sensing surface, during a period of time, and determine velocity of the detected presence in a second direction relative to the capacitive sensing surface, during the period of time. Methods and apparatus detect a change in the determined velocity in the first direction at a first time, detect a change in the determined velocity in the second direction at a second time; and recognize a user command based on a difference between the first time and the second time.
US09588663B2
A system and method of delivering an interactive video application includes identifying a hotspot in a portion of a video content. A hypercode object is overlaid on the hotspot at a spatial point. The hypercode object is displayed at a temporal point during playback of the video content. An interactive application is provided to a viewer of the video in response to activation of the hypercode object.
US09588658B2
A display information controlling apparatus and method are provided. The display information controlling apparatus may select at least one object from one or more objects based on a location of each of the one or more objects on a display and a location on the display corresponding to a user input signal. The display information controlling apparatus may perform a predetermined operation corresponding to the selected at least one object.
US09588640B1
In one embodiment, the User Interface (UI) provides a live stream from the webcam, with markers on the side indicating the stored, detected important events (such as by using a series of bubbles indicating how long ago an event occurred). The indicators are marked to indicate the relative importance, such as with color coding. Upon selection of an indicator by the user, the time-lapse summary is displayed, along with a time of day indication. Alternately, the user can select to have a time-lapse display of all the events in sequence, using a more condensed time lapse, with less important events having less time or being left out.
US09588634B1
A software solution framework system, method, and computer program product are provided for allowing interaction with business and technical aspects of a software application. In use, an interface is provided to a software solution framework accessible to a plurality of users for interacting with information relating to a plurality of different business and technical aspects of a software application. Input is received from at least one of the users relating to at least one of the business and technical aspects of the software application, utilizing the interface to the software solution framework. Further, in response to the input, output relating to the at least one of the business and technical aspects of the software application is provided, utilizing the interface to the software solution framework.
US09588630B2
An electrostatic capacitance-type input device in which input position detecting electrodes are disposed in an input area of a substrate, includes a lower layer-side conductive film, an interlayer insulating film, and an upper layer-side conductive film, which are stacked on the substrate in order from the substrate side. A first input position detecting electrode and a second input position detecting electrode are formed as the input position detecting electrodes by a first conductive film out of the lower and upper layer-side conductive films. A relay electrode overlaps with the first input position detecting electrode in the intersection portion to be electrically connected to the discontinued portion of the second input position detecting electrode. An input area shield electrode that overlaps with the first and second input position detecting electrodes are formed by a second conductive film out of the lower and upper layer-side conductive films.
US09588623B2
A touch sensor comprises first and second touch electrode stings. Each first touch electrode string comprises the same number of first touch electrodes in a first direction. Two adjacent first touch electrodes connect by a first or second conductive bridge. The resistance of the bridges is different to adjust the mutual capacitance such that the mutual capacitance or the difference of the mutual capacitance of the first touch electrode strings is the same or within a first predetermined range. Each second touch electrode string comprises the same number of second touch electrodes arranged in a second direction. Two adjacent second touch electrodes connect by a third or forth conductive bridge. The resistance of the bridges is different to adjust the mutual capacitance such that the mutual capacitance or the difference of the mutual capacitance of the second touch electrode strings is the same or within a second predetermined range.
US09588622B2
A single layer capacitive touch module including a sensor dot matrix is provided. The sensor dot matrix has M×N sensor dots formed by M driving lines intersecting N sensing lines. Each one of the sensing lines and M driving lines forming a sensor zone, wherein each sensor zone comprises M sensor dots, M and N are positive integers. A driving unit is coupled to the driving lines. A first soft board has a lead-in area on a first side thereof to be coupled with the driving lines on a first side of the sensor dot matrix. A second soft board has a lead-in area on a first side for being coupled with the driving lines and sensing lines on a second side of the sensor dot matrix opposite the first side of the sensor dot matrix.
US09588606B2
The present invention is a transparent conductive film having a flexible transparent base and a transparent conductive layer made of a crystalline conductive metal oxide that is formed on one surface of the flexible transparent base, in which the thickness of the flexible transparent base is 80 μm or less, and the difference H1−H2 between the dimensional change rate H1 when the transparent conductive film is heated at 140° C. for 30 minutes and the dimensional change rate H2 when the transparent conductive layer is removed from the transparent conductive film by etching and the transparent conductive film is heated at 140° C. for 30 minutes is −0.02 to 0.043%. Because of that, the level difference at the pattern boundary when the film is assembled into a touch panel, etc. is decreased and the deterioration of the appearance can be also suppressed.
US09588602B2
Disclosed herein are a liquid crystal display device and an electronic pen system using the same. The liquid crystal display device includes an infrared reflection layer configured to reflect infrared irradiated thereto, the infrared reflection layer including an information pattern having virtual grid lines and a plurality of marks; and a liquid crystal layer formed on the infrared reflection layer and configured to be changed an orientation of liquid crystal molecules by an external pressure.
US09588597B2
An optical pointing device for detecting the direction of the user's finger is provided. The optical pointing device comprises a cover, a light source and a sensor. The cover comprises a press portion with a first surface and a second surface opposite the first surface, as well as a side wall extending downwards from the periphery of the second surface. The light source projects a main beam onto the press portion of the cover. The main beam then forms a first beam passing through the press portion and a second beam reflected by the second surface. The sensor is adapted to receive the second beam reflected by the second surface, and detect the second beam by an algorithm to output the first displacement position. In addition, the light source and the sensor are covered by the cover, while the side wall is a flexible side wall.