Invention Grant
US09590599B1 Clock distribution for flip-flop circuits 有权
触发器电路的时钟分配

  • Patent Title: Clock distribution for flip-flop circuits
  • Patent Title (中): 触发器电路的时钟分配
  • Application No.: US14879878
    Application Date: 2015-10-09
  • Publication No.: US09590599B1
    Publication Date: 2017-03-07
  • Inventor: Vibhu Sharma
  • Applicant: NXP B.V.
  • Applicant Address: NL Eindhoven
  • Assignee: NXP B.V.
  • Current Assignee: NXP B.V.
  • Current Assignee Address: NL Eindhoven
  • Main IPC: H03K3/3562
  • IPC: H03K3/3562 H03K3/037
Clock distribution for flip-flop circuits
Abstract:
An apparatus is disclosed that includes a clock distribution circuit configured to shift a first clock signal in the first voltage domain to a second voltage domain to produce the second clock signal. The second voltage domain extends outside of the first voltage domain. A set of flip-flops operating in the first voltage domain, each including a master latch, a slave latch, and a clock node is coupled to receive the second clock signal. Each flip-flop includes a master pass transistor configured to pass a value from an input of the flip-flop to an input of the master latch when the second clock node is set to a first value. Each flip-flop also includes a master pass transistor configured to pass the value from an output of the master latch to an input of the slave latch when the second clock node is set to a second value.
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