Invention Grant
US09590081B2 Method of making a graphene base transistor with reduced collector area
有权
制造具有减小的集电极面积的石墨烯基晶体管的方法
- Patent Title: Method of making a graphene base transistor with reduced collector area
- Patent Title (中): 制造具有减小的集电极面积的石墨烯基晶体管的方法
-
Application No.: US14952422Application Date: 2015-11-25
-
Publication No.: US09590081B2Publication Date: 2017-03-07
- Inventor: Francis J. Kub , Travis J. Anderson , Andrew D. Koehler
- Applicant: The United States of America, as represented by the Secretary of the Navy
- Applicant Address: US DC Washington
- Assignee: The United States of America, as represented by the Secretary of the Navy
- Current Assignee: The United States of America, as represented by the Secretary of the Navy
- Current Assignee Address: US DC Washington
- Agency: US Naval Research Laboratory
- Agent Stephen T. Hunnius
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/732 ; H01L29/16 ; H01L29/66 ; H01L29/267 ; H01L29/76 ; H01L29/165 ; H01L29/737 ; H01L29/08 ; H01L29/20
Abstract:
A method of making a graphene base transistor with reduced collector area comprising forming a graphene material layer, forming a collector material, depositing a dielectric, planarizing the dielectric, cleaning and removing the native oxide, transferring a base graphene material layer to the top surface of the graphene material layer, bonding the base graphene material layer, and photostepping and defining a second graphene material layer. A method of making a graphene base transistor with reduced collector area comprising forming an electron injection region, forming an electron collection region, and forming a base region. A graphene base transistor with reduced collector area comprising an electron emitter region, an electron collection region, and a base region.
Public/Granted literature
- US20160087087A1 METHOD OF MAKING A GRAPHENE BASE TRANSISTOR WITH REDUCED COLLECTOR AREA Public/Granted day:2016-03-24
Information query
IPC分类:
