A processor receives a deadlock detection message transferred between a plurality of controlled devices so as to be transferred between a plurality of nodes along a first link and a second link, and determines whether a deadlock has occurred on the basis of a history of the deadlock detection message. The plurality of nodes are combined using the first link extending from a first node to a second node and the second link extending from a third node to a fourth node. The first node corresponds to a first controlled device whose control right a first terminal has. The second node corresponds to a second controlled device whose control right the first terminal has. The third node corresponds to a third controlled device whose control right a second terminal has. The fourth node corresponds to a fourth controlled device whose control right the second terminal waits to be given.