Invention Grant
US09590079B2 Use disposable gate cap to form transistors, and split gate charge trapping memory cells
有权
使用一次性栅极盖形成晶体管，并分离栅极电荷捕获存储单元
- Patent Title: Use disposable gate cap to form transistors, and split gate charge trapping memory cells
- Patent Title (中): 使用一次性栅极盖形成晶体管，并分离栅极电荷捕获存储单元
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Application No.: US14742201Application Date: 2015-06-17
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Publication No.: US09590079B2Publication Date: 2017-03-07
- Inventor: Chun Chen , Mark Ramsbey , Shenqing Fang
- Applicant: Cypress Semiconductor Corporation
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: H01L29/792
- IPC: H01L29/792 ; H01L21/332 ; H01L29/66 ; H01L27/115 ; H01L29/423 ; H01L21/28 ; H01L27/105
Abstract:
A semiconductor device and method of making such device is presented herein. The method includes disposing a gate layer over a dielectric layer on a substrate and further disposing a cap layer over the gate layer. A first transistor gate is defined having an initial thickness substantially equal to a combined thickness of the cap layer and the gate layer. A first doped region is formed in the substrate adjacent to the first transistor gate. The cap layer is subsequently removed and a second transistor gate is defined having a thickness substantially equal to the thickness of the gate layer. Afterwards, a second doped region is formed in the substrate adjacent to the second transistor gate. The first doped region extends deeper in the substrate than the second doped region, and a final thickness of the first transistor gate is substantially equal to the thickness of the second transistor gate.
Public/Granted literature
- US20150287812A1 Use Disposable Gate Cap to Form Transistors, and Split Gate Charge Trapping Memory Cells Public/Granted day:2015-10-08
Information query
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