US09722940B2
A method for implementing the application for speaking right of a Long Term Evolution (LTE)-based broadband trunking system, a Mobility Management Entity (MME), a network subsystem, a broadband wireless access subsystem and the LTE-based broadband trunking system are disclosed. The method includes: the broadband wireless access subsystem sending a trunking speaking right update request to the network subsystem, receiving the trunking speaking right update accept message returned by the network subsystem, and sending the trunking speaking right update accept message to a speaking right seizing terminal; and the broadband wireless access subsystem receiving the speaking right occupation prompt message sent by the network subsystem, and sending the trunking speaking right occupation prompt message and updated configuration information via a multicast control channel of an enhanced Multimedia Broadcast Multicast Service (eMBMS).
US09722937B2
In some embodiments, a motor drive system includes a communication subassembly electrically coupled to a control subassembly for providing communication between the control subassembly and at least one external device. The control subassembly and the communication subassembly transmit and receive control data independently of messaging data, greatly enhancing performance and reducing the workload of processors on the control subassembly and communication subassembly. Additionally, the control subassembly and the communication subassembly transmit message data via sequence count based messaging. Communications between the communication subassembly and the control subassembly may include a series of timeout periods and retries, increasing reliability.
US09722935B2
A communications controller is provided. The communications controller includes a flow manager that classifies a packet flow serviced by more than one transmission points (TPs) as one of a plurality of slices in accordance with at least one of a nature of the packet flow, a load status of each of the plurality of slices, and feedback information provided by the more than one TPs, and alters a classification of the packet flow in accordance with the load status of each of the plurality of slices, and feedback information provided by the TPs served by the communications controller. The communications controller also includes a memory coupled to the flow manager, the memory stores a packet of the packet flow in one of a plurality of packet queues in accordance with the classification of the packet flow.
US09722933B2
A data flow is received at a network processor that includes a plurality of frames. A first set of frames in the plurality of frames are passed from the network processor to a general processor for processing by the general processor. A flow acceleration request is received at the network processor from the general processor based at least in part on inspection of a first frame in the first set of frames. The flow acceleration request is received subsequent to passing at least two of the first set of frames to the general processor. A particular frame in the plurality of frames received subsequent to the first set of frames is processed by the network processor such that it is accelerated relative to processing of the first set of frames by the general processor and bypasses the general processor.
US09722928B2
In one embodiment, a link utilization threshold is assigned to a first link. Link utilization of the first link and of one or more second links is monitored. The first link is considered to be out-of-policy (OOP) in the event that the link utilization of the first link surpasses the link utilization threshold. In response to the first link being considered OOP, action is taken. An excess utilization of the first link is determined. One or more prefixes currently routed over the first link whose collective per prefix utilization exceeds the excess utilization are determined. Provided that the collective per prefix utilization of the one or more prefixes currently routed over the first link, if added to the link utilization of the one or more second links, would not cause the one or more second links to be considered OOP, the one or more prefixes are redirected over them.
US09722925B2
A method and apparatus of a device that exports Border Gateway Protocol (BGP) data in sFlow samples. The device generates separate tables for BGP attribute information, community list information, and autonomous systems path (AS_PATH) attribute information, where each entry in the BGP attribute information table is associated with an entry in the community list information table and an entry in the AS_PATH attribute information table. The device further populates a BGP route information table that defines a mapping from a network address prefix to an entry in the BGP attribute information table. The device generates a sFlow sample related to the network address prefix using the BGP attribute information table, the community list information table, the AS_PATH attribute information table, and the BGP route information table.
US09722920B2
An apparatus generates routing data that defines, in a system in which a plurality of switches are connected to each other in a tree-shaped structure, a communication route between a plurality of end switches located at a lower level in the tree-shaped structure and a plurality of upper-level switches located at a level higher than the plurality of end switches in the tree-shaped structure, so that a first upper-level switch that switches communication data from a first node connected to a first end switch among the plurality of end switches to a second node connected to a second end switch among the plurality of end switches is identical with a second upper-level switch that switches communication data from the second node to the first node. The apparatus stores the generated routing data in a memory provided for the apparatus.
US09722915B2
A system and method for multicast routing using peer groups includes a router. The router includes a control unit and a memory coupled to the control unit. The memory stores one or more first multicast routing entries. The control unit is configured to receive a multicast packet on an input interface, determine one or more properties of the multicast packet, determine one or more output interfaces based on the properties and the first multicast routing entries, and forward copies of the multicast packet on each of the output interfaces. The router is configured to be coupled to a peer router via an inter-chassis link (ICL). The first multicast routing entries include one or more second multicast routing entries associated with multicast routing trees associated with the router and one or more third multicast routing entries associated with multicast routing trees associated with the peer router.
US09722913B2
A method for engineering traffic in a communications system includes determining a set of delay constraints associated with a traffic flow over the communications system, and excluding non-convex constraints from the set of delay constraints, thereby producing a set of convex constraints. The method also includes selecting a path solution for the traffic flow in accordance with the set of convex constraints, and sending information regarding the path solution to nodes in the communications system.
US09722912B2
The present disclosure describes system and methods for network planning. The systems and methods can incorporate network traffic demands, availability requirements, latency, physical infrastructure and networking device capability, and detailed cost structures to calculate a network design with minimum or reduced cost compared to conventional methods. In some implementations, the method include providing an initial, deterministic set of failures, and then successively performing a network optimization and a network availability simulation to determine which failures most impact the performance of the network model. The high impact failures can then be provided back into the system, which generates an improved network design while still maintaining minimum cost.
US09722909B2
In a multiple interface, low power and lossy network comprising a plurality of nodes, a low transmission power and medium transmission power topology are defined for the network and a channel-hopping schedule is defined for the devices operating in each topology. A sender determines that data is capable of being transmitted via a link on the low transmission power topology. The sender determines the transmission parameters for the transmission of the data over the link on the low transmission power topology and determines a low transmission power channel for transmission of the data. The sender transmits the determined channel and the transmission parameters to the receiver. The sender transmits the data via the determined channel in the low transmission power topology.
US09722886B2
A computer-implemented method, a computer program product, and a system for selecting a host from a plurality of host for an application pattern component using a service level agreement (SLA) requirement are provided. The computer-implemented method for selecting a host from a plurality of hosts for an application pattern component using a service level agreement requirement can include receiving the service level agreement requirement for the application pattern component. The method can include receiving a first capability metric of the host from the plurality of hosts. The method can include determining whether the first capability metric of the host from the plurality of hosts is sufficient for the service level agreement requirement. The method can include selecting the host in response to the host being sufficient for the service level agreement requirement.
US09722885B2
Aspects of the present disclosure involve provisioning customers of an aggregator, such as a reseller, of a content delivery network (CDN). Content requests to the CDN are processed in accordance with the virtual IP (VIP) address at which the request was received, according to a property template bound to the VIP. The template is selected by the customer and involves discrete parameters for the reseller. Cache fills of the network are processed without direct knowledge by the CDN of the customer origin through a combination of some request attribute, e.g., alias host of the customer, and an attribute of the reseller to make a DNS request to a name server outside the CDN. Another aspect involves receiving a property template selection, an origin and an alias from a customer of the reseller, and providing appropriate DNS entries to validate the customer and provide origin information to the CDN.
US09722869B2
A machine may generate and store a correlation among multiple identifiers of the user that enable access to an application through multiple systems. For example, the user may have a first identifier for using a first social network system, and a second identifier for using a second social network system, and the machine may generate and store a correlation between the first identifier and the second identifier. The machine may identify the user based on the first identifier and access a database that stores the correlation. The machine may then access a configuration of the application based on the correlation and configure the application in accordance with the configuration. The machine may generate a visual representation of the configured application, provide the visual representation to a device of a further user, receive an indication of an opinion of the further user on the visual representation, and present the indication.
US09722868B2
A cloud extension agent can be provided on a customer premise for interfacing, via an outbound secure connection, cloud based services. The cloud extension agent can reach the cloud based services through existing firewall infrastructure, thereby providing simple, secure deployment. Furthermore, the secure connection can enable substantially real-time communication with a cloud service to provide web-based, substantially real time control or management of resources on the customer premises via the cloud extension agent.
US09722866B1
Implementation resources are operated in a manner furthering a particular purpose while excluding use of the implementation resources for other purposes. At least some of the implementation resources have capacity that is usable to implement multiple other resources. The capacity of the implementation resources is allocated in a manner that satisfies one or more conditions on the capacity of the implementation resources that is used. Generally, the capacity is allocated in a manner that reduces the likelihood that resources initiated close in time will fail together should underlying implementation resources fail. The implementation resources may be hardware devices that implement virtual computer systems.
US09722864B2
Systems, methods, and apparatus to configure embedded devices are described. An example apparatus includes a network interface to communicatively couple the apparatus with a network, an antenna to receive a radio frequency signal including 1) configuration data and 2) power, a memory coupled to the antenna to receive the power and to store the configuration data, a network configurer to retrieve the configuration data from the memory and to configure the network interface based on the retrieved data, and a power source other than the antenna to provide power to the memory and the network configurer during operation of the network configurer.
US09722863B2
The health of a computing network is checked to determine whether there is a current fault in the network or a prediction of a potential fault in the network. The fault can be any type of fault, including a link failure, a failure in the transmitter of data over the link, a failure in the receiver of the data, or any other type of failure. If a fault or potential fault is indicated, a deterministic approach is provided for finding the source of the fault or potential fault within the network. The deterministic approach uses current values for selected operational parameters of components within the network, as well as historical data to determine the source.
US09722860B2
An interface accesses a server for managing usage of a plurality of frequency resources allocated to a first wireless system and acquires information indicating the usage. Based on the acquired information, a control unit selects, amongst the frequency resources, a frequency resource to be used by a second wireless system. The control unit determines whether, after the information is acquired at a first time point, reacquisition of the information at a second time point is successful, which second time point is scheduled to reacquire the information from the server. If the reacquisition is unsuccessful, the control unit allows a frequency resource for the second wireless system to be selected based on the information acquired at the first time point even from the second time point onward.
US09722851B1
Features are described with regard to the analysis of network and content characteristics that may affect the retrieval of network content, and the determination by a network computing device, based at least partly on that analysis, of whether a client computing device should bypass the network computing device and retrieve requested and related content directly from content sources. Additional features are described with regard to the determination of network resources to be cached, and to the determination of a computing device from which to initiate the caching. The network computing component or the client computing device can also monitor characteristics of the network connection between the computing devices and with other computing devices associated with content providers.
US09722850B2
A flow bonder at a CMTS and another at a cable modem distribute packets of a service flow over multiple channels and collect them in the downstream direction respectively; vice versa in the upstream direction. The service flow may include video and data streams that are provided to the CMTS via an IP network. IP header information is stripped form video packets and remultiplexed with packets of other video streams. The remultiplexed video stream packets are combined into a composite stream, which is transported using multiple bonded-flow RF channels over an HFC.A set top box receives the composite stream and separates data from video packets based on IP information. Video packets are assembled according to information from a multiple program transport stream table based on a program selected by a user.
US09722848B2
Examples include techniques for using a modulation and coding scheme (MCS) for downlink transmissions. In some examples information elements (IEs) for either a physical multicast channel (PMCH) or a physical multicast control channel (PMCCH) include information to indicate an MCS for downlink transmission over a PMCH or PMCCH between an evolved Node B (eNB) and user equipment (UE). For these examples, the information in the IEs include indications of whether higher order modulation for quadrature amplitude modulation (QAM) have or have not been enabled. Both the UE and the eNB may operate in compliance with one or more 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE) standards.
US09722843B2
A system comprises an analog front end (AFE), an analog-to-digital converter (ADC), and alias detection circuitry. The AFE may be operable to receive an analog signal via a communication medium, wherein a first frequency band of the analog signal is occupied by an OFDM symbol and a second frequency band of the analog signal is occupied by first aliases generated during digital-to-analog conversion of the OFDM symbol. The ADC is operable to digitize the particular band of the analog signal to generate a digital signal, wherein, during the digitization, aliasing of the first aliases results in second aliases which fall into the first frequency band. The alias detection circuitry is operable to detect the second aliases in the first frequency band of the digital signal, and process the digital signal based on the detected second aliases to generate an output signal.
US09722841B1
Disclosed are techniques for channel-based coding for wireless communications. A transmitter includes circuitry and multiple antennas. The circuitry selects a subset of the antennas, determines a respective channel response for each of the antennas in the subset, generates a respective coded system for each of the antennas in the subset, and transmits the coded symbols using the antennas in the subset.
US09722826B2
Methods, systems, and devices are described for wireless communications. More particularly, the described features relate to techniques for adjusting a modulation and coding scheme (MCS) to account for different airtime utilizations (available airtime actually utilized by a device for transmissions) resulting from different MCSs. In one example, a method for wireless communication may involve: determining a media access control (MAC) efficiency for a station of a plurality of stations based at least in part on a real-time multi-user (MU) physical protocol data unit (PPDU) length, a real-time physical layer service data unit (PSDU) length of each of the plurality of stations, and a modulation and coding scheme (MCS) of the station; adjusting a goodput estimate of the station using the MAC efficiency; and, adjusting the MCS of the station using the adjusted goodput estimate.
US09722825B2
A telecommunications system is provided that can re-sample a digitized signal at a resample rate that is based on one or more factors to better utilize bandwidth. The factors can include the bandwidth of the signal that the digitized signal represents, the amount of bandwidth owned or used by the carrier, the full bandwidth of the designated RF band, the bandwidth of the serial link, the frame length of the serial link, the segmentation of the frames on the serial link, and the capability of the equipment at the receiving end of a serial link. The re-sampled signal can be transmitted to another unit that is remote to the unit transmitting the signal. The other unit can include a re-sampling device that restores the re-sampled signal to a digital signal that can be converted to an analog signal for wireless transmission.
US09722810B2
A method for synchronizing multicast message subflows in a switched network includes associating, with a processing device, a first destination identifier corresponding to a multicast message with a first queue that corresponds to a first output port of a switching device, associating, with a processing device, a second destination identifier corresponding to the multicast message with a second queue that corresponds to a second output port of the switching device, pausing the first queue in response to a message counter corresponding to the first queue crossing a first predetermined threshold, and unpausing the first queue in response to the message counter crossing a second predetermined threshold, wherein the message counter indicates a quantity of data that has been forwarded by the first queue but remains to be forwarded by the second queue.
US09722807B2
A computer network system for posting content at a web site includes computer servers configured to host a web site for a group of users, and a data storage configured to store an email address in association with a destination at the website. The computer servers can receive an electronic message at the email address by the computer servers from a user. A computer processor can automatically extract content from the electronic message. The computer servers can automatically post the content extracted from the electronic message at the destination at the website.
US09722805B2
An integrated security device, including: an encryption/decoding processing unit for executing processing necessary for authentication by using a logic circuit that forms an encryption/decoding function; a selector for selecting signals whose number corresponds to a specific number of lines from among signals from a plurality of intermediate nodes of the logic circuit in accordance with a selection signal; and a signal processing unit having a function of detecting a glitch caused by the signals corresponding to the specific number of lines, for implementing both a function of generating a physical random number and a function of generating a device identifier by a physical characteristic based on the glitch detected by switch-selecting the signals corresponding to the specific number of lines.
US09722795B2
Systems and techniques are described for digitally signing JavaScript Object Notation (JSON) messages. One of the techniques includes receiving a JavaScript Object Notation (JSON) message; and digitally signing the JSON message, wherein digitally signing the JSON message comprises: generating a digital signature information JSON object; inserting the digital signature information JSON object into the JSON message; generating a canonical representation of the JSON message with the inserted digital signature information JSON object; generating a digital signature of the canonical representation of the JSON message; and inserting the digital signature into the digital signature information JSON object.
US09722781B2
A mobile device may be associated with a vehicle for verification of software updates. The mobile device may be configured to receive a message including an encryption key with which a software update for the vehicle is encrypted, provide a user interface requesting user verification of installation of the software update, and responsive to receipt of the user verification, provide the encryption key to the vehicle to allow the vehicle to decrypt the software update. An update server may be configured to send a software update encrypted using an encryption key to a vehicle, receive a request from the vehicle requesting that the encryption key used to encrypt the software update be provided to a mobile device associated with the vehicle for verification of software updates, and send the encryption key to the mobile device responsive to the request.
US09722778B1
Methods and systems are provided for securing an integrated circuit device against various security attacks, such as side-channel attacks. By limiting the number of different challenge vectors that can be combined with a critical variable of an encryption operation, it becomes more difficult to create enough side channel measurements to successfully perform statistical side-channel analysis.
US09722777B2
The HOMOMORPHIC DATABASE OPERATIONS APPARATUSES, METHODS AND SYSTEMS (“HEDO”) transform transaction storage requests and homomorphic model queries using HEDO components into homomorphic model query results. In some implementations, the disclosure provides a processor-implemented method of securely querying a shared homomorphically encrypted data repository and performing cross-table homomorphic joins.
US09722776B2
The subject disclosure is directed towards a technology by which data is securely distributed using a homomorphic signature scheme and homomorphic network coding signature schemes. A homomorphic signature scheme for signing the data is based upon binary pairing with standard prime order groups. Sets of data are signed based upon dividing a larger block of data into smaller blocks, and separately signing each smaller block. The smaller blocks may be distributed to nodes of a network topology that are configured for network coding. In one alternative, the homomorphic signature scheme protects against changes to the block identifier. Proof data may be provided independent of a random oracle, may be provided by providing parameters for verification in a Groth-Sahai proof system, or may be provided by providing parameters for verification independent of a Groth-Sahai proof system.
US09722771B2
A power amplifier module can include one or more switches, a coupler module, input signal pins, and a controller having first and second output terminals. The input signal pins can receive a voltage input/output signal, a clock input signal, and a data input signal. The controller can (i) set a mode of the one or more switches using a synchronous communication protocol in which the controller outputs a synchronous clock signal on the first output terminal and a data signal on the second output terminal, when the power amplifier module is in a first operating mode, or (ii) set a mode of the coupler module using an asynchronous communication protocol in which the controller outputs a first asynchronous control signal on the first output terminal and a second asynchronous control signal on the second output terminal, when the power amplifier module is in a second operating mode.
US09722766B2
There are provided measures for reference configuration for flexible time division duplexing. Such measures exemplarily include obtaining a first configuration parameter and a second configuration parameter, determining an uplink reference configuration for a flexible uplink/downlink mode from said first configuration parameter, determining a downlink reference configuration for said flexible uplink/downlink mode from said second configuration parameter, and deriving an uplink/downlink configuration candidate set based on at least one of said first configuration parameter and said second configuration parameter.
US09722761B2
Systems and methods relating to configuring a Secondary Component Carrier (SCC) for a wireless device in a cellular communications network are disclosed. In some embodiments, the method comprises obtaining capabilities of the wireless device, where the capabilities indicate a frequency band combination supported by the wireless device. The frequency band combination supported by the wireless device includes a first frequency band supported by a base station and the wireless device used for a Primary Cell (PCell) of the wireless device and a second frequency band supported by the wireless device but not supported by the base station. The method further comprises identifying an overlap between the second frequency band supported by the wireless device but not supported by the base station and a third frequency band supported by the base station but not supported by the wireless device and configuring the SCC for the wireless device in the overlap.
US09722756B2
Provided are a method and a device for allocating a resource for an uplink control channel in a wireless communication system. The method for allocating a resource for an uplink control channel in a wireless communication system comprises: receiving at least one downlink subframe; and allocating a physical uplink control channel (PUCCH) resource for transmitting an acknowledgement/not-acknowledgement (ACK/NACK) for the at least one downlink subframe, wherein the PUCCH resource is allocated on the basis of a control channel element of a control channel for scheduling each of the at least one downlink subframe, and if a particular subframe that satisfies a particular condition is included in the at least one downlink subframe, a control channel element included in the special subframe is excluded from the control channel element used to allocate the PUCCH resource.
US09722755B2
A method and apparatus for transmitting or receiving channel quality control information through a physical uplink shared channel (PUSCH) in a wireless access system that supports hybrid automatic retransmit request (HARQ). In one embodiment, a user equipment (UE) receives a physical downlink control channel (PDCCH) signal including an initial uplink grant, transmits uplink data using two transport blocks based on the initial uplink grant, receives a negative acknowledgement (NACK) information for one of the two transport blocks, and transmits a channel quality control information along with the one of the two transport blocks which is retransmitted according to the NACK information or a new transport block through the PUSCH to which the HARQ is applied. A number of coded symbols required to transmit the channel quality control information (Q′) is calculated based on the initial uplink grant.
US09722746B2
Methods and apparatus for providing bandpass analog to digital conversion (ADC) in RF receiver circuitry of a wireless-communication device. The bandpass ADC includes first noise-shaping successive approximation register (NS-SAR) circuitry arranged in a first path and second NS-SAR circuitry arranged in a second path parallel to the first path, wherein the first and second NS-SAR circuitries are configured to alternately sample an analog input voltage at a particular sampling rate and to output a digital voltage at the particular sampling rate.
US09722745B2
A method and base station for coordinated multi point data transmission are disclosed. The method includes: a base station receiving a per-cell CQI value reported by a UE; looking up an SINR-CQI mapping table according to the per-cell CQI value, and acquiring a subband/broadband SINR value; performing CQI recalculation according to the subband/broadband SINR value, and acquiring a recalculated subband/broadband CQI value; and selecting modulation and coding according to the recalculated subband/broadband CQI value to schedule data transmission. With the method and base station of the embodiments of the present document, in a CoMP system, in a joint transmission scenario, the accuracy of the CQI value used by the BS for scheduling is improved, and the oscillation during an AMC process is reduced.
US09722737B2
A method and an apparatus for sending Hybrid Automatic Repeat Request acknowledgement (HARQ-ACK) feedback information are provided. The User Equipment (UE) receives a Physical Downlink Control Channel (PDCCH) and a Physical Downlink Shared Channel (PDSCH) sent by a base station, determines a number of downlink subframes corresponding to the HARQ-ACK feedback information sent in the PUSCH of each CC in the current uplink subframe, the Uplink (UL) Downlink Assignment Index (UL DAI) obtained from the UL Grant of the PDCCH, a sum of the number of PDSCH subframes received from a HARQ-ACK bundling window and a number of PDCCHs indicating the downlink SPS releasing, and a size of the HARQ-ACK bundling window, and sends HARQ-ACK feedback information of each CC via the PUSCH in the current uplink subframe. A number of bits of the HARQ-ACK feedback information of each CC is determined according to the number of the downlink subframes.
US09722732B2
In one embodiment, the method includes first determining, at a device, whether a data packet is successfully decoded after a first number of data packet repetitions have been received. Here, the first number is less than a total number of data packet repetitions to be sent to the device. The method further includes first sending, by the device, an acknowledgement if the first determining determines the data packet was successfully decoded, the first sending occurring before the total number of data packet repetitions has been received.
US09722731B2
Certain aspects of the present disclosure relate to techniques for aggregating data from a wireless wide area network (WWAN) and wireless local area network (WLAN). In some aspects, a packet convergence entity (e.g., PDCP layer entity) communicates with first and second radio access technology (RAT) links. The packet convergence entity may determine from which of the first and second RAT links a data packet is received and may monitor a sequence number value of each of the received data packets. The packet convergence entity may perform one or more actions based on a determination that one or more packets are missing based on the monitored sequence number values. The packet convergence entity may send a status report in response to one or more events on one or both of the first RAT link and the second RAT link.
US09722729B2
A powerline communication (PLC) device can be configured to execute functionality for zero cross sampling and detection. When the PLC device is directly coupled to a high-voltage PLC network, the PLC device can comprise printed safety capacitors in series with a high-voltage input AC powerline signal to safely couple the high-voltage AC powerline signal to the low-voltage processing circuit. The PLC device can also comprise an ADC to sample a scaled AC powerline signal and to obtain zero cross information. When the PLC device is part of an embedded PLC application, dynamic loading can affect the integrity of a low voltage zero cross signal that is used to extract zero cross information. After digitizing the zero cross signal, the PLC device can execute functionality to minimize/eliminate voltage drops caused by dynamic loading and obtain the zero cross information.
US09722728B2
Techniques herein support enhanced multi-rate encoding and decoding of signals in multiple formats. In one embodiment, input data is received at a first device at one of a plurality of data rates. Encoder units are activated to produce streams of encoded input data. The encoder units are configured to operate at the same data rate. Differential encoding operations are performed to produce an encoded output stream. The encoded output stream is modulated for transmission to a second device. In another embodiment, a first device receives an encoded data stream that is transmitted from a second device. The modulated data stream includes encoded data at one of a plurality of data rates. Differential decoding is performed on the encoded data by activating one or more of a plurality of decoder units, where each of the plurality of decoder units is configured to operate at the same rate.
US09722723B2
The present invention and its embodiments are made to provide for dynamic hitless resizing in optical transport network without any identification of matching time slots by the Network Management System (NMS) or any control plane signaling including Generalised Multi Protocol Label Switching (GMPLS). An aspect of the invention provides for a method of hitless ODUflex connection resizing in an optical transport network by incrementing or decrementing the ODUflex connection between the nodes, based on an indication command given to a source node for bandwidth increase or decrease, by identifying and matching at least one time slot through Link Connection Resizing (LCR) protocol message exchanges. Another aspect of the invention provides for a method of hitless ODUflex connection resizing in an optical transport network by decrementing the matching time slot used for the incrementing operation, in case of unsuccessful incrementing operation between nodes.
US09722713B2
An apparatus for interference cancellation in wireless communication systems configured for reception, comprises a receive signal path configured to convey an overall receive (Rx) signal comprising an Rx signal and a residual transmit (Tx) signal, from an antenna port to an Rx input port of a transceiver, and at least one cancellation path configured to receive a leakage Tx signal from the antenna port. Further, the apparatus comprises a cancellation unit configured to apply a cancellation signal to the overall Rx signal in the receive signal path and a compensation unit configured to generate the cancellation signal by modifying the leakage Tx signal in the cancellation path, based on a compensation control signal. In addition, the apparatus comprises a feedback receiver unit configured to generate the compensation control signal based on the residual Tx signal in the overall Rx signal and the cancellation signal.
US09722703B2
Digital distributed antenna systems and methods for advanced cellular communication protocols are provided. In one embodiment, a digital distributed antenna system comprises: a host unit; a plurality of communication links; a plurality of remote antenna units each coupled to the host unit by one of the plurality of communication links, wherein the communication links transport a downlink digitized RF signal from the host unit to the plurality of remote antenna units, and wherein the remote antenna units are each configured to generate an over-the-air analog RF signal via an antenna from the downlink digitized RF signal; and a localized signal conditioning and control module that extracts from a first digitized RF signal at least one data stream and converts the at least one data stream to baseband data stored in a memory.
US09722702B2
Disclosed herein are a SATA host bus adapter using a optical signal and a method for connecting SATA storage using the optical signal. The SATA host bus adapter includes: a first conversion unit for converting a PCI-Express signal, transmitted from a host computer, into a data signal, using a protocol defined in a bus; a optical signal conversion unit for converting the data signal into a optical signal and for transmitting the optical signal to a optical signal reception unit; and a second conversion unit for converting the optical signal, received by the optical signal reception unit, into the data signal, for converting the data signal into a SATA signal, using the protocol, and for transmitting the SATA signal to the SATA storage.
US09722695B2
An optical network unit (ONU) includes an optical transceiver module, a switch, a detecting module, and an ONU chip. The switch is electronically coupled between the optical transceiver module and a power supply. The detecting module is electronically coupled between the switch and the power supply. The detecting module includes a sensor, an amplifier, and a comparator. The sensor is electronically coupled between the power supply and the switch to sense a driving current output from the power supply to the optical transceiver module and output a voltage signal to the amplifier, the amplifier amplifies the voltage signal and outputs an amplified voltage signal to the comparator, the comparator compares the amplified voltage signal with a predetermined voltage signal and outputs a comparison result. The ONU chip controls the switch to connect/disconnect the electrical connection between the optical transceiver module and the power supply according to the comparison result.
US09722690B2
An ultrawideband radio transceiver/repeater provides a low cost infrastructure solution that merges wireless and wired network devices while providing connection to the plant, flexible repeater capabilities, network security, traffic monitoring and provisioning, and traffic flow control for wired and wireless connectivity of devices or networks. The ultrawideband radio transceiver/repeater can be implemented in discrete, integrated, distributed or embedded forms.
US09722682B2
The invention is directed to systems, methods and computer program products for determining an operational mode for a device in a network. An exemplary method comprises determining a device has a first antenna and a second antenna; determining a first number of multipath components and associated power levels for the first antenna; determining a second number of multipath components and associated power levels for the second antenna; and determining an operational mode for the device based on the first number of multipath components and its associated power levels for the first antenna and the second number of multipath components and its associated power levels for the second antenna.
US09722680B2
For future wireless systems, it is desired to keep network implementation aspects, such as transmission point selection, precoder selection, etc, transparent to the terminal. This means that terminals are envisaged to be unaware of e.g. from which specific network node a transmission is made. This may be referred to as the transparency principle. The proposed solution comprises enabling a receiver to determine a type of antenna association that may be assumed in regard of two blocks of information, based on the result of the decoding of e.g. the first data block. The determination is done in a way such that the principle of transparency is not broken.
US09722675B2
A multistage combining sub-system for a distributed antenna system (“DAS”) is disclosed. The combining sub-system can receive broadband uplink signals from remote units of the DAS. The sub-system can divide the received broadband uplink signals into sets of narrowband uplink signals. The combining sub-system can select subsets of narrowband uplink signals from the sets of narrowband uplink signals. The subsets can be selected based on the narrowband signals in the subsets having signal powers above a threshold signal power. The combining sub-system can combine the selected subsets of narrowband uplink signals for routing to a base station. Combining the selected subsets of narrowband uplink signals can involve excluding narrowband uplink signals that are not included in the selected subsets of narrowband uplink signals.
US09722671B2
A signal generator generates an electrical signal that is sent to an amplifier, which increases the power of the signal using power from a power source. The amplified signal is fed to a sender transducer to generate ultrasonic waves that can be focused and sent to a receiver. The receiver transducer converts the ultrasonic waves back into electrical energy and stores it in an energy storage device, such as a battery, or uses the electrical energy to power a device. In this way, a device can be remotely charged or powered without having to be tethered to an electrical outlet.
US09722668B2
A home appliance, a home appliance system, and a method of controlling the same are provided. The home appliance includes a display unit that outputs an operation setting and an operation state. The home appliance further includes a tag unit that performs Near Field Communication (NFC) with a terminal. The home appliance further includes a controller that (i) stores product information at the tag unit, (ii) receives data stored at the tag unit, (iii) changes the operation setting, (iv) controls the operation state, and (v) outputs the changed operation setting to the display unit. The controller (i) determines network connection information that is stored at the tag unit by the terminal, (ii) stores the network connection information in a communication unit, and (iii) transmits and receives data wirelessly by connecting, through the communication unit, to a network that is associated with the network connection information.
US09722654B2
A smart ultra box adapting to a protective case is disclosed. The protective case protects a mobile communication device. The ultra box comprises a main body, a conversion unit and an expansion module. The main body has an output interface and an external power interface. The conversion unit disposes at the main body, to electrically connect the output interface and the external power interface. The expansion module electrically connects to the conversion unit. The expansion module is for communication with an external device.
US09722653B2
A memory card adapter includes a body having a set of contact pins. The set of contact pins include input pins and output pins implemented in a pin-to-pin structure. The input pins connect with pins of an inserted memory card and the output pins connect with an external socket. The body includes a bottom lead adapted to support the main body, and a top lead adapted to be combined with the bottom lead. The body includes a fixing substance adapted to combine with the contact pins. The body includes a conduction plate on a top surface or a bottom surface of the fixing substance, where the conduction plate is connected to at least one of the contact pins.
US09722647B2
A cellular radio architecture that includes a transceiver front-end circuit including an antenna and a switch module having a switching network that directs analog transmit signals to be transmitted to the antenna and receives receive signals from the antenna. The architecture further includes a receiver module having a separate signal channel for each of the signal paths in the multiplexer module, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture also includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to the transmit signals. The transmitter module includes a tunable bandpass filter and a power amplifier for amplifying the transmit signals before transmitting. The architecture also includes a calibration feedback and switch module that receives the amplified signals from the power amplifier.
US09722646B1
A RF communication system includes a radio transmitter comprising an RF power amplifier, the RF power amplifier including an input to receive an RF signal for transmission and being configured to amplify the RF signal for transmission across a communication channel; a RF digital pre- or post-distortion configured to compensate for nonlinearity of the RF communication system by operating on the RF signal entering or exiting the amplifier.
US09722639B2
Front end circuitry for a wireless communication system includes a first antenna node, a second antenna node, a first triplexer, a second triplexer, and front end switching circuitry coupled between the first triplexer, the second triplexer, the first antenna node, and the second antenna node. The front end switching circuitry is configured to selectively couple the first triplexer to one of the first antenna node and the second antenna node and couple the second triplexer to a different one of the first antenna node and the second antenna node. By using a first triplexer and a second triplexer in the mobile front end circuitry, the mobile front end circuitry may operate in one or more carrier aggregation configurations while reducing the maximum load presented to the first antenna node and the second antenna node, thereby improving the performance of the front end circuitry.
US09722638B2
A cellular radio architecture for a vehicle that includes a triplexer coupled to an antenna structure and including three signal paths, where each signal path includes a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals. The architecture also includes a receiver module having a separate signal channel for each of the signal paths in the triplexer, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The delta-sigma modulator includes an LC filter having a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter.
US09722635B2
A controller for a solid state drive is proposed. The solid state drive comprises memory cells each one for storing a symbol among a plurality of possible symbols that the memory cell is designed to store. The controller comprises a unit for encoding information bits into encoded bits; a unit for mapping the encoded bits into the symbols, wherein the symbols are determined based on a plurality of allowed symbols, among the possible symbols, that the memory cells are allowed to store, whereas the symbols, among the possible symbols, other than the allowed symbols define forbidden symbols not allowed to be stored in the memory cells; a unit for demapping read symbols and for providing an indication of the reliability of the read symbols based on the forbidden symbols; and a unit for soft decoding the read symbols according to the reliability indication thereby obtaining the information bits.
US09722630B1
The method for decoding a serially transmitted signal including: sampling the serially transmitted signal to obtain a plurality of sampled values according to a sampling period; obtaining a period of the serially transmitted signal according to a transition status of the sampled values; calculating a plurality of phase values according to the period and the transition status of the sampled values; obtaining a plurality of boundaries according to the phase values; and outputting a decoded data according to the boundaries and the transition status.
US09722618B1
Systems and methods involving phase-locked-loop (PLL) circuitry are disclosed. In one illustrative implementation, a PLL circuit device may comprise voltage controlled oscillator (VCO) circuitry having a bias signal that sets a frequency range, circuitry that shifts the VCO circuitry to operate in one of the frequency ranges, and other circuitry to compare/calibrate signals and/or set the bias current. According to further implementations, as a function of operation of the circuitry, an operating frequency range of the VCO circuitry may be shifted to a different operating frequency range, and closed-loop, continuous frequency range, auto-calibration or other features may be provided.
US09722614B2
A reconfigurable logic array(RLA) uses pipeline control methods. A do-not-end step signal is communicated to a controller in response to a backpressure condition. In response, a program executing in the RLA is suspended. Source and sink elements are arranged with respective sensors that identify back pressure conditions at interfaces. The source or sink elements communicate a do-not-end step signal to the controller. Local memory interfaces and an interrupt buffer generate similar signals in response to other internal and external conditions. The controller coordinates pipelined control signals with a global counter that issues the control signals with an end-of-step signal broadcast throughout the RLA. When a number of loop iterations is known before execution of the loop instructions, the information is shared with source and sink elements and the controller, which operate accordingly in a limited mode. At appropriate times write-enable inputs of configuration registers are disabled.
US09722611B2
A semiconductor circuit includes a first circuit and a second circuit. The first circuit is configured to generate a voltage level at a first node based on a voltage level of input data, an inverted value of the voltage level at the first node, a voltage level of a clock signal, and a voltage level at a second node; and the second circuit is configured to generate the voltage level at the second node based on the voltage level of input data, an inverted value of the voltage level at the second node, the voltage level of the clock signal, and the inverted value of the voltage level at the first node. When the clock signal is at a first level, the first and second nodes have different logical levels. When the clock signal is at a second level, the first and second nodes have the same logical level.
US09722610B2
Aspects of the invention can include a pulse generating means that outputs a set signal and reset signal for driving the high potential side switching element is such that, while either one of the set signal or reset signal is in an on-state as a main pulse signal for putting the high potential side switching element into a conductive state or non-conductive state, the other signal is turned on a certain time after the rise of the main pulse signal, thereby generating a condition in which the set signal and reset signal are both in an on-state.
US09722605B2
An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.
US09722599B1
In accordance with an embodiment, a circuit includes a first and a second switching transistors configured to be coupled in series between a first reference voltage terminal and a transformer. The circuit also includes a first diode coupled between a first drain of the first switching transistor and a first input terminal. The first diode is configured to clamp a voltage of the first drain to a voltage of the first input terminal. The circuit further includes a switching circuit coupled between the second switching transistor and the first input terminal. The switching circuit is configured to connect a second source of the second switching transistor to a second gate of the second switching transistor when a voltage of the second source exceeds the voltage of the first input terminal.
US09722596B2
A high-voltage electronic switch includes first and second transistors defining a current flow path between an input and output of the switch. The transistors have a common point of the current flow path and a common control terminal. A control circuit includes a voltage line receiving a limit operating voltage and first and second branches coupled between the voltage line and the common point and common control terminal, respectively. Further transistors are activated, upon turning-off of the first and second transistors, for coupling the branches to the voltage line. The branches include a parallel connected resistor, diode, and string of diodes with opposite polarities. The diode of the first branch plus string of diodes of the second branch and diode of the second branch plus string of diodes of the first branch provide coupling paths between the voltage line and, respectively, the common point and common control terminal.
US09722595B2
A system includes a SiC semiconductor power device; a power supply board that is configured to provide power to a first gate driver board via a connector; the first gate driver board that is coupled and configured to provide current to the SiC semiconductor power device, wherein the first gate driver board is coupled to the power supply board via the connector, and wherein the first gate driver board is separated from the power supply board; and an interconnect board that is coupled to the first gate driver board, wherein the interconnect board is configured to couple the first gate driver board a second gate driver board.
US09722571B2
A power combiner includes a planar figure-8 shaped primary winding and a planar figure-8 shaped secondary winding; wherein, the planar figure-8 shaped primary winding is substantially overlaid with the planar figure-8 shaped secondary winding. In addition, there is provided a radio frequency (RF) transmitter having a power combiner, where the power combiner includes a planar figure-8 shaped primary winding and a planar figure-8 shaped secondary winding, wherein the planar figure-8 shaped primary winding is substantially overlaid with the planar figure-8 shaped secondary winding.
US09722570B2
PROBLEM: To provide a high-performance complex circuit, circuit device, circuit board, and communication device that support a wider band of frequencies.SOLUTION: A complex circuit includes a first diplexer that passes through the normal-phase signals of balanced signals and a second diplexer that passes through the reverse-phase signals of the balanced signals. A balun includes a low frequency band first balun element and a high frequency band second balun element. The first balun element and the second balun element respectively include a plurality of lines that are connected to the first diplexer and that carry signals occupying two different frequency bands and also respectively include a plurality of lines that are connected to the second diplexer and that carry signals occupying two different frequency bands. The lines form one pair of balanced lines, and the lines form another pair of balanced lines. Furthermore, the first balun element and the second balun element each include an unbalanced line.
US09722569B1
A multi-band, electro-mechanical programmable impedance tuner for the frequency range between 10 and 200 MHz uses cascades of three or more continuously variable mechanical capacitors interconnected with sets of low loss flexible or semi-rigid cables; for each frequency band a different set of cables and capacitors are used. The cables and/or variable capacitors inside each tuning block are switchable manually or remotely. Multi-section variable capacitors are also used. Instantaneous impedance tuning is effectuated by changing the state of the capacitors using electrical stepper motors. The tuner is calibrated using a vector network analyzer and the data are saved in the memory of the control computer, which then allows tuning to any user defined impedance within the tuning range. Reflection factor values between 0 and higher than 0.9 can be obtained using this tuner at all frequency bands.
US09722567B2
A variable-frequency resonance circuit includes first and second input/output terminals and a resonance circuit portion. The resonance circuit portion includes a first inductor and first and second LC series circuits. The resonance circuit portion is connected between a ground and a transmission line that connects the first and second input/output terminals. The first LC series circuit includes a second inductor and a variable capacitor connected in series with each other. The second LC series circuit includes a third inductor and a fixed capacitor connected in series with each other. The first and second LC series circuits are connected in parallel between the first inductor and a ground. The first and second inductors are configured such that positive-coupling mutual inductance is produced therebetween.
US09722564B2
An EMI filter network may be used to provide interference filtering for multiple loads (referred to collectively as a dynamic load). In one aspect, the EMI filter network includes electrical switches that establish different configurations or arrangements of passive circuit elements (e.g., inductors and capacitors) where each configuration generates a different filter value. The EMI filter network may be communicatively coupled to a controller which changes the configuration of the EMI filter network using the switches in response to the dynamic load changing operational states. For example, each configuration of the EMI filter network may correspond to one of the operational states of the dynamic load. Thus, as the operational state of the dynamic load changes—e.g., different motors become operational—the controller alters the configuration of the EMI filter network to provide a filter value that corresponds to the current operational state of the dynamic load.
US09722563B2
In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.
US09722551B1
A selective low noise amplifier (LNA) comprising an input hybrid coupler receives a first input and a second input and to provide a first output and a second output; and an output hybrid coupler receives a first input and a second input and to provide for at least one output. A first amplifier and a second amplifier, each respective amplifier in first and second parallel paths are couple to and between the first output and the second output, respectively, of the input hybrid coupler and the first input and the second input, respectively, of the output hybrid coupler. A phase controller coupled to at least one of the first input and the second input of the output hybrid coupler delays signals from the first and second inputs of the output hybrid coupler to the at least one output of the output hybrid coupler. A method is also disclosed.
US09722544B2
Embodiments of the disclosure may include a method and apparatus for improving the efficiency and extending the operation time between recharges or replacement batteries of a portable audio delivery system. The audio delivery system may include a processor, an audio processing device, a speaker, and a rechargeable power source. The audio delivery system is generally configured to generate and/or receive an audio input signal and efficiently deliver an amplified, high quality audio output signal to a user. In some embodiments of the disclosure, the audio processing device of the audio delivery system may include a switch mode power supply (SMPS), a signal delay element, an envelope detector, and a switching signal amplifier.
US09722535B2
The present disclosure provides a method and a device for arc fault detection for a photovoltaic inverter, and a photovoltaic inverter using the same. The method includes: acquiring current signals at a DC side of the photovoltaic inverter; obtaining frequency spectral characteristics of the current signal according to the current signal; judging whether the frequency spectral characteristics of the current signal have a frequency spectral characteristic of an arc; and if the frequency spectral characteristics of the current signal have a frequency spectral characteristic of an arc, shutting down the photovoltaic inverter, acquiring respectively a first input voltage when the photovoltaic inverter is shut down and a second input voltage after a predetermined time period after the shutdown, calculating a voltage drop from the first input voltage to the second input voltage, and judging whether an arc fault occurs according to the voltage drop.
US09722533B2
Designs of extremely high efficiency solar cells are described. A novel alternating bias scheme enhances the photovoltaic power extraction capability above the cell band-gap by enabling the extraction of hot carriers. When applied in conventional solar cells, this alternating bias scheme has the potential of more than doubling their yielded net efficiency. When applied in conjunction with solar cells incorporating quantum wells (QWs) or quantum dots (QDs) based solar cells, the described alternating bias scheme has the potential of extending such solar cell power extraction coverage, possibly across the entire solar spectrum, thus enabling unprecedented solar power extraction efficiency. Within such cells, a novel alternating bias scheme extends the cell energy conversion capability above the cell material band-gap while the quantum confinement structures are used to extend the cell energy conversion capability below the cell band-gap. Light confinement cavities are incorporated into the cell structure in order to allow the absorption of the cell internal photo emission, thus further enhancing the cell efficiency.
US09722522B2
A method for limiting the torque of a permanent magnet AC motor includes a torque limit controller. The torque limit controller at least in part bases the torque limit on a selected direct voltage limit. The selected direct voltage limit may be used in combination with other torque limit conditions to generate the torque demand for the AC motor.
US09722519B2
Systems and methods for operating a stepper motor of a pump at a desired low velocity include memory for storing information corresponding to an intake velocity profile. The intake velocity profile represents an optimized acceleration curve for operating the stepper motor over a range of motor velocities during an intake cycle. A processor of a system controller dynamically accesses the memory during the intake cycle to acquire the information representing the intake velocity profile and issues a series of pulses to the stepper motor based on this information. In response to the pulses, the stepper motor accelerates in accordance with the optimized acceleration curve represented by the intake velocity profile. The optimized acceleration curve is based on the available torque of the stepper motor across a range of motor velocities and enables the motor to operate with greater torque utilization and less margin than traditional linear acceleration profiles.
US09722518B2
Systems and methods are disclosed for improving acceleration performance of an electric vehicle that includes an electric motor for propulsion. An exemplary system may include an inverter configured to drive the electric motor. The inverter may include at least one power electronic device. The system may also include a torque capability controller. The torque capability controller may be configured to receive information indicative of a selection between a first mode and a second mode. The second mode may correspond to a higher torque to be output by the electric motor than the first mode. The torque capability controller may also be configured to apply a switching frequency to the at least one power electronic device. The switching frequency may have a lower value when the received information indicates the selection of the second mode than when the received information indicates the selection of the first mode.
US09722516B2
In accordance with an embodiment, a drive circuit is provided for driving for a motor wherein the drive circuit includes a first signal generator coupled to a second signal generator. A bias generator is connected to the second signal generator. In accordance with another embodiment, a method for driving a motor is provided that includes comparing a first signal at a first output of a Hall sensor with a second signal at a second output of the Hall sensor to generate a comparison signal. An indicator signal is generated in response to the comparison signal, wherein the indicator signal has a first edge and a second edge. A bias signal for the Hall sensor is generated in response to the indicator signal in response to the indicator signal.
US09722508B2
Provided is a power conversion device that converts power between DC units and three-phase AC. A first-phase conversion device, a second-phase conversion device, and a third-phase conversion device each include a DC/DC conversion circuit and a single-phase power conversion circuit. For each of the first-phase conversion device, the second-phase conversion device, and the third-phase conversion device, when an absolute value of a voltage target value for the AC exceeds DC voltage of each DC unit, a control unit causes the DC/DC conversion circuit to operate to achieve the absolute value of the voltage target value and causes the single-phase power conversion circuit to only perform necessary polarity inversion, and when the absolute value of the voltage target value is smaller than the DC voltage, the control unit stops operation of the DC/DC conversion circuit and causes the single-phase power conversion circuit to operate to achieve the voltage target value.
US09722503B2
In an embodiment, a power converter includes: a plurality of power amplifier units, each having: a plurality of slice each with a power conversion module including an AC/DC/AC converter; a mains controller to control the plurality of slices; and a feedback conditioning system coupled to the mains controller; a plurality of input contactors and a plurality of output contactors via which each of the plurality of power amplifier units is to couple between a transformer and a load; and a master controller coupled to the plurality of power amplifier units.
US09722502B2
A converter arrangement comprises first and second modular multilevel converters, Each of the modular multilevel converters comprises two converter branches. Each converter branch comprises a plurality of series-connected converter cells. Each converter cell comprises a cell capacitor and semiconductor switches for connecting and disconnecting the cell capacitor to the converter branch. At least two converter branches of the first modular multilevel converter are connected via first branch connection point and at least two converter branches of the second modular multilevel converter are connected via second branch connection point. The multilevel converters are connected in parallel via a phase connection point for connecting the converter arrangement to a load or a power source, wherein the phase connection point is connected via a first inductance with the first branch connection point and/or via a second inductance with the second branch connection point. At least one of the modular multilevel converters comprises a protection system.
US09722501B1
A brushless variable transformer. Variable autotransformers, use brushes, and as such, have moving parts requiring maintenance and periodic cleaning of the brushes. A variable transformer without brushes is advantageous in that it eliminates the cleaning and maintenance of brushes.
US09722496B2
In one embodiment, a method of compensating for transmission voltage loss from a switching power supply, can include: (i) receiving a sampling signal that represents an output current of the switching power supply; (ii) delaying the sampling signal to generate a delayed sampling signal; (iii) converting the delayed sampling signal to generate a compensation signal; and (iv) regulating an output voltage of the switching power supply based on the compensation signal to compensate for the transmission voltage loss from the output voltage transmission to a load such that a voltage at the load is maintained as substantially consistent with an expected voltage at the load.
US09722490B2
In an embodiment, an apparatus, such as a power-supply controller, includes a generator and an adjuster. The generator is configured to provide a switching signal that causes a power supply to generate a regulated output signal, and the adjuster is configured to impart a condition to the power supply while the power supply is operating in a first mode, the condition being approximately equal to a condition that the power supply would have if the power supply were operating in a second mode. For example, such an apparatus may be able to reduce or eliminate a transient on a regulated output signal (e.g., a regulated output voltage) when a power supply transitions from a first operating mode, such as a pulse-frequency-modulation (PFM) mode, to a second operating mode, such as a pulse-width-modulation (PWM) mode.
US09722489B1
Apparatuses and methods for mixed charge pumps with voltage regulator circuits is disclosed. An example apparatus comprises a first charge pump circuit configured to provide a first output, a second charge pump circuit configured to provide a second output, a plurality of coupling circuits configured to voltage couple and current couple the first output and the second output to a common node to provide a regulated voltage, and a feedback circuit configured to regulate the first output and the second output based on the regulated voltage.
US09722488B2
Disclosed herein is a technique for substantially preventing, in a power converter including a boost power factor correction section, the power factor correction section from starting an intermittent operation even if the ripple voltage of its smoothing capacitor has increased. The converter includes: a power factor correction section including a booster circuit boosting an input voltage supplied from a rectifier section and a smoothing capacitor smoothing an output of the booster circuit; and a control section correcting a power factor by controlling the booster circuit. The control section makes correction to the amount of boost of the booster circuit such that an output voltage of the smoothing capacitor does not become lower than the input voltage.
US09722485B2
A switching power supply device includes a switching circuit and a control circuit. The switching circuit includes multiple switching elements, an inductor, and a capacitor. The control circuit compares an input voltage of the switching circuit with a predetermined threshold voltage set for an operation switch, and controls the switching circuit to perform the operation switch between at least two power control operations based on a comparison result. The at least two power control operations includes at least two of a buck operation, a buck-boost operation, or a boost operation. The control circuit further performs an inrush current restriction operation in response to the operation switch in order to restrict a flowing of an inrush current to one of the switching elements, which turns on and outputs the input voltage through the inductor in response to the operation switch.
US09722483B2
A voltage regulator has an input terminal and a ground terminal. The voltage regulator includes a high-side device, a low side device, and a controller. The high-side device is coupled between the input terminal and an intermediate terminal. The high-side device includes first and second transistors each coupled between the input terminal and the intermediate terminal, such that the first transistor controls a drain-source switching voltage of the second transistor. The low-side device is coupled between the intermediate terminal and the ground terminal. The controller drives the high-side and low-side devices to alternately couple the intermediate terminal to the input terminal and the ground terminal.
US09722479B2
The invention concerns a windmill including a rotatable transverse flux electrical machine (TFEM) comprising a stator portion; and a rotor portion rotatably located in respect with the stator portion, the rotor portion including an alternate sequence of magnets and concentrators radially disposed about a rotation axis thereof; the stator portion including at least one phase, the at least one phase including a plurality of cores cooperating with a coil disposed about the rotation axis, each core including a skewed pair of poles to progressively electromagnetically engage an electromagnetic field of respective cooperating concentrators. The invention is also concerned with a plurality of elements located in desired positions in the TFEM.
US09722476B2
Self-centering electromagnetic transducers, such as linear motors and generators, are disclosed. In one embodiment, an electromagnetic transducer includes an outer yoke made of a ferromagnetic material, and a coil assembly including a plurality of loops of electrically conductive wire, wherein the coil assembly is substantially surrounded by the outer yoke. The electromagnetic transducer further includes a magnet, and an inner yoke made of ferromagnetic material. The magnet is disposed within the outer yoke such that the coil assembly surrounds the magnet. The inner yoke is disposed within the magnet, and the magnet is free to translate. The electromagnetic transducer further includes at least one high-reluctance zone positioned within the outer yoke and/or the inner yoke. In some embodiments, the electromagnetic transducer includes one or more actuators that vary a width of one or more high-reluctance zones to change a spring rate of the electromagnetic transducer.
US09722471B2
An electric drive contains an electric motor for generating a driving force and a transmission for transmitting the driving force. The electric motor has a motor housing, a rotor arranged in the motor housing, and a motor shaft which bears the rotor. The transmission has at least two transmission elements which are coupled in terms of the transmission of force. The electric drive furthermore contains a drive housing for accommodating the electric motor and the transmission. Moreover, the motor shaft is mounted by at least a first radial bearing and a second radial bearing and braced transverse to its axis of rotation. The second radial bearing being arranged radially offset to the axis of rotation.
US09722459B2
Systems and methods of controlling an uninterruptible power supply are provided. The uninterruptible power supply includes an input configured to receive input power, an output, a power conversion circuit coupled with the input and the output, and a controller coupled with the power conversion circuit. The power conversion circuit includes an inverter, which includes a low pass filter. The low pass filter includes an inductor, and the controller is configured to provide control signals to the inverter such that a first current, measured at the inductor, generates a second current, measured at the output, where the first current has a first polarity and the second current having a second polarity, and the first polarity is either zero or the same polarity as the second polarity.
US09722456B2
A console assembly for an automotive vehicle and use with a mobile device. The console assembly including a storage compartment having a floor, a pair of sidewalls, and a pair of end walls. An opening permits access into the storage area and a slidable top wall is operable to move between a covered position and a retracted position relative to the opening. An anti-slip surface is provided on the top wall and configured to receive the mobile device thereon. A wireless charging unit is also incorporated into and moveable with the top wall. The wireless charging unit is located immediately below the anti-slip surface. When the mobile device is placed on the anti-slip surface, the device is moveable with the top wall, between the covered position and retracted position, while being charged.
US09722452B2
A system and method for integrating a wireless charging device with a display is provided herein. The system includes an information receiver to receive information from the wireless charging device; an information processor to process the information, and the processed information being about a wireless charging device or an electronic device on the wireless charging device; and an information communicator to communicate the processed information to a display coupled to the system.
US09722435B2
Disclosed is a battery charge balancing device which includes: a charge-measuring unit that measures charge of a plurality of batteries storing power through a plurality of power converters connected with a plurality of input power sources; a mode-conversion parameter calculating unit that calculates mode conversion parameters for determining mode conversion such that the power converters operate in a power conversion mode for converting power or in a balancing mode for balancing charge between the batteries; and a control unit that controls power transmission path of the power converters by switching a plurality of switches connected between the power converters and the batteries in accordance with the calculated mode conversion parameters.
US09722434B2
A wireless power transfer system comprising a wireless power transmitting apparatus and a plurality of wireless power receiving apparatuses, the wireless power transmitting apparatus comprising: a power transmitting unit adapted to transmit power to the wireless power receiving apparatus; a recognition unit adapted to recognize the wireless power receiving apparatus; and a transmitting unit adapted to transmit predetermined charging delay information according to a recognition result of the recognition unit to the wireless power receiving apparatus recognized by the recognition unit, and the wireless power receiving apparatus comprising: a power receiving unit adapted to receive power transmitted from the power transmitting unit; a receiving unit adapted to receive the predetermined charging delay information transmitted from the transmitting unit; and a display unit adapted to make a display based on the predetermined charging delay information received by the receiving unit.
US09722425B2
In operating an inverter including input connectors, (i) to which strings of photovoltaic cells are connected, (ii) each of which is connected via a DC/DC converter to a common DC voltage link, and (iii) which are bridgeable, the partial powers flowing through the individual DC/DC converters are determined, and for some time at least two DC/DC converters are either operated with the aim of balancing the partial currents flowing through them or connected through. During this operation or connecting through, the partial powers flowing through the at least two DC/DC converters are compared with each other, and if a difference between the partial powers exceeds a threshold value, the DC/DC converters are subsequently operated in a way adjusted to the fact that they connect different strings to the DC voltage link.
US09722423B2
We describe a modular adjustable power factor renewable energy inverter system. The system comprises a plurality of inverter modules having a switched capacitor across its ac power output, a power measurement system coupled to a communication interface, and a power factor controller to control switching of the capacitor. A system controller receives power data from each inverter module, sums the net level of ac power from each inverter, determines a number of said capacitors to switch based on the sum, and sends control data to an appropriate number of the inverter modules to switch the determined number of capacitors into/out of said parallel connection across their respective ac power outputs.
US09722422B2
Various embodiments of a DC plant. In one embodiment, the DC plant includes (1) power sources couplable to a common DC bus, (2) rectifiers and DC-DC converters associated with the power sources and (3) a DC plant controller. The DC plant controller includes a source identifier configured to identify the power sources, a source prioritizer coupled to the source identifier and configured to prioritize the power sources based on at least one criterion, and an output characteristic assigner coupled to the source prioritizer.
US09722417B2
A transmission circuit including four transmission component sets for Ethernet is provided. For each of the transmission component sets, a first capacitor and a first inductor are cascaded, the first inductor is coupled to the Ethernet connector via the first transmission line (TL), the first capacitor is coupled to the Ethernet chip via the second TL; a second capacitor and a second inductor are cascaded, the second inductor is coupled to the Ethernet connector via the third TL, the second capacitor is coupled to the Ethernet chip via the fourth TL; a first component set is coupled between a first contact and a second contact, the first contact is located between the first capacitor and the first inductor, and the second contact is located between the second capacitor and the second inductor; and a second component set is coupled between the second TL and the fourth TL.
US09722411B2
The present provides a secondary power system and a power supply device. The secondary power system is used for supplying power for a load equipment, and comprises: a fuse circuit, a filter circuit, a convertor circuit and an over-voltage and under-voltage protection circuit, wherein, the fuse circuit, the filter circuit, the over-voltage and under-voltage protection circuit and the convertor circuit are sequentially connected in series; the over-voltage and under-voltage protection circuit is configured to cut off power supplied to the convertor circuit when power supplied by the primary power source is an under-voltage or over-voltage; the convertor circuit is configured to convert the primary power source into a secondary power source. The secondary power system, by providing an over-voltage and under-voltage protection circuit, can not only lower the cost of the convertor circuit, but also save the space occupied by the convertor circuit.
US09722406B2
Ocean floating installations (1) are disposed on the ocean. The ocean floating installations (1) float on the ocean with the lower part of the ocean floating installations (1) being fixed to the seabed by mooring ropes (11). Each of the ocean floating installations (1) is connected at a connection part (5a) to a cable (3), which is a first cable. Each of the cables (3) is connected at a connection part (5b) to a cable (7), which is a second cable. In other words, the ocean floating installations (1) are connected to each other by the cables (3) and the cable (7). A connection is established with the cables (7) at the connection parts (5b) located on the seabed. In other words, the cables (7) are installed on the seabed.
US09722404B2
The invention relates to a system for sealingly holding cables through an opening. The system comprises a holder substantially in the form of a plate having a central portion with a first thickness between a first side and a second side of the plate and a peripheral portion with a second thickness which is smaller than the first thickness, the holder having in the central portion a plurality of conduits extending in the thickness direction of the plate, each conduit being suitable for having one or more cables extending there through, at least one multi-part sealing plug of an elastic material for sealing an annular space between an inner wall of one of the conduits and a cable extending there through and a gasket of an elastic material and of a shape for placement against the peripheral portion so as to provide a sealing in a circumferential direction of the plate. The plug has at least one circumferentially extending outer rib and at least one circumferentially extending inner rib. In an uninserted state, the following conditions apply: the outer rib has a sawtooth shape for easy insertion, the sawtooth is provided with an angled inward bend for facilitating flexing of the sawtooth in a transverse direction, the inner rib has a top surface extending in circumferential and longitudinal direction for facilitating sliding along the cable, and an imaginary straight line extending in a transverse direction coincides with a pivotal point of the angled bend and intersects the top surface.
US09722402B2
A long travel cable carrier guide has a plurality of guideposts that support an upper portion of a cable carrier. The plurality of guideposts include horizontal rollers that rotate to allow the cable carrier to pass by the guideposts, but automatically return to a resting position wherein the horizontal rollers protrude into the path of the cable carrier.
US09722396B2
A surface emitting laser element capable of emitting a main beam and a sub-beam, and a monitoring light detection element capable of detecting a light intensity of the sub-beam are included, the surface emitting laser element is a PCSEL, the main beam and the sub-beam are emitted in an upward direction of the surface emitting laser element and are inclined to each other at a predetermined angle, and respective changes in a peak light intensity of the main beam and a peak light intensity of the sub-beam with respect to a value of a driving current of the surface emitting laser element are correlated with each other. Therefore, if an output of the monitoring light detection element indicating the peak light intensity of the sub-beam is used, the peak light intensity of the main beam can be estimated.
US09722392B2
A MOPA laser system that includes a seed laser configured to output pulsed laser light, an amplifier configured to receive and amplify the pulsed laser light emitted by the seed laser; and a pump laser configured to deliver a pump laser beam to both the seed laser and the amplifier.
US09722390B2
Ultrashort pulse fiber amplifier having a pulse width from 200 ps to 200 fs comprising a rare earth oxide doped multicomponent glass fibers for laser amplification, including a core and a cladding, the core comprising at least 2 weight percent glass network modifier selected from BaO, CaO, MgO, ZnO, PbO, K2O, Na2O, Li2O, Y2O3, or combinations; wherein the mode of the core is guided with step index difference between the core and the cladding, a numerical aperture of the fiber is between 0.01 and 0.04; core diameter is from 25 to 120 micron, and a length of the gain fiber is shorter than 60 cm.
US09722385B2
A laser chamber for a discharge excited gas laser apparatus may include: a first discharge electrode disposed in the laser chamber; a second discharge electrode disposed to face the first discharge electrode in the laser chamber; a fan configured to flow laser gas between the first discharge electrode and the second discharge electrode; a first insulating member disposed upstream and downstream of a laser gas flow from the first discharge electrode; a metallic damper member disposed upstream of the laser gas flow from the second discharge electrode; and a second insulating member disposed downstream of the laser gas flow from the second discharge electrode.
US09722374B2
A stacked receptacle connector includes an insulative housing forming a first receiving cavity extending along a front-to-back direction, a second receiving cavity stacked on the first receiving cavity along a vertical direction perpendicular to the front-to-back direction, and a mounting cavity located behind and communicating with the first and second receiving cavities. A printed circuit board (PCB) is mounted to the mounting cavity. A first connector having a front portion received in the first receiving cavity and a rear portion connected to the PCB. The first connector is fitted to be inserted by a first plug connector along two opposite direction. A plurality of contacts each has a mating portion received in the second receiving cavity and a mounting portion connected with the PCB. A plurality of footer pins connected the PCB to electrically connect the first connector and the contacts to an exterior substrate.
US09722370B2
An apparatus and method for crosstalk compensation in a jack of a modular communications connector includes a flexible printed circuit board connected to jack contacts and to connections to a network cable. The flexible printed circuit board includes conductive traces arranged as one or more couplings to provide crosstalk compensation.
US09722369B1
An electrical connector includes an insulating housing, a dielectric body, a plurality of terminals integrally molded to the dielectric body, a shielding plate and a plurality of metal elements. The shielding plate is integrally molded to the dielectric body. The dielectric body together with the terminals and the shielding plate is assembled to a rear end of the insulating housing. The metal elements are mounted to a top surface and a bottom surface of the dielectric body. Each of the metal elements has a base plate, and a touch portion extended from the base plate. The base plates of the metal elements are mounted to the top surface and the bottom surface of the dielectric body, respectively. A tail end of the touch portion contacts the shielding plate. One side of the touch portion contacts one of the grounding terminals.
US09722367B2
One embodiment is directed to a method of reading RFID tags in an interconnection system comprising at least one port. The method comprises initiating a localized read transaction to read any RFID tag attached to a first connector and any RFID tag attached to a second connector inserted into the port. The method further comprises, as a part of the localized read transaction, reading any RFID tag configured to respond to a first type of RFID interrogation signal, wherein the first connector comprises an attached RFID tag that is configured to respond to the first type of RFID interrogation signal; and, as a part of the localized read transaction, reading any RFID tag configured to respond to a second type of RFID interrogation signal, wherein the second connector comprises an attached RFID tag that is configured to respond to the second type of RFID interrogation signal. Other embodiments are disclosed.
US09722366B2
An electrical connector electrically connects a first printed circuit board and a second printed circuit board, where the electrical connector includes: (a) an insulative housing; (b) a plurality of signal conductors, with at least a portion of each of the plurality of signal conductors disposed within the insulative housing; (c) each of the plurality of signal conductors having a first contact end, a second contact end and an intermediate portion therebetween; and (d) a passive circuit element electrically connected to the intermediate portion of each of the plurality of signal conductors, where the passive circuit element is housed in an insulative package and includes at least a capacitor or an inductor.
US09722364B1
An outdoor external lightning arrestor includes a transmission line, a signal suppression circuit, insulation housing, a ground member, and a metal housing. The signal suppression circuit includes a circuit board thereon. A first connector, a second connector, and at least one protector are electrically connected to the circuit board. The first connector is electrically connected to the transmission line. The insulation housing is assembled to the circuit board and ground member, and the first resilient plate at one side of the ground member is in electrical contact with the second connector. The insulation housing is installed inside the metal housing, so that the second resilient plate at the other side of the ground member is in electrical contact with the metal housing.
US09722363B2
A coaxial cable connector for coupling an end of a coaxial cable to a terminal is disclosed. The connector has a coupler adapted to couple the connector to a terminal, a body assembled with the coupler and a post assembled with the coupler and the body. The post is adapted to receive an end of a coaxial cable. The post has an integral contacting portion that is monolithic with at least a portion of the post. When assembled the coupler and post provide at least one circuitous path resulting in RF shielding such that RF signals external to the coaxial cable connector are attenuated, such that the integrity of an electrical signal transmitted through coaxial cable connector is maintained regardless of the tightness of the coupling of the connector to the terminal.
US09722354B2
An electronic card connector, cooperated with a plug-in component and defining an insertion direction and a transverse direction perpendicular to the insertion direction, includes an insulative housing, a number of contacts retained in the insulative housing, a metal shell attached to the insulative housing and forming a cavity therebetween, and an ejector movable in the insulative housing. The metal shell has a number of lateral walls located at two sides and a front end thereof. One of the lateral walls has a resisting portion protruding to the cavity and resists the resisting portion to confine a movement thereof in a horizontal plane.
US09722340B2
A connector structure includes a plurality of terminals to be connected to an electric wire, an electronic component configured to control an external component to be connected to the terminals, and a housing holding the terminals and the electronic component to accommodate the terminals and the electronic component. Each terminal includes a connection portion to be connected to the electric wire, and an extension portion having a cross section of an arc shape and extending from the connection portion. The housing is configured to hold the plurality of terminals and the electronic component such that the cross sections of the extension portions are arranged to form a substantially circular shape that surrounds the electronic component.
US09722339B2
A connector including a body, an adjacent pair of first terminals, a second terminal next to one of the first terminals, a third terminal next to the other first terminal, and a fourth terminal. The body holds the terminals at least partially and includes a first recess, a second recess, and a first separating portion therebetween. The first and third terminals each have a portion exposed through the first recess. The fourth terminal has a portion exposed through the second recess. The second terminal includes an exposed portion and an unexposed portion. The unexposed portion includes an area on one side in the first direction of a part in the second direction of the second terminal and is covered with the body. The exposed portion includes an area on the other side in the first direction of the part of the second terminal and is exposed through the first recess.
US09722337B2
An assembly for a computer system includes an insert housing with a housing floor; a power supply unit arranged on the housing floor and having a plug contact; a main circuit board arranged within the insert housing substantially parallel to the housing floor; and an angle plug having a mating plug contact and a connection region for connection of the power supply unit to the main circuit board, wherein the angle plug, when connected to the main circuit board via the connection region, connects to a top face of the main circuit board at a first installation height of the main circuit board and connects to a bottom face of the main circuit board at a second installation height of the main circuit board so that height compensation with respect to the plug contact of the power supply unit is established in each case.
US09722331B2
A power inlet socket coupled to a power delivering member of an electronic device to supply power from an external power plug to the electronic device includes a socket body comprising a power plug connector connected to the external power plug and a power delivering member connector connected to the power delivering member; three terminal pins, each terminal pin comprises a projecting pin extending from the power plug connector in parallel with one another to correspond to a terminal of the external power plug and a connection terminal exposed to the power delivering member connector; and an insulating barrier provided between at least a pair of connection terminals of the three terminal pins to cut off an electric current flowing among the connection terminals. Thus, the insulating distance of power inlet socket is improved.
US09722322B2
An antenna device including: a first antenna assembly configured to receive first radiofrequency signals polarized according to a first polarization; a second antenna assembly configured to receive second radiofrequency signals polarized according to a second polarization orthogonal to the first polarization; and a radiofrequency signal handling assembly coupled with the first and second antenna assemblies, and configured to handle the received first radiofrequency signals separately from the received second radiofrequency signals.
US09722320B2
A electromagnetic induction wireless communication system including: a magnetic antenna; an electric antenna; a tuning capacitor coupled to the antenna combination configured to tune the antenna combination; a controller configured to control the operation of the communication system; a signal source coupled to the controller configured to produce a communication signal used to drive the magnetic antenna and the electric antenna; a voltage control unit coupled to the signal source configured to produce one of an amplitude difference, phase difference, and an amplitude and a phase difference between the communication signal used to drive the magnetic antenna and electric antenna.
US09722318B2
Aspects of the subject disclosure may include, for example, an antenna structure that includes a dielectric antenna comprising a dielectric feedline having a feed point, and a collar that facilitates aligning a port of a waveguide system to the feed point of the dielectric feedline for facilitating transmission or reception of electromagnetic waves exchanged between the port and the feed point of the dielectric feedline, the electromagnetic waves guided by the dielectric feedline without an electrical return path. Other embodiments are disclosed.
US09722317B2
An antenna is described including a slot formed in a cavity, a substrate configured to cover a portion of the cavity and the slot, and a first port and a second port configured to supply power to the antenna using a first feeding line and a second feeding line. Each of the feeding line and the second feeding line is connected to the slot in a vertical direction and disposed to be separate from one another. A first input impedance of the antenna from the first port differs from a second input impedance of the antenna from the second port.
US09722314B2
A patch antenna includes: a substrate configured with a dielectric material; a ground electrode formed on one side surface of the substrate; and a radiation electrode having a rectangular shape formed on another side surface of the substrate, wherein a slit is formed in the radiation electrode in parallel to a first side of the radiation electrode to be shorter than the first side, and each of a gap between the slit and the first side and a gap between the slit and a second side facing the first side is shorter than the first side.
US09722308B2
Low passive intermodulation (PIM) antenna assemblies and methods for utilizing the same. In one embodiment, the low PIM antenna assemblies described herein offer the lowest PIM level for the DAS antenna as compared with current PIM solutions currently available in the market place as well as the improvement of isolation between the radiating elements using inserted isolation rings as well as a more omni-directional radiation pattern using the insertion of slots into the radiating elements themselves. Methods of manufacturing and using the aforementioned low PIM antenna assembly are also disclosed.
US09722297B2
An integrated wire elliptical helical antenna with novel cuboids dielectric resonator loading for circularly polarized wave transmission and reception is presented. The antenna is designed to operate in the center frequency of 915 MHz and it is utilized in RFID systems as a base station antenna. The elliptical structure is formed by steel wire and supporting acrylic plastic. The cuboids dielectric resonator is loaded at the inner surface of the proposed antenna.
US09722290B2
A storage cell has an air electrode, connected to an air supply device, and a storage device. Channels for receiving a storage medium rest on the storage electrode. In addition, partition walls for partitioning off the channels with respect to one another are provided. The partition walls have a recess in the region of the storage electrode. This recess serves the purpose of spacing apart the storage medium from the storage electrode.
US09722285B2
A method includes providing battery cells for secondary batteries. The battery cells are charged to a fixed voltage (Vc). The battery cells are laid aside in an open circuit for a preset self-discharge time period (t). A voltage (Vt) is measured after the period t for each battery cell. A voltage difference (ΔV) is determined for each battery cell, wherein ΔV=Vc−Vt. A self-discharge rate (ρ) is measured for each ΔV. A self-discharge current (Ic) is calculated during the period t, wherein Ic is a function of ρ. The Ic is curve-fitted to the ΔV for each battery cell to obtain an Ic−ΔV equation. The Ic is divided into h number of grades. The Ic−ΔV equation is utilized to determine h number of grades of ΔV associated with each grade of Ic. Battery cells are selected having a same grade of Ic and ΔV for matching.
US09722283B2
The disclosed embodiments provide a system that manages use of a battery in a portable electronic device. During operation, the system obtains a voltage of the battery and a state-of-charge of the battery and calculates an effective C-rate of the battery using the voltage and the state-of-charge. Next, the system uses the effective C-rate to estimate an inaccessible capacity of the battery. Finally, the system manages use of the battery with the portable electronic device based on the inaccessible capacity.
US09722271B2
A polymer electrolyte membrane includes a fluorinated polymer membrane and a coating layer including a hydrocarbon-based ionomer on at least one surface of the fluorinated polymer membrane. The polymer electrolyte membrane maintains high hydrogen ion conductivity and has improved performance under high temperature and low humidity conditions. A membrane electrode assembly and a fuel cell including the polymer electrolyte membrane are also disclosed.
US09722256B1
In the present disclosure, imidazole-derived materials including M-N—C catalysts, imidazole-derived MOFs and MOF-based M-N—C catalysts as well as methods for preparing the same utilizing mechanochemical synthesis and/or a sacrificial support-based methods are described.
US09722244B2
A compound of formula Li4+xMnM1aM2bOc wherein: M1 is selected from the group consisting in Ni, Mn, Co, Fe and a mixture thereof; M2 is selected from the group consisting in Si, Ti, Mo, B, Al and a mixture thereof; with: −1.2≦x≦3; 0
US09722242B2
A hollow silicon-based particle including silicon (Si) or silicon oxide (SiOx, 0
US09722241B2
A positive active material for a rechargeable lithium battery includes a core including an overlithiated oxide represented by Chemical Formula 1, a first coating layer on the core and including a compound having a spinel structure, and a second coating layer on the first coating layer and including a compound represented by Chemical Formula 2. The compound having a spinel structure shows a peak between about 2.6 V and about 2.7 V in a graph of differential capacity dQ/dV vs. voltage, where the voltage is between about 4.7 V and about 2.5 V. In Chemical Formula 1, 0
US09722240B2
The present invention is concerned with novel compounds derived from polyquinonic ionic compounds and their use in electrochemical generators.
US09722231B2
A battery system having a bladed fuse connector and a method of operation of the bladed fuse connector are provided. The system may, in certain embodiments, include a printed circuit board (PCB) and a high current interconnect. The high current interconnect may be mounted to and extending upward from the PCB. The battery system may also include a fuse. The fuse may limit an amount of current flowing through the battery system. Additionally, the battery system may include a bladed fuse connector coupled between the high current interconnect and the fuse. The bladed fuse connector may carry a current between the high current interconnect and the fuse. To that end, the bladed fuse connector may include an S-shaped bend between the high current interconnect and the fuse.
US09722227B2
A cross-linked microporous polysulfone or polysulfone copolymer battery electrode separator membrane are described. Such membranes, which would otherwise be soluble above a particular, generally high temperature in selected battery electrolyte systems, once at least in part cross-linked, swell in the electrolyte at the particular higher temperature instead of dissolving. When the membrane separators are restrained between solid electrodes in a battery, the separator cannot increase in bulk volume, and the swelling occurs within the pores with the pore volume decreasing from its original bulk volume. The drop in pore volume causes the battery current density to drop, thereby reducing the heat generation within the hot area of the battery. This process provides a measure of safety against overheating and fires, and the battery is capable of continued usage if the overheating is localized.
US09722226B2
The present invention provides a polyolefin microporous membrane made of a polyolefin resin and an inorganic particle, and the puncture strength of the microporous membrane is 3 N/20 μm or more and the membrane thickness retention ratio in penetration creep is 16% or more, thereby being excellent in safety and long-term reliability, and a separator for a nonaqueous electrolyte battery, and the like can be provided.
US09722224B2
A separator for a battery and an electronic device, the separator including a separator substrate; and a separator coating layer coated on at least one surface of the separator substrate, the separator coating layer including a binder and at least one quaternary ammonium salt.
US09722214B2
The present invention provides an OLED panel and a method for fabricating the same, a screen printing plate, and a display device. The method comprises: forming an OLED mother board, wherein supporting adhesive is formed between an upper base plate and a lower base plate of the OLED mother board, and said supporting adhesive is located below a cutting line; and cutting said OLED mother board along said cutting line to obtain OLED panels. In the fabricating method of the present invention, when the OLED mother board is cut by a cutter wheel, the upper and lower base plate of the OLED mother board is subject to small deformation due to support of the supporting adhesive. As a result, travelling accuracy of the cutter wheel is improved, the distance between the cutting line and packaging adhesive is greatly reduced, and the frame width of the fabricated OLED panel is far less than that of an OLED panel fabricated by a conventional method.
US09722200B2
The present disclosure relates to an emissive construct, which can be used in various OLED applications, for example, top-emission white organic light-emitting diodes. The emissive construct includes a fluorescent emissive layer, a partial hole-blocking layer, and a phosphorescent emissive. A recombination zone is shared between the fluorescent emissive layer and the phosphorescent emissive layer, such that the thickness of the partial hole-blocking layer is less than about one-third of the thickness of the recombination zone.
US09722197B2
Disclosed is a method for manufacturing an inverted organic electronic device. The method includes preparing a substrate having a first electrode; depositing a mixture of a cathode interface material and a photo active material onto the first electrode to form a bilayer or composite layer of a cathode interface layer and a photo active layer, followed by forming an anode interface layer on the bilayer or composite layer; and forming a second electrode on the anode interface layer. According to the present invention, it is possible to achieve simplification of a manufacturing process of an inverted organic electronic device and to provide an inverted organic electronic device having excellent performance by forming a cathode interface layer in the form of a uniform and pinhole-free thin film.
US09722185B2
A heterocyclic compound and an organic light-emitting device including the heterocyclic compound, the heterocyclic compound being represented by Formula 1 below:
US09722176B2
Methods for manufacturing magnetoresistive devices are presented in which isolation of magnetic layers in the magnetoresistive stack is achieved by oxidizing exposed sidewalls of the magnetic layers prior to subsequent etching steps. Etching the magnetic layers using a non-reactive gas further prevents degradation of the sidewalls.
US09722171B2
The present invention provides a lead-free piezoelectric material having a high piezoelectric constant and a high mechanical quality factor in a wide operating temperature range. The piezoelectric material includes a perovskite-type metal oxide represented by Formula (1): (Ba1-xCax)a(Ti1-yZry)O3 (1.00≦a≦1.01, 0.125≦x<0.155, and 0.041≦y≦0.074) as a main component. The metal oxide contains Mn in a content of 0.12 parts by weight or more and 0.40 parts by weight or less based on 100 parts by weight of the metal oxide on a metal basis.
US09722162B2
A semiconductor light emitting device includes first and second light emitting bodies, a first electrode, a second electrode and a first interconnection. The first and second light emitting bodies are disposed on a conductive substrate, and each includes first and second semiconductor layers and a light emitting layer therebetween. The first electrode is provided between the first light emitting body and the conductive substrate, and electrically connected to a first semiconductor layer and the conductive substrate. The second electrode is provided between the second light emitting body and the conductive substrate, and electrically connected to a first semiconductor layer. The first interconnection electrically connects the second semiconductor layer of the first light emitting body and the second electrode. The first interconnection includes a first portion extending over the first and second light emitting bodies and a second portion extending into the second light emitting body.
US09722160B2
A light emitting device includes a substrate, a plurality of first wiring members, a plurality of second wiring members and a plurality of light emitting elements. The first wiring members extend in a first direction. The second wiring members extend in a second direction. Each of the second wiring members is segmented into a plurality of second wiring portions. The light emitting elements are disposed along the second direction. A first electrode of the light emitting element is connected to a corresponding one of the first wiring members. A second electrode of the light emitting element has a first connection part and a second connection part that is linked to the first connection part. The first connection part and the second connection part are connected to a corresponding one of the second wiring members and bridge at least two of the segmented second wiring portions in the second direction.
US09722158B2
A multiple element emitter package is disclosed for increasing color fidelity and heat dissipation, improving current control, and increasing rigidity of the package assembly. In one embodiment, the package comprises a casing with a cavity extending into the interior of the casing from a first main surface. A lead frame is at least partially encased by the casing, the lead frame comprising a plurality of electrically conductive parts carrying a linear array of LEDs. Electrically conductive parts, separate from the parts carrying the LEDs, have a connection pad, wherein the LEDs are electrically coupled to the connection pad, such as by a wire bond. This arrangement allows for a respective electrical signal to be applied to each of the LEDs. The emitter package may be substantially waterproof, and an array of the emitter packages may be used in an LED display such as an indoor and/or outdoor LED screen.
US09722155B2
Provided is a LED light source package comprising a circuit board, a light source seated on an upper portion of the circuit board, and a lens structure arranged on the upper portion of the circuit board via the light source. A surface that faces the light source in the lens structure includes a first inclined surface that projects toward the light source as going to a center portion of the lens structure.
US09722151B2
A QD glass cell includes a glass cell and QD fluorescent powder material. The glass cell includes a receiving chamber, and the QD fluorescent powder being encapsulated within the receiving chamber. A manufacturing method of the QD glass cell includes: S101: manufacturing a glass cell comprising a receiving chamber, and the glass cell comprising an injection port transmitting fluid into the receiving chamber; S102: manufacturing fluid QD fluorescent powder material; S103: filling the fluid QD fluorescent powder material into the receiving chamber via the injection port; S104: applying a curing process to the fluid QD fluorescent powder material within the receiving chamber; and S105: sealing the injection port by hot melting to obtain the QD glass cell. In addition, the above QD glass cell may be applied to LED light source.
US09722139B2
A light emitting heterostructure including one or more fine structure regions is provided. The light emitting heterostructure can include a plurality of barriers alternating with a plurality of quantum wells. One or more of the barriers and/or quantum wells includes a fine structure region. The fine structure region includes a plurality of subscale features arranged in at least one of: a growth or a lateral direction.
US09722135B2
A LED structure includes a support and a plurality of nanowires located on the support, where each nanowire includes a tip and a sidewall. A method of making the LED structure includes reducing or eliminating the conductivity of the tips of the nanowires compared to the conductivity of the sidewalls during or after creation of the nanowires.
US09722134B1
A method for transferring a semiconductor structure is provided. The method includes: coating an adhesive layer onto a carrier substrate; disposing the semiconductor structure onto the adhesive layer, such that the adhesive layer temporarily adheres the semiconductor structure, in which the adhesive layer includes an adhesive component and a surfactant component therein after the disposing; irradiating the electromagnetic wave to the adhesive layer through the carrier substrate to reduce adhesion pressure of the adhesive layer to the semiconductor structure while remaining the semiconductor structure within a predictable position, in which the semiconductor structure has a rejection band or is completely opaque, the carrier substrate has a pass band, and the pass band of the carrier substrate and the rejection band of the semiconductor structure overlaps; and transferring the semiconductor structure from the adhesive layer to a receiving substrate structure after the adhesion pressure of the adhesive layer is reduced.
US09722130B2
A method is disclosed for making semiconductor films from a eutectic alloy comprising a metal and a semiconductor. Through heterogeneous nucleation said film is deposited at a deposition temperature on relatively inexpensive buffered substrates, such as glass. Specifically said film is vapor deposited at a fixed temperature in said deposition temperature where said deposition temperature is above a eutectic temperature of said eutectic alloy and below a temperature at which the substrate softens. Such films could have widespread application in photovoltaic and display technologies.
US09722126B2
A photoconductive device that generates or detects terahertz radiation includes a semiconductor layer; a structure portion; and an electrode. The semiconductor layer has a thickness no less than a first propagation distance and no greater than a second propagation distance, the first propagation distance being a distance that the surface plasmon wave propagates through the semiconductor layer in a perpendicular direction of an interface between the semiconductor layer and the structure portion until an electric field intensity of the surface plasmon wave becomes 1/e times the electric field intensity of the surface plasmon wave at the interface, the second propagation distance being a distance that a terahertz wave having an optical phonon absorption frequency of the semiconductor layer propagates through the semiconductor layer in the perpendicular direction until an electric field intensity of the terahertz wave becomes 1/e2 times the electric field intensity of the terahertz wave at the interface.
US09722120B2
A method for fabricating a photovoltaic device includes forming a polycrystalline absorber layer including Cu—Zn—Sn—S(Se) (CZTSSe) over a substrate. The absorber layer is rapid thermal annealed in a sealed chamber having elemental sulfur within the chamber. A sulfur content profile is graded in the absorber layer in accordance with a size of the elemental sulfur and an anneal temperature to provide a graduated bandgap profile for the absorber layer. Additional layers are formed on the absorber layer to complete the photovoltaic device.
US09722119B2
A plurality of solar cell assembly series of a solar cell panel are so arranged that any two adjacent solar cells in the plurality of solar cell assembly series have a potential difference which does not exceed V volts which is a maximum output voltage of the plurality of solar cell assembly series.
US09722117B1
The disclosure relates to solar cell, and especially to a method for manufacturing a crystalline silicon solar cell module. The method includes: a) providing a solar cell module to be laminated, including a back plate, a first bonding layer, a crystalline silicon solar cell component, a second bonding layer and a top plate in contact in sequence, where the crystalline silicon solar cell component is a crystalline silicon solar cell or a cell string formed by connecting multiple crystalline silicon solar cells; b) laminating the solar cell module to be laminated under current injection, to obtain a laminated solar cell module; and c) installing a frame and a junction box on the laminated solar cell module, to obtain a crystalline silicon solar cell module. The crystalline silicon solar cell module is under the current injection during the laminating process, improving the performance against light-induced degradation.
US09722110B2
Plasmonic graphene is fabricated using thermally assisted self-assembly of plasmonic nanostructure on graphene. Silver nanostructures were deposited on graphene as an example.
US09722105B2
Approaches for forming solar cells with a converted seed layer as a buffer material and the resulting solar cells are described. In an example, a method of fabricating a solar cell includes converting regions of a seed layer disposed on a plurality of p-n junctions of the solar cell to form a pattern of interdigitated converted regions. The converted regions are configured to electrically insulate non-converted regions of the seed layer from each other and provide a barrier to a laser that is, in fabricating the solar cell, directed towards the seed layer such that the barrier substantially avoids degradation of at least the plurality of p-n junctions from the laser.
US09722101B2
A solar cell includes a photoelectric conversion section having first and second principal surfaces, and a collecting electrode formed on the first principal surface. The collecting electrode includes first and second electroconductive layers in this order from the photoelectric conversion section side, and includes an insulating layer between the first and second electroconductive layers. The insulating layer is provided with an opening, and the first and second electroconductive layers are in conduction with each other via the opening provided in the insulating layer. The solar cell has, on the first principal surface, the second principal surface or a side surface of the photoelectric conversion section, an insulating region freed of a short circuit of front and back sides of the photoelectric conversion section, and the surface of the insulating region is at least partially covered with the insulating layer.
US09722099B2
A light sensing device includes a substrate, a light sensing area on the substrate, and a light shielding layer over the substrate. The light shielding layer does not cover the light sensing area. At least one outgassing hole is formed through the light shielding layer.
US09722092B2
To provide a transistor with favorable electrical characteristics. A semiconductor device includes a first insulator over a substrate; a first metal oxide over the first insulator; a second metal oxide over the first metal oxide; a first conductor and a second conductor over the second metal oxide; a third metal oxide over the second metal oxide, the first conductor, and the second conductor; a second insulator over the third metal oxide; and a third conductor over the second insulator. The second metal oxide includes a region in contact with a top surface of the first metal oxide and regions in contact with side surfaces of the first metal oxide. The second metal oxide includes channel formation regions.
US09722084B2
There is disclosed a method for chemically treating a display glass substrate by treating at least one surface of the glass substrate with a heated solution containing HCl to form a depletion layer at the surface and under the surface of the glass substrate. The disclosure also relates to display glass substrates containing the depletion layer made by the disclosed process. In addition, the disclosure relates to methods of making thin-film transistors (“TFTs”) on these display glass substrates by depositing a Si layer directly on the chemically treated surface of the glass substrate, and annealing the Si layer to form polycrystalline silicon.
US09722083B2
An embodiment method of forming a source/drain region for a transistor includes forming a recess in a substrate, epitaxially growing a semiconductor material in the recess, amorphizing the semiconductor material, and doping the semiconductor material to form a source/drain region. In an embodiment, the doping utilizes either phosphorus or boron as the dopant. Also, the amorphizing and the doping may be performed simultaneously. The amorphizing may be performed at least in part by doping with helium.
US09722080B2
The present invention provides a semiconductor device, including a substrate, two gate structures disposed on a channel region of the substrate, an epitaxial layer disposed in the substrate between two gate structures, a first dislocation disposed in the epitaxial layer, wherein the profile of the first dislocation has at least two non-parallel slanting lines, and a second dislocation disposed adjacent to a top surface of the epitaxial layer, and the profile of the second dislocation has at least two non-parallel slanting lines.
US09722067B2
A semiconductor device includes a first nitride semiconductor layer, a source electrode on the first nitride semiconductor layer, a drain electrode on the first nitride semiconductor layer, a gate electrode on the first nitride semiconductor layer and between the source electrode and the drain electrode, a gate field plate electrode that is separated from the first nitride semiconductor layer, and includes one end in direct contact with the gate electrode, and the other end positioned between the gate electrode and the drain electrode, a first interlayer insulating film that is separated from the gate electrode and is between the gate field plate electrode and the first nitride semiconductor layer, and a second interlayer insulating film that is between the gate electrode and the first interlayer insulating film and has a dielectric constant higher than a dielectric constant of the first interlayer insulating film.
US09722052B2
A method of forming semiconductor fins is provided. Sacrificial fins are provided on a surface of substrate. A hard mask layer, formed around the sacrificial fins and the gaps therebetween, is made coplanar with a topmost surface of the sacrificial fins. A fin cut mask then covers a portion of the sacrificial fins and partly covers a sacrificial fin. Trenches are formed in the hard mask layer by removing sacrificial fins not covered by the fin cut mask and that portion of the sacrificial fin not partly covered by the fin cut mask. Spacers are formed on the sidewalls of the trenches and a plug is formed in the trench formed by removing that portion of the sacrificial fin not partly covered by the fin cut mask. Semiconductor fins are grown epitaxially in the trenches having the spacers from the exposed surface of the substrate upward.
US09722049B2
Embodiments described herein provide method for forming crystalline indium-gallium-zinc oxide (IGZO). A substrate is provided. A seed layer is formed above the substrate. The seed layer has a crystalline structure that is substantially dominant along the c-axis. An IGZO layer is formed above the seed layer. The seed layer may include zinc oxide. A stack of alternating seed layers and IGZO layers may be formed.
US09722047B2
The high-voltage transistor device comprises a semiconductor substrate (1) with a source region (2) of a first type of electrical conductivity, a body region (3) including a channel region (4) of a second type of electrical conductivity opposite to the first type of conductivity, a drift region (5) of the first type of conductivity, and a drain region (6) of the first type of conductivity extending longitudinally in striplike fashion from the channel region (4) to the drain region (6) and laterally confined by isolation regions (9). The drift region (5) comprises a doping of the first type of conductivity and includes an additional region (8) with a net doping of the second type of conductivity to adjust the electrical properties of the drift region (5). The drift region depth and the additional region depth do not exceed the maximal depth (17) of the isolation regions (9).
US09722037B2
An embodiment of a compound semiconductor device includes: a substrate; a nitride compound semiconductor stacked structure formed on or above the substrate; and a gate electrode, a source electrode and a drain electrode formed on or above the compound semiconductor stacked structure. A recess positioning between the gate electrode and the drain electrode in a plan view is formed at a surface of the compound semiconductor stacked structure.
US09722032B2
Methods and structures for improving the performance of integrated semiconductor transistors operating at high frequency and/or high power are described. Two capacitors may be connected to an input of a semiconductor transistor and tuned to suppress second-harmonic generation and to transform and match the input impedance of the device. A two-stage tuning procedure is described. The transistor may comprise gallium nitride and may be configured as a power transistor capable of handling up to 1000 W of power. A tuned transistor may operate at frequencies up to 6 GHz with a peak drain efficiency greater than 60%.
US09722021B2
An integrated circuit and method has an isolated well with an improved isolated well contact. The well contact diffusion is isolated from a device diffusion of opposite conductivity type within the isolated well by an isolation transistor gate.
US09722000B2
An organic light emitting device utilizing the micro-cavity effect in the RGB subpixel regions while suppressing the micro-cavity effect in the white subpixel region is provided. The organic light emitting device includes a lower substrate, an anode formed on the lower substrate, an organic emission layer formed on the anode, a cathode formed on the organic emission layer, and a reflection decreasing layer formed on at least a portion of the cathode for reducing reflection of the light emitted from the organic emission layer by the cathode to reduce the micro-cavity effect. Such a selective use of the micro-cavity effect in the organic light emitting device improves the color accuracy, the luminance efficiency and the lifespan of the top emission type organic light emitting device.
US09721992B2
An organic optoelectronic component and a method for operating an organic optoelectronic component are disclosed. In an embodiment an organic optoelectronic component includes an organic light emitting element including an organic functional layer stack having an organic light emitting layer between two electrodes and an organic light detecting element including a first organic light detecting element including a first organic light detecting layer, and a second organic light detecting element including a second organic light detecting layer, wherein the organic light emitting element and the organic light detecting element are arranged laterally adjacent on a common substrate, wherein the first organic light detecting element is configured to detect ambient light, wherein the second organic light detecting layer of the second organic light detecting element is arranged between two non-transparent layers, the non-transparent layers shade the second organic light detecting layer of the second organic light detecting element from ambient light.
US09721987B2
The semiconductor device includes a semiconductor substrate, an isolation feature, a photodiode and a transistor gate. The isolation feature is disposed in the semiconductor substrate. The photodiode is disposed in the semiconductor substrate and adjacent to the isolation feature. The photodiode includes a first pinned photodiode (PPD) with a first dopant type and a second PPD with a second dopant type. The second PPD is embedded in the first PPD, and is different from the first dopant type. The transistor gate is disposed over the photodiode and includes a first portion and a second portion. The first portion with the first dopant type is used for controlling the operation of the semiconductor device. The second portion with the second dopant type is adjacent to the first portion. The second portion covers the photodiode and extends toward the isolation feature.
US09721985B2
A solid state imaging device including a semiconductor layer comprising a plurality of photodiodes, a first antireflection film located over a first surface of the semiconductor layer, a second antireflection film located over the first antireflection film, a light shielding layer having side surfaces which are adjacent to at least one of first and the second antireflection film.
US09721984B2
Semiconductor devices and back side illumination (BSI) sensor manufacturing methods are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a workpiece and forming an integrated circuit on a front side of the workpiece. A grid of a conductive material is formed on a back side of the workpiece using a damascene process.
US09721982B2
A tunneling field effect transistor for light detection, including a p-type region connected to a source terminal, a n-type region connected to a drain terminal, an intrinsic region located between the p-type region and the n-type region to form a P-I junction or an N-I junction with the n-type region or the p-type region, respectively, a first insulating layer and a first gate electrode, the first gate electrode covering a portion of the intrinsic region on one side, and a second insulating layer and a second gate electrode, the second insulating layer and the second gate electrode covering an entire other side of the intrinsic region opposite to the one side, wherein an area of the intrinsic region that is not covered by the first gate electrode forms a non-gated intrinsic area configured for light absorption.
US09721978B2
Various embodiments provide a thin film transistor (TFT) device, a manufacturing method of the TFT device, and a display apparatus including the TFT device. An etch stop layer (ESL) material is formed on an active layer on a substrate. An electrical conductive layer material is formed on the ESL material for forming a source electrode and a drain electrode. The electrical conductive layer material is patterned to form a first portion of the source electrode containing a first via-hole through the source electrode, and to form a first portion of the drain electrode containing a second via-hole through the drain electrode. The ESL material is patterned to form an etch stop layer (ESL) pattern including a first ESL via-hole connecting to the first via-hole through the source electrode and including a second ESL via-hole connecting to the second via-hole through the drain electrode.
US09721969B2
Devices and methods for forming a device are presented. The method for forming the device includes providing a support substrate having first crystal orientation. A trap rich layer is formed on the support substrate. An insulator layer is formed over a top surface of the trap rich layer. The method further includes forming a top surface layer having second crystal orientation on the insulator layer. The support substrate, the trap rich layer, the insulator layer and the top surface layer correspond to a substrate and the substrate is defined with at least first and second device regions. A transistor is formed in the top surface layer in the first device region and a wide band gap device is formed in the second device region.
US09721964B2
A memory device includes a plurality of stacks of conductive strips alternating with insulating strips. At least one of the insulating strips includes an insulating material with a dielectric constant equal to or lower than 3.6. A plurality of structures of a conductive material is arranged orthogonally over the stacks. Memory elements are disposed in interface regions at cross-points between side surfaces of the stacks and structures. The insulating strips can have equivalent oxide thicknesses EOT substantially greater than their respective physical thicknesses. The EOT can be at least 10% greater than the respective physical thicknesses. The at least one of the insulating strips can consist essentially of the insulating material with a dielectric constant equal to or lower than 3.6.
US09721954B2
To reinforce power supply wirings without sacrificing the interconnectivity of semiconductor devices. When three wirings are formed in parallel in the same wiring layer and the center wiring among them is shorter than the outer wirings, a projecting portion integrated into the outer wiring is formed utilizing a free space remaining on the extension of the center wiring. For example, when the outer wirings are used as power supply wirings, the power supply wirings can be reinforced by adding the projecting portion. At this time, because the projecting portion is arranged in the free space, the interconnectivity is not sacrificed.
US09721947B2
A semiconductor device includes a semiconductor substrate, and first and second transistors over the semiconductor substrate. Both the first and second transistors are p-type transistors or both the first and second transistors are n-type transistors. The first and second transistors have the same nominal operating voltage. The first transistor has a higher threshold voltage than the second transistor. The second transistor has at least one of a source region or a drain region with higher charge carrier mobility than at least one of a source region or a drain region of the first transistor.
US09721945B2
A semiconductor device includes: an IGBT section including a vertical IGBT; and a diode section arranged along the IGBT section and including a diode. The diode section includes a hole injection reduction layer having a first conductivity type and arranged in an upper layer portion of a drift layer, extending to a depth deeper than an anode region constituted by a second conductivity type region in the diode section, having an impurity concentration lower than an impurity concentration of the anode region and higher than an impurity concentration of the drift layer.
US09721936B2
Field-effect transistor (FET) stack voltage compensation. In some embodiments, a switching device can include a first terminal and a second terminal, and a plurality of switching elements connected in series between the first and terminal and the second terminal. Each switching element has a parameter that is configured to yield a desired voltage drop profile among the connected switching elements. Such a desired voltage drop profile can be achieved by some or all FETs in a stack having variable dimensions such as variable gate width or variable numbers of fingers associated with the gates.
US09721935B2
A semiconductor device includes a first chip, a second chip stacked on the first chip, and a third chip stacked on the second chip. The second chip includes a second semiconductor layer having a second circuit surface facing the first wiring layer and a second rear surface opposite to the second circuit surface, a second wiring layer provided on the second circuit surface and connected to a first wiring layer of the first chip, and a second electrode extending through the second semiconductor layer and connected to the second wiring layer. The third chip includes a third semiconductor layer having a third circuit surface and a third rear surface facing the second chip, a third wiring layer provided on the third circuit surface, and a third electrode extending through the third semiconductor layer, connected to the third wiring layer and connected to the second electrode through bumps.
US09721925B2
A semiconductor device is made by forming first and second interconnect structures over a first semiconductor die. A third interconnect structure is formed in proximity to the first die. A second semiconductor die is mounted over the second and third interconnect structures. An encapsulant is deposited over the first and second die and first, second, and third interconnect structures. A backside of the second die is substantially coplanar with the first interconnect structure and a backside of the first semiconductor die is substantially coplanar with the third interconnect structure. The first interconnect structure has a height which is substantially the same as a combination of a height of the second interconnect structure and a thickness of the second die. The third interconnect structure has a height which is substantially the same as a combination of a height of the second interconnect structure and a thickness of the first die.
US09721924B2
The stack package includes a substrate body layer having a top surface and a bottom surface, first circuit patterns disposed on the bottom surface of the substrate body layer, second circuit patterns disposed on the top surface of the substrate body layer, a first semiconductor chip including first bumps, and a second semiconductor chip including second bumps. The first bumps extend through the substrate body layer to be electrically coupled to the first circuit patterns, and the second bumps extend past sidewalls of the first semiconductor chip to be electrically coupled to the second circuit patterns. The second semiconductor chip is stacked on the first semiconductor chip.
US09721918B2
A package component includes a dielectric layer and a metal pad over the dielectric layer. A plurality of openings is disposed in the metal pad. The first plurality of openings is separated from each other by portions of the metal pad, with the portions of the metal pad interconnected to form a continuous metal region.
US09721917B2
A semiconductor device is provided with a semiconductor chip. The semiconductor chip has a semiconductor substrate, an interconnect layer, an inductor and conductive pads (first pads). The interconnect layer is provided on the semiconductor substrate. The interconnect layer includes the inductor. The pads are provided on the interconnect layer. The pads are provided in a region within a circuit forming region of the semiconductor chip, which does not overlap the inductor.
US09721914B2
An array substrate for a display device can include a substrate, a pad positioned on the substrate, an insulating layer positioned on the pad and including a plurality of open portions exposing the pad, a first metal layer positioned on the insulating layer and disposed to be in contact with the pad, a second metal layer positioned on the first metal layer, and a bump electrode positioned on the second metal layer and including a plurality of dimples.
US09721906B2
An electronic package that includes a substrate and a die attached to the substrate. A plurality of supports attached to the substrate adjacent to the die. At least one support in the plurality of supports is positioned adjacent to at least one corner of the die such that the at least one corner of the die is positioned adjacent to the at least one support. Other example forms relate to a method of fabricating an electronic package. The method includes securing a die to a substrate and securing a plurality of supports to the substrate such that at least one support is adjacent to at least one corner of the die.
US09721903B2
A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed on an upper surface of an encapsulant encapsulating the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The metal shield may be electrically coupled to the ground layer using one or more conductive structures located in the encapsulant. The conductive structures may be located on a perimeter of the components in the SiP. The conductive structures may provide a substantially vertical connection between the substrate and the shield on the upper surface of the encapsulant.
US09721902B2
The present disclosure relates to a radio frequency (RF) unit of a base station, and more particularly, to a method of manufacturing an RF power amplifier module, an RF power amplifier module, an RF module, and a base station. The RF power amplifier module includes at least a power device, a power circuit board, a heat-dissipation substrate, and input/output ports. A power device die of the power device and the power circuit board are mounted on the heat-dissipation substrate. The power device die is connected to the power circuit board through packaging lead wires. In one exemplary embodiment, a heat-dissipation effect and manufacturing efficiency of the RF power amplifier module are improved and a cost of the RF power amplifier module is reduced.
US09721901B2
Disclosed is a thin-film transistor substrate including: a substrate; a thin-film transistor formed on the substrate and including an active layer, a gate electrode, a source electrode, and a drain electrode; an identification (ID) mark formed on the substrate; and a metal layer contacting an upper surface of the ID mark.
US09721892B2
A semiconductor device and method for manufacturing the same are provided. The method includes providing a semiconductor substrate, forming a porous low-k dielectric layer on the semiconductor substrate, forming a through-hole and a trench of a copper interconnect structure, performing a helium plasma treatment on an exposed surface of the porous low-k dielectric layer, performing a nitrogen plasma treatment on the exposed surface of the porous low-k dielectric layer to form a silicon nitride layer, performing an argon plasma treatment on the silicon nitride layer, and forming a diffusion barrier layer on bottoms and sidewalls of the through-hole and the trench of the copper interconnect structure. Through the successive helium, nitrogen and argon plasma treatments, the low-k dielectric layer has a smooth and dense surface that increases the adhesion strength between the low-k dielectric layer and the diffusion barrier layer to improve reliability and yield of the semiconductor device.
US09721891B2
An integrated circuit device includes a first metal layer including aluminum. The integrated circuit device includes a second metal layer including an interconnect structure. The interconnect structure includes a layer of first material including aluminum. The integrated circuit device includes an inter-diffusion layer that includes aluminum. The inter-diffusion layer is proximate to the first metal layer and proximate to the layer of first material including aluminum. The integrated circuit device includes an aluminum oxide barrier layer. The aluminum oxide barrier layer is proximate to a dielectric layer and proximate to the layer of first material including aluminum.
US09721889B1
Integrated circuit (IC) structure embodiments and methods of forming them with middle of the line (MOL) contacts that incorporate a protective cap, which provides protection from damage during back end of the line (BEOL) processing. Each MOL contact has a main body in a lower portion of a contact opening. The main body has a liner (e.g., a titanium nitride layer) that lines the lower portion and a metal layer on the liner. The MOL contact also has a protective cap in an upper portion of the contact opening above the first metal layer and extending laterally over the liner to the sidewalls of the contact opening. The protective cap has an optional liner, which is different from the liner in the lower portion, and a metal layer, which is either the same or different than the metal in the main body.
US09721881B1
A method of forming a semiconductor device assembly includes forming an interposer having an opening extending from a first major surface to a second major surface of the interposer and a plurality of external connectors on the second major surface. The method further includes attaching the first major surface of the interposer to a packaged semiconductor device, wherein the opening of the interposer exposes the packaged semiconductor device.
US09721874B2
Pre-encapsulated lead frames suitable for use in microelectronic device packages are disclosed. Individual lead frames can include a set of multiple lead fingers arranged side by side with neighboring lead fingers spaced apart from each other by a corresponding gap. An encapsulating compound at least partially encapsulates the set of lead fingers without encapsulating a microelectronic device. The encapsulating compound can generally fill the plurality of gaps between two adjacent lead fingers.
US09721870B2
A cooling structure for large electronic boards with closely-spaced heterogeneous die and packages is disclosed. The assembly includes a frame having a plurality of openings. The assembly further includes a cold plate mounted to the frame. The cold plate includes at least one inlet and at least one outlet and fluid channels in communication with the at least one inlet and the at least one outlet. The assembly further includes a heat sink mounted within each of the plurality of openings which in combination with sidewalls of the openings of the frame and the cold plate form individual compartments each of which are in fluid communication with the fluid channels.
US09721869B2
The heat sink structure includes a vapor chamber, a heat pipe, and capillary elements. The vapor chamber includes a housing, a first capillary structure covering inside the housing, and a first working fluid filled inside the housing. The housing includes through holes and an inner top wall. Both ends of the heat pipe are inserted through the two through holes respectively and are exposed from the housing. The heat pipe includes a pipe body, a second capillary structure covering inside the pipe body, and a second working fluid filled inside the pipe body. Each of the capillary elements is connected to the inner top wall. One end of each of the capillary elements is in contact with the first capillary structure, and the other end of each of the capillary elements is in thermal contact with the heat pipe.
US09721864B2
A hermetically sealed electronic device and method of fabrication are provided. A base layer of a wafer is created using a substrate formed from ultra-thin glass or ceramic using panel or roll to roll processing. One or more layers are bonded to the base layer. The wafer is singulated into a plurality of electronic devices having a top surface and a plurality of sides. A hermetic sealant is applied to each electronic device to completely encase the top surface and the sides while bonding to the base layer. At least one of the layers is a metallization layer formed by metal deposition. Full metallization may be applied over the entire wafer and a pattern subsequently transferred to the full metallization by one of laser and chemical etching. The electronic device may further include at least one electronic component attached to one of the layers and encased by the hermetic sealant.
US09721860B2
A packaged transistor device (100) comprises a semiconductor chip (101) including a transistor with terminals distributed on the first and the opposite second chip side; and a slab (110) of low-grade silicon (l-g-Si) configured as a ridge (111) framing a depression including a recessed central area suitable to accommodate the chip, the ridge having a first surface in a first plane and the recessed central area having a second surface in a second plane spaced from the first plane by a depth (112) at least equal to the chip thickness, the ridge covered by device terminals (120; 121) connected to attachment pads in the central area having the terminals of the first chip side attached so that the terminals (103) of the opposite second chip side are co-planar with the device terminals on the slab ridge.
US09721850B2
A method for making a three-dimensional integrated electronic circuit is provided, including making a first electrically conductive portion on a first dielectric layer covering a first semiconductor layer; then making a second dielectric layer covering the first electrically conductive portion such that it is disposed between the first and second dielectric layers, and a second semiconductor layer disposed on the second dielectric layer; then making a first electronic component in the second semiconductor layer, and a second electronic component in the first semiconductor layer; then making an electrical interconnection electrically linking the first and second electronic components together, of which a first part passes through the first dielectric layer and electrically connects the second electronic component to the first electrically conductive portion and of which a second part passes through a part of the second dielectric layer and electrically connects the first electronic component to the first electrically conductive portion.
US09721849B2
A CMOS integrated circuit containing an isolated n-channel DEMOS transistor and an isolated vertical PNP transistor has deep n-type wells and surrounding shallow n-type wells providing isolation from the p-type substrate. The isolated n-channel DEMOS transistor has an upper n-type layer providing an extended drain, and a lower p-type layer isolating the extended drain from the underlying deep n-type well. The isolated vertical PNP transistor has an upper n-type layer providing a base and a lower p-type layer providing a collector. A CMOS integrated circuit having opposite polarities of the transistors may be formed by appropriate reversals in dopant types.
US09721848B1
A semiconductor device includes a first fin and a second fin arranged on a substrate, a gate stack arranged over a channel region of the first fin, and spacers arranged along sidewalls of the gate stack. A cavity is arranged adjacent to a distal end of the gate stack. The cavity is defined by the substrate, a distal end of the second fin, and the spacers. A dielectric fill material is arranged in the cavity such that the dielectric fill material contacts the substrate, the distal end of the second fin, and the spacers.
US09721841B1
An electronic circuit includes a plurality of fin lines on a substrate and a plurality of gate lines with a first line width, crossing over the fin lines. The gate lines are parallel and have a plurality of discontinuous regions forming as a plurality of slots. A region of any one of the gate lines adjacent to an unbalance of the slots has a second line width smaller than the first line width.
US09721839B2
Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer including a plurality of integrated circuits includes forming a water soluble mask above the semiconductor wafer, the water soluble mask covering and protecting the integrated circuits. The method also includes baking the water soluble mask to increase the etch resistance of the water soluble mask. The method also includes, subsequent to baking the water soluble mask, patterning the water soluble mask with a laser scribing process to provide a water soluble patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The method also includes plasma etching the semiconductor wafer through the gaps in the water soluble patterned mask to singulate the integrated circuits.
US09721834B2
A method for filling gaps between structures includes forming a plurality of high aspect ratio structures adjacent to one another with gaps, forming a first dielectric layer on tops of the structures and conformally depositing a spacer dielectric layer over the structures. The spacer dielectric layer is removed from horizontal surfaces and a protection layer is conformally deposited over the structures. The gaps are filled with a flowable dielectric, which is recessed to a height along sidewalls of the structures by a selective etch process such that the protection layer protects the spacer dielectric layer on sidewalls of the structures. The first dielectric layer and the spacer dielectric layer are exposed above the height using a higher etch resistance than the protection layer to maintain dimensions of the spacer layer dielectric through the etching processes. The gaps are filled by a high density plasma fill.
US09721825B2
Some embodiments include a method. The method can include providing a carrier substrate having an edge. Further, the method can include providing a cross-linking adhesive, and providing a flexible substrate having an edge. Further still, the method can include coupling the flexible substrate to the carrier substrate using the cross-linking adhesive such that at least a portion of the edge of the flexible substrate is recessed from the edge of the carrier substrate and such that the cross-linking adhesive has an exposed portion of the cross-linking adhesive at an offset portion of the first surface of the carrier substrate between the at least the portion of the edge of the flexible substrate and the edge of the carrier substrate. Meanwhile, the method can include etching the exposed portion of the cross-linking adhesive. Other embodiments of related methods and devices are also disclosed.
US09721816B2
A decapsulation apparatus has an etch plate, an off-center etch head having an opening, a cover sealing to the etch plate forming an etching chamber, a gasket surrounding the opening, a ram sealed through the cover, a pressure-controlled source of Nitrogen or inert gas continuously purging the etching chamber at a low gas pressure, a f toggle mechanism mounted to a metal plate t, an etchant supply subsystem comprising sources of etchant solutions, an etchant solution pump, supply passages and controls to select etchants and etchant ratios, and a heat exchanger heating or cooling the etchant solution, etchant waste passages f conducting used etchant away. Etchants are mixed in the passages to the reaction region, and turbulence in the reaction region is promoted by impinging etchant solution on the encapsulated device.
US09721812B2
A method for fabricating an optical multi-chip module (MCM) includes temporarily curing an underfill material on a chip including an optical device to prevent flow of the underfill material. The chip is flip-chip mounted on a waveguide module having a mirror for directing light to or from the chip, wherein the underfill material is disposed between the chip and the waveguide module. The underfill material is cured to adhere the chip to the waveguide module.
US09721808B2
Methods of fabricating a semiconductor device are provided. The methods may include forming a stopper layer on a target layer including a cell area and an edge area, forming a hard mask including first upper openings and dam trench on the stopper layer, forming opening spacers on inner walls of the first upper openings and a dam pattern in the dam trench, removing the stopper layer exposed in the first upper openings to form first lower openings, forming pillar patterns in the first lower openings and the first upper openings and an eaves pattern on the dam pattern, removing the hard mask in the cell area, forming a first polymer block between the pillar patterns including second upper openings, etching the stopper layer exposed in the second upper openings to form second lower openings, and removing the first polymer block, the pillar patterns, the dam pattern and the eaves pattern.
US09721807B2
Embodiments described herein relate to methods for patterning a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment on a spacer material, performing an etching process on a treated region of the spacer material, and repeating the inert plasma treatment and the etching process to form a desired spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as process gas ratios and pressures, may be controlled to influence a desired spacer profile.
US09721806B2
The disclosed subject matter provides an LDMOS device and fabrication method thereof. In an LDMOS device, a drift region and a body region are formed in a substrate. A first trench is formed in the drift region and in the substrate between the drift region and the body region. The first trench is separated from the drift region by a first shallow trench isolation structure. A gate dielectric layer is formed on a side surface and a bottom surface of the first trench. A gate electrode filling up the first trench is formed on the gate dielectric layer with a top surface above a top surface of the semiconductor substrate. A source region is formed in the body region on one side of the gate electrode and a drain region is formed in the drift region on another side of the gate electrode.
US09721793B2
Techniques herein provide precise cuts for fins and nanowires without needing dummy gate pairs to compensate for overlay misalignment. Techniques herein include using an etch mask to remove designated portions of gate structures to define a trench or open space having fin structures, nanowires, etc. The uncovered fin structures are etched away or otherwise removed from the trench segments. The etch mask and material defining the trench provide a combined etch mask for removing uncovered fin portions. Subsequently the trench segments are filled with dielectric material. Without needed dummy gate pairs a given substrate can fit significantly more electrical devices per unit area.
US09721791B2
According to an embodiment of a method of fabricating III-Nitride semiconductor dies, the method includes: growing a III-Nitride body over a group IV substrate in a semiconductor wafer; forming at least one device layer over the III-Nitride body; etching grid array trenches in the III-Nitride body and in the group IV substrate; forming an edge trench around a perimeter of the semiconductor wafer, the grid array trenches terminating inside the group IV substrate; and forming separate dies by cutting the semiconductor wafer approximately along the grid array trenches.
US09721780B2
A method of mass spectrometry is disclosed comprising separating ions according to one or more physico-chemical properties. Ions which are onwardly transmitted to a Time of Flight mass analyzer are controlled by attenuating ions which would otherwise be transmitted to the Time of Flight mass analyzer and cause saturation of an ion detector and which have been determined or which are predicted to have a relatively high intensity.
US09721778B2
A mass spectrometer (1) is provided with: an ionization chamber (10) for ionizing a sample (S) on its surface at an analysis point through irradiation by a laser beam; an analysis chamber (23) having a mass spectroscope (24) for detecting ions; a middle vacuum chamber (21, 22) arranged between the ionization chamber (10) and the analysis chamber (23); and an introduction pipe (12) or an introduction hole for allowing the inside of the housing (11) of the ionization chamber (10) to communicate with the inside of the middle vacuum chamber (21), wherein ions and fine particles, which have not been drawn into the introduction pipe (12) or introduction hole, can be prevented from spreading inside of the chamber. The structure of the mass spectrometer (1) further includes: an exhaust pipe (13); and a fan (15) for drawing air into the exhaust pipe (13) so that air that contains ions and/or fine particles, which have not been introduced into the introduction pipe (12) or introduction hole, can be suctioned up into the exhaust pipe (13) when the fan (15) is in operation.
US09721776B2
After a sample such as a biomedical tissue section is attached to an electrically-conductive slide glass (S1), the film layer of a matrix substance is appropriately formed by vapor deposition so as to cover the sample (S2). The crystal of the matrix substance in the film layer is very fine and uniform. Subsequently, the slide glass on which the matrix film layer is formed is placed in a vaporized solvent atmosphere, and the solvent infiltrates into the matrix film layer (S3). When the solvent sufficiently infiltrated is vaporized, a substance to be measured in the sample takes in the matrix and re-crystallized. Furthermore, the matrix film layer is formed again on the surface by the vapor deposition (S4). The added matrix film layer absorbs excessive energy of a laser beam during MALDI, which suppresses the denaturation of the substance to be measured and the like, so that high detection sensitivity can be achieved while high spatial resolution is maintained.
US09721768B2
Disclosed is an apparatus for optical emission spectroscopy which includes a light measuring unit measuring light in a process chamber performing a plasma process on a substrate, a light analyzing unit receiving light collected from the light measuring unit to analyze a plasma state, a control unit receiving an output signal of the light analyzing unit to process the output signal, and a light collecting controller disposed between the process chamber and the light measuring unit so as to be combined with the light measuring unit. The light collecting controller controls the light collected to the light measuring unit.
US09721766B2
A method for processing a target object includes a formation step of forming a silicon oxide film in a processing chamber by repeatedly executing a sequence including a first step of supplying a first gas containing aminosilane-based gas, a second step of purging a space in the processing chamber after the first step, a third step of generating a plasma of a second gas containing oxygen gas after the second step, and a fourth step of purging the space after the third step. The method further includes a preparation step executed before the target object is accommodated in the processing chamber and a processing step of performing an etching process on the target object. The preparation step is performed before the processing step. The formation step is performed in the preparation step and the processing step. In the first step, a plasma of the first gas is not generated.
US09721763B2
A gas supply system for providing a plurality of process gases to a process chamber includes a plurality of mass flow controllers each arranged to receive a respective subset of the plurality of process gases. Each of the respective subsets includes more than one of the process gases, and at least one of the process gases is provided to more than one of the plurality of mass flow controllers. Respective valves are arranged upstream of each of the plurality of mass flow controllers to selectively provide the respective subsets to the mass flow controllers. A first quantity of the plurality of mass flow controllers is less than a total number of the plurality of process gases to be supplied to the process chamber. The first quantity is equal to a maximum number of the plurality of process gases to be used in the process chamber at any one time.
US09721759B1
Described herein are techniques for supplying radio frequency (RF) power to a large area plasma source so as to produce a plasma that is substantially uniform in two spatial dimensions. The RF power may be supplied by a power supply system, which may comprise a RF source and a distribution network. The distribution network may comprise a matching network, and a branching circuit that divides the RF power into several branches. Each of the branches of the distribution network may include a phase shifter that shifts the RF signal (which carries the RF power) by an odd multiple of 90°, and a blocking filter which blocks any harmonics and other unwanted frequencies which are reflected from a plasma source. The output of the branches may be coupled to feed points that are spatially distributed over the one or more electrodes of the plasma source.
US09721756B2
A charged particle beam writing apparatus includes a storage unit to store writing data of a region to be written in a target object, a first dividing unit to read the writing data and divide the region to be written into at least one first data processing region that overlaps with at least a first region where a pattern has been arranged, and at least one second data processing region that overlaps with a second region where no pattern is arranged without overlapping with the first region, a data processing unit to perform data processing of predetermined data processing contents for at least one first data processing region without performing the data processing for at least one second data processing region, and a writing unit to write a pattern on the target object, based on processed data.
US09721755B2
A device for detecting X-rays radiated out of a substrate surface, said device comprising at least one X-ray detector, a resolver grating and a modulator grating, said resolver grating with at least one opening facing towards said X-ray detector is arranged in front of said X-ray detector. Said modulator grating is provided between said resolver grating and said substrate at a predetermined distance from said resolver grating and said substrate, where said modulator grating having a plurality of openings in at least a first direction, wherein said x-rays from said surface is spatially modulated with said modulator grating and resolver grating.
US09721754B2
The invention relates to a method for processing a substrate with a focussed particle beam which incidents on the substrate, the method comprising the steps of: (a) generating at least one reference mark on the substrate using the focused particle beam and at least one processing gas, (b) determining a reference position of the at least one reference mark, (c) processing the substrate using the reference position of the reference mark, and (d) removing the at least one reference mark from the substrate.
US09721752B2
The objective of the present invention is to maintain the surrounding of a sample at atmospheric pressure and efficiently detect secondary electrons. In a sample chamber of a charged particle device, a sample holder (4) has: a gas introduction pipe and a gas evacuation pipe for controlling the vicinity of a sample (20) to be an atmospheric pressure environment; a charged particle passage hole (18) and a micro-orifice (18) enabling detection of secondary electrons (15) emitted from the sample (20), co-located above the sample (20); and a charged particle passage hole (19) with a hole diameter larger than the micro-orifice (18) above the sample (20) so as to be capable of actively evacuating gas during gas introduction.
US09721749B2
The present invention provides an X-ray generator including an X-ray tube 2 radiating primary X-rays X1 to a specimen S, a housing 3 accommodating the X-ray tube 2, an X-ray radiation area controller 4 limiting the radiation area of the primary X-rays X1 from the X-ray tube 2 to the specimen S, and a device holder 5 holding the X-ray radiation area controller 4 with respect to the housing 3. The X-ray tube includes a case 6, an electron ray source 7 generating electron rays, and a target unit 8 having a base fixed to the case and receiving electron rays through a protruding free end. The device holder has a fixed-base 5a fixed to the housing, directly under the base of the target unit, and a supporting extension 5b extending from the fixed-base in the protrusion direction of the target unit and supporting the X-ray radiation area controller.
US09721747B2
A grid of the present invention is a plate-shaped grid provided with a hole. The grid is formed of a carbon-carbon composite including carbon fibers arranged in random directions along a planar direction of the grid, and the hole is formed in the grid so as to cut off the carbon fibers.
US09721742B1
A power loss protection integrated circuit includes a current switch circuit portion (eFuse) and an autonomous limit checking circuit. The limit checking circuit includes an input analog multiplexer, an ADC, a plurality of capture registers, a state machine, and a flag output terminal. For each capture register, the limit checking circuit further includes an associated lower limit register and an associated upper limit register. The state machine controls the multiplexer and the capture registers so the ADC digitizes voltages on various nodes to the monitored, and stores the results into corresponding capture registers. In integrated circuit has circuitry that allows both a high voltage as well as a high current to be monitored. The value in a capture register is compared to upper and lower limit values. If any capture value is determined to be outside the limits, then a digital flag signal is asserted onto the flag output terminal.
US09721739B2
A DC voltage switch for high-voltage on-board electrical systems having a housing, at least two stationary contacts, and a moving contact, wherein, in each case, a first contact region of the stationary contacts is routed out of the housing and, in each case, a second contact region of the stationary contacts is arranged in a switching chamber of the housing with the moving contact, wherein the housing is hermetically encapsulated, wherein a cooling chamber which is separated from the switching chamber by a partition wall is arranged above the switching chamber, wherein the partition wall has at least one outlet opening and at least one inlet opening.
US09721732B2
A production method efficiently produces a box sealed type solid electrolytic capacitor in which a capacitor element is accommodated in a box-shaped case. The method includes a step of preparing a bottom wall substrate having bottom walls. A step forms cathode anode circuit patterns on the bottom wall substrate. A step prepares a peripheral side wall substrate having peripheral side walls. A step prepares a peripheral side wall substrate in which a plurality of through-holes are provided that correspond to plurality of bottom wall structural portions. A step fixes a capacitor element to each bottom wall structural portion of the bottom wall substrate. A step obtains a capacitor continuous member in which a plurality of capacitor structural portions structuring a solid electrolytic capacitor by attaching an upper lid substrate on the peripheral side wall substrate. A step obtains a plurality of solid electrolytic capacitors by cutting the capacitor continuous member.
US09721711B2
A switch structure includes a power element, a keypad, a first magnetic component, and a second magnetic component. The second magnetic component is positioned adjacent to the first magnetic component. When the keypad is deactivated, a magnetic attractive force is generated between the first magnetic component and the second magnetic component. When the keypad is activated, the power element controls the first magnetic component to generate a magnetic repulsive force with the second magnetic component.
US09721710B2
The present invention generally relates to an apparatus and method for axially supporting a shaft. In one aspect, a magnetic suspension system for supporting a shaft in a housing is provided. The magnetic suspension system includes an array of magnet members disposed between the shaft and the housing. The array of magnet members comprising a first magnet member, a second magnet member, and a third magnet member, wherein the first magnet member and the second magnet member generate a first force that is substantially parallel to a longitudinal axis of the shaft and the second magnet member and the third magnet member generate a second force that is substantially parallel with the longitudinal axis of the shaft The first force and the second force are configured to position the shaft axially within the housing. In another aspect, a method of supporting a shaft along a longitudinal axis of a housing is provided. In a further aspect, a suspension system for supporting a shaft in a housing is provided.
US09721708B2
There is provided a high-temperature superconducting (HTS) coil and a method of manufacturing the same, allowing simple and excellent affixation between side panels for cooling the superconducting coil and the HTS coil while inhibiting delamination of an HTS wire. The method of manufacturing the HTS coil including the rare-earth-based HTS wire of the superconducting coil and side panels for cooling the superconducting coil which are affixed thereto, windings of the rare-earth-based HTS wire of the superconducting coil being separated between turns, includes: utilizing a tape-like polytetrafluoroethylene (PTFE) film 3 as an insulator between the windings of the rare-earth-based HTS wire 2 to form a PTFE-film co-wound superconducting coil; impregnating the PTFE-film co-wound superconducting coil 4 with epoxy resin 6; and affixing the side panels 5 to the PTFE film co-wound superconducting coil 4.
US09721703B2
A wildlife guard apparatus for an electrical insulator body includes at least one guard assembly. Each guard assembly includes a guard member and a base wall member secured to the guard member. The at least one guard assembly is configured or configurable to form an enclosure defining a chamber. In the enclosure configuration, the at least one guard member defines an end opening communicating with the chamber and the at least one base wall member extends across the end opening to close at least a portion thereof. The enclosure is configured to receive the insulator body such that the insulator body includes a first portion and a second portion, the first portion extending through the end opening and adjacent the at least one base wall member, and the second portion being disposed in the chamber. The at least one guard member is formed of a first material and the at least one base wall member is formed of a second material that is softer than the first material.
US09721702B1
Virtually-integrated wire harness design and automated production systems and methods that achieve completely integrated data management by automatically producing scripts to dynamically propagate production commands and data to various subsystems for handling assembling necessary circuits and wire harness layout boards to produce corresponding batches of wire harnesses while script-based methods control configuring, testing, and using wire harness layout boards, and assembling, testing, reworking, and delivering wire harnesses. As derived from CAD-created specifications, the production system uses a programmable, automated wire C&C center prepares individual wire circuits. While automatic wire indexing, sorting, and delivery systems transfer circuits into, and retrieve circuits from, a transportable programmable, automated, indexed storage system equipped with an array of individual circuit tubes, and a script-controlled assembly system sends visual, aural, and other cues to help an assembler populate and configure a wire harness layout board with connector blocks and turn posts, and guides the assembler in building, testing, reworking, and delivering the corresponding batch of wire harnesses.
US09721699B2
A water-stop structure including a water-stop tube is provided in which the water-stop tube can be brought into intimate contact with a water-stop region in a wire harness having a steep thickness gradient and thus water-stop performance is improved. The wire harness includes a first portion and a second portion that is thinner than the first portion. An inner water-stop tube covers the water-stop region ranging from the first portion to the second portion in a state where the inner water-stop tube is heated and shrunk. An outer water-stop tube covers the inner water-stop tube at a position between a portion on the first portion side and a portion on the second portion side in the water-stop region in a state where the outer water-stop tube is heated and shrunk.
US09721684B2
Methods and systems for detecting an individual leaking fuel channel included in a reactor. One system includes a plurality of inlet lines and a plurality of outlet lines. Each of the plurality of inlet lines feeding annulus fluid in parallel to an annulus space of each of a first plurality of fuel channels included in the reactor, and each of the plurality of outlet lines collecting in parallel annulus fluid exiting an annulus space of each of a second plurality of fuel channels included in the reactor. In some embodiments, the system also includes a detector positioned at an outlet of each of the plurality of outlet lines configured to detect moisture in annulus fluid and identify a first position of an individual leaking fuel channel, and an isolation valve positioned at an inlet of each of the plurality of inlet lines operable to stop annulus fluid from circulating through one of the plurality of inlet lines and to identify a second position of the individual leaking fuel channel.
US09721680B2
A method of operating a nuclear reactor is provided. The method includes defining a layer increment of a deposit layer modeling a deposit on a heat transfer surface of the nuclear reactor; periodically updating a thickness of the deposit layer by adding the layer increment to the deposit layer; recalculating properties of the deposit layer after each layer increment is added to the deposit layer; determining a temperature related variable of the heat transfer surface as a function of the recalculated properties of the deposit layer; and altering operation of the nuclear reactor when the temperature related variable of the heat transfer surface reaches a predetermined value. A method of modeling a deposit on a heat transfer surface of a nuclear reactor is also provided.
US09721672B1
Systems and methods for improving the reliability of data stored in memory cells are described. To mitigate the effects of trapped electrons after one or more programming pulses have been applied to memory cells, a delay between the one or more programming pulses and subsequent program verify pulses may be set based on a chip temperature, the number of the one or more programming pulses that were applied to the memory cells, and/or the programming voltage that was applied to the memory cells during the one or more programming pulses. To mitigate the effects of residual electrons after one or more program verify pulses have been applied to memory cells, a delay between the one or more program verify pulses and subsequent programming pulses may be set based on a chip temperature and/or the programming voltage to be applied to the memory cells during the subsequent programming pulses.
US09721666B2
A memory system includes a semiconductor memory device having memory cells arranged in rows and columns, and a controller configured to issue a write command with or without a partial page program command to the semiconductor memory device. The semiconductor memory device, in response to the write command issued without the partial page command, executes a first program operation on a page of memory cells and then a first verify operation on the memory cells of the page using a first verify voltage for all of the memory cells of the page, and in response to the write command issued with the partial page command, executes a second program operation on a subset of the memory cells of the page and then a second verify operation on the memory cells of the subset using one of several different second verify voltages corresponding to the subset.
US09721662B1
A non-volatile memory system includes a plurality of NAND strings (or other arrangements) that form a monolithic three dimensional memory structure, bit lines, word lines, and one or more control circuits. Multiple NAND strings of the plurality of NAND strings have different select gates connected to different select lines. The multiple NAND strings are connected to a common bit line. The multiple NAND strings are connected to a common word line via their respective different select gates. The one or more control circuits concurrently program multiple memory cells on the multiple NAND strings.
US09721660B2
A volatile memory data save subsystem may include a coupling to a shared power source such as a chassis or rack battery, or generator. A data save trigger controller sends a data save command toward coupled volatile memory device(s) such as NVDIMMs and PCIe devices under specified conditions: a programmable amount of time passes without AC power, a voltage level drops below normal but is still sufficient to power the volatile memory device during a data save operation, the trigger controller is notified of an operating system shutdown command, or the trigger controller is notified of an explicit data save command without a system shutdown command. NVDIMMs can avoid reliance on dedicated supercapacitors and dedicated batteries. An NVDIMM may perform an asynchronous DRAM reset in response to the data save command. Voltage step downs may be coordinated among power supplies. After data is saved, power cycles and the system reboots.
US09721653B2
A three-dimensional array especially adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. Bit lines to which the memory elements of all planes are connected are oriented vertically from the substrate and through the plurality of planes.
US09721646B1
Embodiments are directed to a static random access memory (SRAM) device that prevents burn-in of potentially sensitive information. After an SRAM device is fabricated in a semiconductor material, a heating wire is placed in the layers above portions of the SRAM device. By applying current to the heating wire, a certain temperature is reached for a certain amount of time, and the burn-in of the SRAM is prevented. Other embodiments are also presented.
US09721643B2
Detection logic of a memory subsystem obtains a threshold for a memory device that indicates a number of accesses within a time window that causes risk of data corruption on a physically adjacent row. The detection logic obtains the threshold from a register that stores configuration information for the memory device, and can be a register on the memory device itself and/or can be an entry of a configuration storage device of a memory module to which the memory device belongs. The detection logic determines whether a number of accesses to a row of the memory device exceeds the threshold. In response to detecting the number of accesses exceeds the threshold, the detection logic can generate a trigger to cause the memory device to perform a refresh targeted to a physically adjacent victim row.
US09721632B2
Memory cells in a spin-torque magnetic random access memory (MRAM) include at least two magnetic tunnel junctions within each memory cell, where each memory cell only stores a single data bit of information. Access circuitry coupled to the memory cells are able to read from and write to a memory cell even when one of the magnetic tunnel junctions within the memory cell is defective and is no longer functional. Self-referenced and referenced reads can be used in conjunction with the multiple magnetic tunnel junction memory cells. In some embodiments, writing to the memory cell forces all magnetic tunnel junctions into a known state, whereas in other embodiments, a subset of the magnetic tunnel junctions are forced to a known state.
US09721630B2
A memory controller includes an interface to receive a data strobe signal and corresponding read data. The data strobe signal and the read data correspond to a read command issued by the memory controller, and the read data is received in accordance with the data strobe signal and an enable signal. A circuit in the memory controller is to dynamically adjust a timing offset between the enable signal and the data strobe signal, and control logic is to issue a supplemental read command in accordance with a determination that a time interval since a last read command issued by the memory controller exceeds a predetermined value.
US09721626B2
A semiconductor apparatus includes a clock buffer and a reference voltage generation unit. The clock buffer generates an internal clock signal, based on first and second clock signals, in a first operation mode, and generates the internal clock signal, based on the first clock signal and a reference voltage, when a normal operation test is performed in a second operation mode. The reference voltage generation unit generates the reference voltage when the normal operation test is performed in the second operation mode.
US09721625B2
Time-constrained data copying between storage media is disclosed. When an electronic device is engaged in real-time operations, multiple data blocks may need to be copied from one storage medium to another storage medium within certain time constraints. In this regard, a data port is operatively controlled by a plurality of registers of a first register bank. The plurality of registers is copied from the first register bank to a second register bank within a temporal limit and while the data port remains under control of the plurality of registers being copied. By copying the plurality of registers within the temporal limit, it is possible to prevent operational interruption in the data port and reduce bandwidth overhead associated with the register copying operation.
US09721623B2
A memory apparatus may include first to third pads to provide first to third voltages, respectively, to internal circuits. The first pad may receive a first external voltage, and provide the first voltage. The second and third pads may receive a second external voltage. The second pad may provide the second voltage, and the third pad may provide the third voltage.
US09721622B2
Memory devices, memory arrays, and methods of operation of memory arrays with segmentation. Segmentation elements can scale with the memory cells, and may be uni-directional or bi-directional diodes. Biasing lines in the array allow biasing of selected and unselected select devices and segmentation elements with any desired bias, and may use biasing devices of the same construction as the segmentation elements.
US09721606B2
The magnetic tape has a magnetic layer containing ferromagnetic powder and binder on one surface of a nonmagnetic support, and has a backcoat layer containing nonmagnetic powder and binder on the other surface thereof, wherein the magnetic layer contains one or more components selected from the group consisting of a fatty acid and a fatty acid amide; the backcoat layer has a thickness of less than or equal to 0.30 μm and contains one or more components selected from the group consisting of a fatty acid and a fatty acid amide; a magnetic layer side C—H derived C concentration is greater than or equal to 45 atom %; and a backcoat layer side C—H derived C concentration is greater than or equal to 35 atom %.
US09721595B1
A method for providing a storage device that includes a plurality of read sensor stacks for each reader of the storage device. The plurality of read sensor stacks are distributed along a down track direction and offset in a cross-track direction. A plurality of electronic lapping guides (ELGs) are provided for the read sensor stacks. The read sensor stacks are lapped. Lapping is terminated based on signal(s) from the ELG(s).
US09721592B1
This perpendicular magnetic recording head includes: a magnetic pole; a pair of side shields disposed to face each other with the magnetic pole interposed therebetween in a cross track direction; a pair of side gaps each provided between the magnetic pole and the pair of side shields; a trailing gap provided to cover the magnetic pole and the pair of side gaps, and having a first width in the cross track direction; and a first magnetic layer covering the trailing gap and having a second width larger than the first width in the cross track direction.
US09721588B2
A storage system includes a magnetic storage medium, a magnetic write head, a channel circuit and a preamplifier. The channel circuit includes a write data input, a differentiated edge emphasis signal generator, a write data output and a differentiated edge emphasis signal output. The preamplifier includes a write data input configured to receive write data from the channel circuit write data output, an edge emphasis signal input configured to receive a differentiated edge emphasis signal from the channel circuit differentiated edge emphasis signal output, and a write current edge emphasis controller configured to generate a write current to the magnetic write head based at least in part on the write data and on the differentiated edge emphasis signal.
US09721584B2
Wind noise reduction is described for audio signals received in a device. In one embodiment, an audio signal is decomposed into a plurality of sub-bands, the audio signal including wind noise, a first sub-band of the plurality of sub-bands low-pass filtered, wind noise is removed from the first sub band and the first sub-band is combined with the other sub-bands after removing wind noise.
US09721578B2
On the basis of a bitstream (P), an n-channel audio signal (X) is reconstructed by deriving an m-channel core signal (Y) and multichannel coding parameters (a) from the bitstream, where 1≦m
US09721576B2
Apparatus, methods, and articles of manufacture for encoding a compressed media stream are disclosed. Example method of watermarking a digital media signal disclosed herein include copying compressed audio packets associated with an audio stream included in a transport stream of the digital media signal into respective frames of compressed audio data to be watermarked to include media identification information. Such example methods can also include determining whether a composition of the transport stream has changed during copying of the compressed audio packets into the respective frames of the compressed audio data. Such example methods can further include, if the composition of the transport stream has changed, writing the frames of the compressed audio data to an output stream corresponding to the digital media signal without applying a watermark to the frames of the compressed audio data.
US09721570B1
A speech recognition platform configured to receive an audio signal that includes speech from a user and perform automatic speech recognition (ASR) on the audio signal to identify ASR results. The platform may identify: (i) a domain of a voice command within the speech based on the ASR results and based on context information associated with the speech or the user, and (ii) an intent of the voice command. In response to identifying the intent, the platform may perform multiple actions corresponding to this intent. The platform may select a target action to perform, and may engage in a back-and-forth dialog to obtain information for completing the target action. The action may include streaming audio to the device, setting a reminder for the user, purchasing an item on behalf of the user, making a reservation for the user or launching an application for the user.
US09721566B2
At a first electronic device with a display and a microphone: sampling audio input using the first microphone; in accordance with the sampling of audio input using the first microphone, sending stop instructions to a second electronic device with a second microphone, the second electronic device external to the first electronic device, wherein the second electronic device is configured to respond to audio input received using the second microphone, and wherein the stop instructions instruct the second electronic device to forgo responding to audio input received using the second microphone, wherein responding to audio input received using the second microphone comprises providing perceptible output.
US09721560B2
A low power sound recognition sensor is configured to receive an analog signal that may contain a signature sound. Sound parameter information is extracted from the analog signal and compared to a sound parameter reference stored locally with the sound recognition sensor to detect when the signature sound is received in the analog signal. A trigger signal is generated when a signature sound is detected. A portion of the extracted sound parameter information is sent to a remote training location for adaptive training when a signature sound detection error occurs. An updated sound parameter reference from the remote training location is received in response to the adaptive training.
US09721549B2
Drum stands and drum stand baskets, including those for use with a snare drum, are described. Drum stands and drum stand baskets according to the present disclosure can include an adjustment feature which enables the basket to fit differently sized drums. Additionally, drum stands and drum stand baskets according to the present disclosure can include elements which result in less interference with the sound of a snare drum compared to a snare drum in a prior art drum stand. Finally, embodiments of the present disclosure can be compacted for easy storage or transport.
US09721547B2
A pedal device for an electronic percussion instrument is provided, wherein first and second detection means for detecting a rotation of a pedal by different methods are alternatively disposed in a base. The pedal has a pressing part on a lower surface side. The base includes a first portion located under the pressing part for supporting the first detection means, and a second portion located around the first portion for supporting the second detection means. The first portion supports the first detection means such that a first pressed part of the first detection means is disposed on a displacement trajectory of the pressing part that displaces with the rotation of the pedal, and the second portion disposes the second detection means such that a second pressed part of the second detection means is disposed on the displacement trajectory of the pressing part.
US09721543B1
A 3-point neck attachment system is disclosed where the neck of a guitar is mounted on a guitar body with the neck and body making contact at three points, each contact point consisting of a screw-adjustable member and a contact surface. Two screw-adjustment members are located in the neck pocket of the guitar body and allow fine adjustment of neck yaw angle and overall scale length. A third screw-adjustable member is mounted vertically in the heel of the neck and allows fine adjustment of the neck angle. The geometry of the contact surfaces can be configured to allow the neck to be easily and securely mounted to the guitar body without fasteners, employing only the strings' tension. When combined with a quick string de-tensioning mechanism, the fastener-free neck joint allows the guitar to be quickly disassembled, either for transport or rapid substitution of interchangeable guitar components, and then to be easily and rapidly re-assembled to pitch and precisely adjusted for optimum playing. The neck attachment further allows the guitar to be sold as a kit of parts that can be easily, quickly and precisely assembled by the user.
US09721539B2
Upon receiving a communication switching instruction from a first wireless access point used for communication with an image processing apparatus, an image display apparatus disconnects communication with the first wireless access point. Simultaneously, the image display apparatus transmits, to a second wireless access point, a link request to establish communication with the second wireless access point of a new communication destination included in the switching instruction. The image display apparatus displays, on a display unit, a captured image continuously acquired from am image capturing unit until switching from the first wireless access point to the second wireless access point finishes as communication destination switching.
US09721537B2
A motor vehicle display device is provided with information on vehicle operating states which can be displayed in an analog and/or digital manner by display elements, wherein in the direction of viewing of the motor vehicle display device, the display elements are disposed at least in two superimposed planes or plane regions. At least one first plane or one first plane region is provided, in which at least one active display element is disposed, and at least one further plane or one further plane region is provided, which is positioned before the first plane or the first plane region in a viewing direction, wherein only passive display elements are disposed therein, with at least one passive display element being disposed there. In this way the motor vehicle display device is given an appearance with a special 3D effect.
US09721524B2
A semiconductor integrated circuit includes a power line and a power supply circuitry. The power supply circuitry includes: a first power supply circuit operating on a first power supply voltage and having an output connected with the power line; and a second power supply circuit operating on a second power supply voltage higher than the first power supply voltage and having an output connected with the power line. The first power supply circuit is configured to drive the power line to a first preset, voltage. The second power supply circuit is configured to drive the power line to a second preset voltage lower than the first preset voltage. The second power supply circuit is configured not to decrease a third power supply voltage generated on the power line when the third power supply voltage is higher than the second preset voltage.
US09721522B2
An array substrate, a driving method thereof, and a display device are disclosed. The array substrate comprises a plurality of pixel units (11) defined by gate lines (110) and data lines (111) intersecting each other and a charge sharing unit (12). The charge sharing unit (12) is connected with at least two of the data lines (111). During a time period when a gate line (110) is not input with any scan signal for turning on pixel units (11), the charge sharing unit (12) electrically connects at least two data lines (111), to which it is connected, with each other. With this array substrate, the circuits for realizing charge sharing function is disposed in the driving unit for driving the display to display, thereby reducing costs of the driving unit and facilitating panellization of the driving unit.
US09721520B2
The application disclosure a GOA circuit and a liquid crystal display. The GOA circuit including a plurality of GOA unit connected in series, wherein a Nth level GOA unit including a fifth transistor, a eighth transistor and a leakage control module. wherein the leakage control module is connected in series between the Nth level gate terminal signal and the drain terminal of the eighth transistor and/or between the Nth level pull-down signal and the drain terminal of the fifth transistor; in the valid period of the Nth level scanning signal can block the Nth level gate terminal signal through the leakage pathway of the eighth transistor and/or to block the Nth level pull-down signal through the leakage pathway of the fifth transistor to achieve the stability of the GOA circuit.
US09721517B2
A display device according to the present disclosure includes a plurality of gate lines extending in a row direction, a plurality of data lines intersecting with the gate lines, the data lines extending in a column direction, a plurality of pixels connected to the gate lines and the data lines, and a data driving unit configured to output a plurality of data voltages to the pixels, wherein the data driving unit outputs the data voltages based on a first column inversion scheme and a second column inversion scheme to respective data lines along the column direction.
US09721514B2
A method for driving a reflective LCD panel is provided. The driving method includes following steps: the reflective LCD panel is driven by a driving signal with alternate positive and negative polarities, wherein the driving signal has positive polarity for a first driving duration and the driving signal has negative polarity for a second driving duration; a color beam is provided to irradiate the reflective LCD panel during a partial time period of the first driving duration; and the color beam is provided to irradiate the reflective LCD panel during a partial time period of the second driving duration.
US09721509B2
An active matrix organic light emitting diode (OLED) display device includes an array of pixels, each pixel including an OLED, a driving transistor (DT) coupled to drive current through the OLED, a storage capacitor, and a scanning transistor (ST) coupled to control charge on the storage capacitor corresponding to a data voltage for said pixel. The display device also includes a timing controller configured to control the ST of each pixel to update the charge stored on the storage capacitor of each pixel at a frame rate including at least one frequency within a range of 1-10 Hertz (Hz).
US09721506B2
An electro-optical device includes one or more control lines that include a scanning line, a data line and a pixel circuit. The pixel circuit has a drive transistor, a write-in transistor with a gate which is electrically connected to the scanning line, a light-emitting element that emits light at a brightness that depends on the size of a current that is supplied through the drive transistor, and a control line which overlaps the gate of the drive transistor when viewed from a direction that is perpendicular to a surface of a substrate on which the pixel circuit is formed is included in the one or more control lines.
US09721496B2
A display panel and a display device, where, the display panel includes a trigger signal controller, and the trigger signal controller is configured to convert N primary trigger signals generated by a first driving unit into 2N secondary trigger signals according to a display control signal generated by a second driving unit, and sequentially outputting the 2N secondary trigger signals to 2N gate controlling circuits, each of the 2N gate controlling circuits is configured to drive a group of pixels in a display region, where, rows of pixels respectively from different groups of pixels are alternately arranged, the secondary trigger signals are configured to control gate controlling circuits to simultaneously drive two paired groups of pixels under a first display mode, and alternately drive two paired groups of pixels under a second display mode.
US09721491B2
A display includes first pixels, second pixels, a first de-multiplexer and a second de-multiplexer. The first de-multiplexer transmits a first data signal to the first pixels sequentially in response to first control signals. The second de-multiplexer transmits a second data signal to the second pixels sequentially in response to second control signals. The polarity of the first data signal is different from that of the second data signal. Levels of the first control signals are switched between a first voltage level and a zero voltage level, corresponding to the polarity of the first data signal. Levels of the second control signals are switched between a second voltage level and the zero voltage level, corresponding to the polarity of the second data signal. The first voltage level is different from the second voltage level. A method of transmitting signals in a display is also disclosed herein.
US09721481B2
A sign language message may be derived from user movements detected proximate to an electronic device by comparing the movements to a database that includes data regarding one or more sign languages. A control function may then be identified which the electronic device may be caused to perform. Output related to the user's detected movements may be provided to the user. In some implementations, output specifying identified control functions may be transmitted to a presentation device. Further, in some implementations, if a sign language message and/or a control function cannot be unambiguously derived and/or identified, output promoting the user to provide additional information may be transmitted to a presentation device. Detected movements may be compared to data regarding multiple different sign languages and/or a subset of available multiple different sign languages.
US09721480B2
An augmented tutoring system is provided that includes a simulation device, at least one sensor and a controller. The simulation device is adapted to provide a simulation that has an objective to accomplish by a student, wherein to achieve the objective a plurality of tasks must be correctly completed. The at least one sensor is adapted to monitor a cognitive state of the student while engaged with the simulation. The controller is adapted to process cognitive state information from the at least one sensor and to process student progress information relating to the completion of each of the tasks. The controller is further adapted to provide feedback to the student based at least in part on the processed cognitive state information and the processed task completion information.
US09721474B2
A method (400), control device (240) and measuring unit (230) for adapting a control algorithm having at least one driver-dependent parameter, which control algorithm governs the control of a vehicle convoy (200) in which at least a first vehicle 220A with a first driver (210A) and a second vehicle 220B with a second driver (210B) are included. The method includes measurement (401) of at least one physical characteristic of the first driver (210A), determination (402) of the stress level of the driver based on the performed measurement (401), and adaptation (403) of the control algorithm to the determined (402) stress level of the driver.
US09721468B2
A method for operating a navigation system for a motor vehicle with autopilot is disclosed, wherein the autopilot is designed to automatically carry out longitudinal and lateral guidance of the motor vehicle in the activated state during a piloted journey without assistance from a driver. The navigation system determines, for a destination prescribed by the user, a route to the destination on the basis of navigation data. The roads on which the activation of the autopilot is likely to be possible is determined using traffic data and on the basis of a predetermined activation condition for the autopilot.
US09721457B2
The present invention relates to detectors of hazardous environmental conditions (e.g., smoke, gas, motion). Specifically, the invention relates to a hazard detector configured to transmit and/or receive information related to hazardous environmental conditions based at least in part on the location of the hazard detector as identified through one or more location based service means (e.g., global positioning systems (GPS), cellular triangulation, Internet IP geolocation).
US09721455B1
Embodiments include methods, systems and computer program products for creating event reminders on a computational system. Aspects include receiving an alarm system input, the alarm system input including an event identifier, an event time, and an event influencer. Aspects also include calculating an alarm time based upon the alarm system input. Aspects also include creating an alarm signal at the alarm time. Aspects also include outputting the alarm signal.
US09721445B2
Methods and systems are described for tracking location using a home automation system. One method includes receiving sensor data indicating presence of a wearable tracking device in a predetermined area of a property monitored by the home automation system, confirming an identity of the tracking device, and generating a notice indicating a location of the tracking device.
US09721444B2
A theft alarm system includes a personal article that may be carried. The personal article has a closure that is positionable in an open position. An alarm unit is coupled to the personal article. The alarm unit is in communication with the closure such that the alarm detects when the closure is manipulated into the open position. A base unit is configured to be carried and the base unit is in communication with the alarm unit. The base unit selectively emits an audible alarm when the personal article has been opened. The base unit selectively actuates the alarm unit to emit an audible alarm thereby facilitating the personal article to be located. An electronic device is provided and the electronic device may be carried. The electronic device is in wireless communication with the alarm unit. The electronic device emits an audible alarm when the personal article is opened.
US09721443B2
Methods and systems for processing messages received from a security device are presented. In some embodiments, a server may receive one or more messages from a security console and subsequently may determine the location of the security console. The server then may identify one or more other devices that are grouped, e.g., located within a predetermined distance, with the security console. Thereafter, the server may send one or more alert messages to the identified devices.
US09721442B2
An emergency manager for a lighting device (1), which lighting device is configured to transmit information by coding its output light. The emergency manager has a light coding unit (5), configured to code light emitted by a light emitter (3), thereby enabling the light emitter to emit a coded light signal including an individual identifier identifying the lighting device; an emergency indicator (7); and a control unit (9). The control unit is configured to control the light coding unit to adjust the coded light signal to increase a robustness of a transmission of the coded light signal upon receiving an emergency indication from the emergency indicator.
US09721435B2
A gaming terminal is utilized for playing a wagering game. The gaming terminal includes a wager-input device and a display for displaying the wagering game. The wagering game includes a randomly-selected outcome selected from a plurality of outcomes in response to a wager input received via the wager-input device. The plurality of outcomes include at least one outcome that awards standard credits and bonus tokens. A credit output device outputs a value of the standard credits and the bonus tokens in response to achieving the at least one outcome. The bonus tokens are exchangeable for a special event on a second gaming terminal.
US09721433B2
A method of generating a lottery ticket comprises the steps of: providing a succession of selection stages; providing for each stage two or more selection options; said selection options comprising a selection area which in response to a lottery player's interaction reveals either a winning or a losing indicator; wherein for each stage at least one of the selection options is a winning selection and at least one of the options is a losing selection.
US09721426B2
A wagering game system and its operations are described herein. In some embodiments, the operations can include initiating a wagering game title for presentation on a display device of a gaming machine, and receiving, from the gaming machine, player input indicating autoplay settings selected by a player for the wagering game title. The operations can also include initiating an autoplay mode for the wagering game title in response to receiving an autoplay trigger from the gaming machine, managing the autoplay mode for the player according to the autoplay setting selected by the player, and generating results for each wagering game of the wagering game title played during the autoplay mode. The operations can further include monitoring game events associated with the wagering games played during the autoplay mode to determine when to stop the autoplay mode, and stopping the autoplay mode for the player based on the autoplay settings selected by the player.
US09721419B1
A vending machine that dispense feminine hygiene products. Specifically, this invention is a coin-operated vending machine that dispenses sanitary napkins and tampons. This invention allows a user to purchase a feminine hygiene product by placing a coin or multiple coins in a slot within the vending machine and pressing a product release button. The product is then dispensed to the consumer. The apparatus also provides a mechanism for retrieving a coin in the event that the vending machine is out of a specific feminine hygiene. Further, in the free condition, this product dispenser has a time delay to prevent users from rapidly removing all of the products.
US09721415B2
A magnetic currency verification head may include a magnetoresistive sensor chip, and a magnetic bias unit disposed on the side of the magnetoresistive sensor chip away from the detection surface of the magnetic currency verification head, and separated from the magnetoresistive sensor chip; the magnetoresistive sensor chip comprises a gradiometric bridge circuit that includes magnetic sensor elements; the sensitive direction of the magnetic sensor elements is parallel to the detection surface of the magnetic currency verification head; and the magnetic bias unit has a recessed magnetic structure configured such that the magnetic field generated by the magnetic bias unit only has a small magnetic field component in the direction parallel to the detection surface, thereby enabling the magnetic sensor elements to operate in their linear range. As a result, the magnetic currency verification head has high sensitivity and signal-to-noise ratio.
US09721410B2
An authentication system includes a plurality of authentication apparatuses, each of which includes first biological information of a same set of users; a crosschecking unit for crosschecking input biological information with a part of the first biological information; a transmitter for assigning second biological information included in the first biological information other than the part of the first biological information to the other authentication apparatuses without assigning same information in the second biological information to other authentication apparatuses, and to request the other authentication apparatuses to crosscheck the input biological information with the assigned second biological information; and a receiver for receiving, from the one or more other authentication apparatuses, one or more results of crosschecking the input biological information with the assigned second biological information by the one or more other authentication apparatuses in response to the requesting.
US09721403B2
The invention relates to a safety system for a door in a motor vehicle, comprising an electronic unit that includes at least one first and a second sensor. Each sensor has its own monitoring zone on the motor vehicle door. The safety system further comprises a lock which is arranged on the motor vehicle door and can be switched between a locked position and an unlocked position, as well as a user-held identifier which can be brought into data communication with a transceiver unit in the motor vehicle for authentication purposes. The electronic unit is designed in such a way as to be able to generate a trigger signal by having the user execute at least one defined movement pattern within the monitoring zones, thus allowing the position of the lock to be switched.
US09721386B1
Augmented reality environments allow users in their physical environment to interact with virtual objects and information. Augmented reality applications are developed and configured to utilize local as well as cloud resources. Application management allows control over distribution of applications to select groups or all users. An application programming interface allows simplified control and distribution of tasks between local and cloud resources during development and post-development operation. This integration between local and cloud resources along with the control afforded by application management allows rapid development, testing, deployment, and updating of augmented reality applications.
US09721385B2
A method for generating stereoscopic images includes obtaining image data comprising a plurality of sample points. A direction, a color value, and a depth value are associated with each sample point. The directions and depth values are relative to a common origin. A mesh is generated by displacing the sample points from the origin. The sample points are displaced in the associated directions by distances representative of the corresponding depth values. The image data is mapped to the mesh such that the color values associated with the sample points are mapped to the mesh at the corresponding directions. A first image of the mesh is generated from a first perspective, and a second image of the mesh is generated from a second perspective. The first and second images of the mesh may be caused to be displayed to provide an illusion of depth.
US09721375B1
A system, method, and computer program product for displaying representative images within one or more subpanels of a user interface is disclosed. The method comprises configuring, by a processor unit, an adjacent relationship between a visible subpanel of the one or more subpanels and at least one not-visible subpanel of the one or more subpanels. Next, a second relationship is configured between each of two or more representative images and an associated subpanel of the one or more subpanels, wherein the second relationship defines a location on the associated subpanel where each of the two or more representative images is displayed. Additionally, a notification is received indicating a new orientation for at least one of the one or more subpanels. In response to the new orientation, an in-place rotation animation is generated for the two or more representative images based on the adjacent relationship and the second relationship. Additional systems, methods, and computer program products are also presented.
US09721360B2
An apparatus and method for performing automatic 3D image segmentation and reconstruction of organ structures, which is particularly well-suited for use on cortical surfaces is presented. A brain extraction process removes non-brain image elements, then classifies brain tissue as to type in preparation for a cerebrum segmentation process that determines which portions of the image information belong to specific physiological structures. Ventricle filling is performed on the image data based on information from a ventricle extraction process. A reconstruction process follows in which specific surfaces, such as white matter (WM) and grey matter (GM), are reconstructed.
US09721358B2
A method and a system for localizing at least one circular object in a video frame captured by an image capture unit are disclosed. The method includes the steps of: A. performing edge detection to obtain a plurality of image edge points in the video frame; B. extracting a contour set of image contours by linking neighboring edge points; C. generating a plurality of circle samples from the extracted contour set by a structural sampling process; and D. localizing the at least one circular object from the generated circle samples by calculating a respective fitness score for each of the circle samples to measure the supporting evidence of the image edge points on a neighborhood of each of the circle samples, and by choosing the circle sample(s) whose fitness score(s) is/are greater than a threshold value as the circular object(s) found in the video frame.
US09721351B2
A method of blink detection in a laser eye surgical system includes providing a topography measurement structure having a geometric marker. The method includes bringing the topography measurement structure into a position proximal to an eye such that light traveling from the geometric marker is capable of reflecting off a refractive structure of the eye of the patient, and also detecting the light reflected from the structure of the eye for a predetermined time period while the topography measurement structure is at the proximal position. The method further includes converting the light reflected from the surface of the eye into image data and analyzing the image data to determine whether light reflected from the geometric marker is present is in the reflected light, wherein if the geometric marker is determined not to be present, the patient is identified as having blinked during the predetermined time.
US09721348B2
Disclosed is an apparatus and method for calculating a raw-cost necessary for combining images into one image by matching of stereo images. The raw-cost calculation apparatus includes an image acquirer, a window generator, a window mask generator, a window masker, and a raw-cost calculator. In the raw-cost calculation apparatus and method, a raw cost may be calculated by using an adaptive window mask so that accurate 3D information may be obtained on the boundary of thin structures even when stereo images are matched and combined.
US09721343B2
A method and system provide light to project to an operation space so that a received image from the operation space will include, if an object is in the operation space, a bright region due to the reflection of light by the object, and identify a gesture according to the variation of a barycenter position, an average brightness, or an area of the bright region in successive images, for generating a corresponding command. Only simple operation and calculation is required to detect the motion of an object moving in the X, Y, or Z axis of an image, for identifying a gesture represented by the motion of the object.
US09721333B2
Aspects of the present invention are related to systems and methods for estimation of additive noise in an image or in a video sequence. An additive-noise estimate may be computed based on a first significant peak in a histogram of standard-deviation values of patches of an image-channel image associated with an input image.
US09721331B2
In the present invention, subband signals are obtained by performing multiresolution decomposition on image data by using a broad-sense pinwheel framelet that is a set of an approximate filter with no orientation and a plurality of detail filters with respective orientations, and that has a degree. When an image is reconstructed by summing the obtained subband signals, the reconstructed image data is generated by attenuating or amplifying a subband signal corresponding to at least one of filters that have predetermined frequency characteristics and/or a predetermined orientation among the filters.
US09721329B2
A multi-scale detail representation of an image is computed as a weighted sum of translation difference images. A denoising operator is applied to the translation difference images so that translation differences are modified as a function of an estimated local signal-to-noise ratio and at least one denoised center difference image at a specific scale is computed by combining denoised translation difference images at scale s or a finer scale. A denoised image is computed by applying a reconstruction algorithm to the denoised center difference images.
US09721324B2
File exploration is facilitated by enabling zoom with respect to a thumbnail as a function of an identified point of interest. More particularly, a scaled thumbnail of the same size as a thumbnail can be presented as a function of an identified point of interest. Furthermore, navigation, among other things, is enabled to allow panning with respect to a scaled thumbnail, for instance.
US09721317B2
A cart for marketing bedding is provided that includes a rack including a plurality of vertical support members and at least one tray positioned between the support members. The tray includes a plurality of compartments. A pillow is disposed in each of the compartments. Each of the pillows has a different configuration. Methods of use are provided.
US09721305B2
In an example, the present invention provides a method for capturing vehicle mileage information. The method includes initiating an application program configured on the mobile wireless device without any user input required to start tracking a drive. The method includes initiating movement of the mobile wireless device. The method includes using a mapping module to track a start point of a route for the mobile wireless device. The method includes moving the mobile wireless device from the start point through one or more legs. The method includes using algorithms or traffic data to identify one or more of the legs as a route or drive.
US09721302B2
An server that facilitates efficient and convenient processing of an insurance claim. The claim processing application can receive text, image, and audio data associated with the insurance claim. Using the received data, a model of the user's vehicle and the scene of the accident are generated and displayed on the user's mobile device. Damaged portions of the user's vehicle can be identified automatically or by the user. Damage can be tagged using the mobile device and additional data can be provided by the user and associated with each tag. The server's claim processing application can be used to provide a preliminary claim assessment, submit a completed insurance claim application to an insurance provider, and/or process the insurance claim.
US09721300B2
Investment portfolios undergo a calibration procedure to improve their efficiency and stability. Any set of portfolios could be selected for calibration. If said portfolios represent a result of a portfolio optimization or asset allocation, then using original model inputs, an optimization procedure is performed to compute an original efficient frontier and a set of frontier portfolios is selected for calibration. A plurality of random samples of modified optimization inputs based on the original inputs is generated. For each random sample of inputs a modified efficient frontier is computed using the portfolio optimization model with modified inputs. Each portfolio selected for calibration is projected on the modified efficient frontier to create a corresponding modified calibration portfolio. Calibrated portfolio is created by averaging its calibrations. Calibrated efficient frontier is created by averaging all calibration portfolios for each selected portfolio on the original frontier.
US09721291B1
Disclosed are various embodiments for identifying a best or most effective image associated with an item. A user interface is generated that includes the item as well as one of a plurality of images associated with the item. Interactions associated with the item are monitored and an image score is adjusted based upon whether these interactions are positive are negative. The process can be repeated over a large sample size. A highest scored image is designated as the most effective image at achieving a particular result.
US09721290B2
A computer-implemented method includes generating on a user terminal a merchant web site associated with a merchant with code for a merchant web page, transmitting a product selection request for the user to a remote open payment system that is separate from the merchant, and displaying purchase information responsive to the product selection request using the code for the merchant web page.
US09721284B1
The disclosure relates to systems and methods for communicating a primary display comprising information that facilitates visual presentation of a view of a game space to a primary client device and facilitating purchases of content for use in the game through a secondary client device such as a user's smartphone. The system may include a game device that allows a user to play a video game or otherwise interact with a virtual environment using the primary client device and purchase content for use in the video game using a secondary client device while playing the video game using the primary client device. The purchased content may be integrated into the game space such that purchased content is available for use while the user is playing the video game.
US09721274B2
The present disclosure identifies and/or delivers tailored content based upon a service dialog. For example, the systems may receive a request for tailored content, facilitate a service dialog to obtain information related to the request, and communicate a plurality of tailored content based upon the information related to the request. Further, the systems may identify tailored content based upon a consumer profile, communicate the tailored content to a web client, and/or receive a selection of the tailored content. Further still, the systems may modify a magazine (e.g., content that is presented electronically) based upon tailored content.
US09721271B2
Methods and apparatus to incorporate saturation effects into marketing mix models are disclosed. A disclosed method includes calculating adstocked gross rating points associated with an advertising campaign during segments of a period of time. The adstocked gross rating points are based on raw gross rating points corresponding to the advertising campaign. The raw gross rating points are delivered during the segments of the period of time. The example method further includes calculating an effective reach realized during the segments of the period of time for the advertising campaign. The effective reach realized is based on the adstocked gross rating points.
US09721270B2
Communications services are integrated with personalized selections of content and with social networks. A computer of an interactive system determines that an initiating communications party is associated with a personal content account external to the communications service provider. Personalized selections of content are provided from the personal content account to the initiating communications party during the communications session. The computer of the interactive system may also determine an agent to assign to the communication session in accordance with feedback received from communications parties based on previous communications between the communications parties and agents of the communications service provider. The agent to assign to the communications session first can be assigned in accordance with the feedback received from the communications parties based on previous communications between the communications parties and agents of the communications service provider.
US09721268B2
Embodiments of the invention are directed to systems, methods and computer program products for providing supplemental account information in digital wallets. An exemplary apparatus is configured to: receive a request to provide a digital wallet on a user's mobile device, authenticate at least one payment credential for use within the digital wallet; receive access to an application programming interface configured to push offers to digital wallets, wherein the application programming interface is associated with at least one database maintained by the digital wallet provider; receive, via the application programming interface one or more offers from the at least one database, wherein the offers include at least one incentive for processing payments using the at least one payment credential associated with the digital wallet; and present, to the user on a display of the mobile device, the one or more offers.
US09721265B2
Systems and methods are provided for generating adaptive surveys including questions and answer options selectable by users, and human-readable review prose based on answers to the questions. The survey may be related to an assessment of a business, and may be transmitted to a user electronic device. The generated survey may include one or more questions with selectable answer options. The selection of the answer options can be received from the user electronic device, and be used to generate the prose for the review. The user and/or the business may edit the prose and/or modify the intensity of the generated review. Tree data structures may be utilized to generate the questions of the survey, to store the answers, and generate the sentences of the review. Analytic data may be generated based on the selected answer options, which can be used to assess and influence marketing and business efforts.
US09721262B2
Systems and methods of the present invention facilitate the sale of products, such as goods and/or services. Specifically, merchants of products provide incentives for consumers that may be defined by time and geography to drives sales of the products, such as during low demand periods. Moreover, the present invention allows consumers to search for and claim time-sensitive incentives from merchants; specifically, incentives requiring instant or nearly instant acceptance and/or redeemability.
US09721259B2
A counterfeit detection system may include a memory storing a module comprising machine readable instructions to determine a X-identification (XID) associated with a product. The XID may include an unencrypted component and/or an encrypted component associated with a parameter associated with the product. The machine readable instructions may further include selecting one or more validation rules, from a plurality of validation rules, to select one or more validation techniques from a plurality of validation techniques used to determine an authenticity of the product. The machine readable instructions may further include using the one or more selected validation techniques to determine the authenticity of the product based on the XID associated with the product. The counterfeit detection system may include a processor to implement the module.
US09721251B1
This disclosure describes techniques for intelligent payment capture in mixed fulfillment transactions. For example, the techniques described herein may include generating a purchase ticket associated with multiple items in a mixed fulfillment transaction. The purchase ticket may facilitate conducting a mixed fulfillment transaction in which a payment instrument is authorized for the cost of the multiple items in the mixed fulfillment transaction, with partial payment captures being made as items are fulfilled without requiring additional authorizations.
US09721249B2
Data can be protected in mobile and payment environments through various tokenization operations. A mobile device can tokenize communication data based on device information and session information associated with the mobile device. A payment terminal can tokenize payment information received at the payment terminal during a transaction based on transaction information associated with the transaction. Payment data tokenized first a first set of token tables and according to a first set of tokenization parameters by a first payment entity can be detokenized or re-tokenized with a second set of token tables and according to a second set of tokenization parameters. Payment information can be tokenized and sent to a mobile device as a token card based on one or more selected use rules, and a user can request a transaction based on the token card. The transaction can be authorized if the transaction satisfies the selected use rules.
US09721246B2
An object-oriented synchronization pattern for synchronizing a mobile application and a corresponding enterprise application is provided herein. The synchronization pattern uses service invocations to convey application state differential from the mobile device to the enterprise server and object-based database synchronization for conveying application state differential from the enterprise to the mobile device. Service invocations may be conveyed in batch or individually separately and using a variety of service types.
US09721243B2
A transaction system for coordinating processing of a transaction payment request associated with a transaction between a consumer and a merchant, comprising: a computer processor programmed for: receiving the transaction payment request including consumer code data and identification information, the consumer code data representative of a subaccount registered with a transaction interface; accessing the subaccount to obtain payment information related to the transaction payment request; creating a payment confirmation request using said identification information; sending said payment confirmation request over the network to a mobile device; obtaining authorization information from the mobile device; sending a funds transfer request to a payment platform based on the authorization information matching the required authorization information; receiving approval of the funds transfer request from the payment platform; and sending a confirmation of the approval of the funds transfer request to a computer device associated with the merchant.
US09721242B2
A method of payment terminal operation, including: receiving a payment collection request for a payment from an application, generating a payment initiation request for the payment, sending the payment initiation request to a secure processing system, switching the secure processing system from operation in an unsecured mode to operation in a secured mode in response to receipt of the payment initiation request, facilitating payment information entry, and receiving a payment response notification, generated based on the payment information, at the main processor.
US09721235B2
Persistent, electronically anchored currency notes (PEAC notes) may be generated by a transaction provider and maintained in a datastore. Each PEAC note may be associated with a respective unique identifier and asset held by a custodian. The transaction provider may provide for assigning ownership of the PEAC notes to various entities and/or transferring ownership therebetween. Ownership transfers may be performed by the transaction provider while maintaining the PEAC notes in the datastore and/or maintaining the asset(s) associated therewith with their respective custodian(s). The transaction provider may keep records of ownership transfers and/or may provide datastructures for tracking payments (e.g., invoice datastructures). Information about each PEAC note be publically available through the transaction provider.
US09721234B2
An event providing apparatus includes a storage device in communicating with a date/time detector module. The detector module detects a condition that at least a portion of information stored on the storage device could be mapped to an event, identifies date and time entries in the information, and generates a hyperlink to open an application for creating an event for each entry, the date and time being provided to the application to generate the event directly from the information. The apparatus also includes a display for displaying the time and date in the form of the hyperlink; and a prompter module communicating with the detector module for automatically providing a prompt related to the event in response to selection of the hyperlink. In response to user interaction with the user prompt, the application is started and the event based on the hyperlinked date and time is created.
US09721225B1
Systems and methods which provide a shipping service resale platform enabling single shipper account access to multiple shipping service rate schedules are disclosed. Shipping service rate optimization is facilitated for a shipper using a single shipper account of embodiments of the invention, whereby the shipper is enabled to utilize rates available from various rate schedules, such as may include reseller negotiated rates, shipping service provider published rates, etc., according to embodiments. The shipper is enabled to establish, manage, and maintain a single shipper account for use in purchase and payment of shipping services which implicate different shipping service provider payment mechanisms, different shipping service resellers, and/or different shipping service providers.
US09721211B2
A method and apparatus for processing data, the data including a set of one or more system inputs; and a set of one or more system outputs; wherein each system output corresponds to a respective system input. Each system input can include a plurality of data points, such that at least one of these data points is from a different data source to at least one other of those data points. The method includes performing a kernel function on a given system input from the data and a further system input to provide kernelized data; and inferring a value indicative of a significance of data from a particular data source; wherein the inferring includes applying a regression technique to the kernelized data.
US09721208B2
The living activity inference device according to the present invention includes: an obtainer configured to obtain an energy consumption of an electric appliance; an appliance operation detector configured to identify an operational state of the electric appliance based on the energy consumption obtained by the obtainer; and an activity inferrer configured to perform an inference process of determining which one of a plurality of living activities predetermined a current living activity corresponds to, based on existing information including the operational state of the electric appliance identified by the appliance operation detector and a past living activity.
US09721197B2
A control device comprises: a movement control unit configured to control movement of an object; a detecting unit configured to optically detect, at a specific position, the object moving through control by the movement control unit, to thereby output a detection voltage; and a movement amount determining unit configured to determine a movement amount of the object to be moved through the control by the movement control unit, based on a tendency of a change in the detection voltage when the object is moved.
US09721191B2
A method for image recognition of an instrument includes: obtaining an input image containing a to-be-recognized instrument; selecting from the input image a region-of-interest containing the to-be-recognized instrument; determining in a high-to-low order of priority values of instrument categories, whether the to-be-recognized instrument contained in the region-of-interest belongs to one of the instrument categories according to the region-of-interest and a respective one of plural groups of sample images; and increasing the priority value of the one of the instrument categories when it is determined that the to-be-recognized instrument belongs to the one of the instrument categories.
US09721182B2
A method, system and computer program product for encoding an image is provided. The image that needs to be represented is represented in the form of a Gaussian pyramid which is a scale-space representation of the image and includes several pyramid images. The feature points in the pyramid images are identified and a specified number of feature points are selected. The orientations of the selected feature points are obtained by using a set of orientation calculating algorithms. A patch is extracted around the feature point in the pyramid images based on the orientations of the feature point and the sampling factor of the pyramid image. The boundary patches in the pyramid images are extracted by padding the pyramid images with extra pixels. The feature vectors of the extracted patches are defined. These feature vectors are normalized so that the components in the feature vectors are less than a threshold.
US09721181B2
A system for detecting clouds and cloud shadows is described. In one approach, clouds and cloud shadows within a remote sensing image are detected through a three step process. In the first stage a high-precision low-recall classifier is used to identify cloud seed pixels within the image. In the second stage, a low-precision high-recall classifier is used to identify potential cloud pixels within the image. Additionally, in the second stage, the cloud seed pixels are grown into the potential cloud pixels to identify clusters of pixels which have a high likelihood of representing clouds. In the third stage, a geometric technique is used to determine pixels which likely represent shadows cast by the clouds identified in the second stage. The clouds identified in the second stage and the shadows identified in the third stage are then exported as a cloud mask and shadow mask of the remote sensing image.
US09721179B2
An apparatus and method to detect a line segment or arc using Hough transform. A Hough transform unit performs contour extraction on brightness image data to generate contour image data, with pixels having a pixel value of 0 to 255, performs the Hough transform on points in the contour image data, and counts additional values represented by pixel values of points in the contour image data in a Hough table. The Hough transform unit performs contour extraction on first to third component data to generate first to third contour data with pixels having a pixel value of 0 to 255, performs the Hough transform on points in the first to third contour data, and counts additional values represented by pixel values of points in the first to third contour data in the Hough table. The detection unit comprehensively evaluates the counts to detect a line segment or arc.
US09721166B2
A system and method for detecting a particular human in a plurality of images of humans may include one or more processors to receive input data describing the appearance of the particular human via a graphical user interface (GUI). An image representing the particular human may be generated based on the input data. This may take the form of an avatar or artificial image. This artificial or processor-generated image may be used to identify one or more of the humans in said plurality of images as a candidate for the particular human.
US09721164B2
A system for collecting data comprising a mobile terminal for capturing a plurality of frames of image data, the mobile terminal having a first imaging assembly and a second imaging assembly, the first imaging assembly for capturing a first frame of image data representing a first object and the second imaging assembly for capturing a second frame of image data representing a second object, wherein the system for use in collecting data is operative for associating first frame information and second frame information, the first frame information including one or more of image data of the first frame of image data and information derived utilizing the image data of the first frame of image data, the second frame information including one or more of image data of the second frame of image data and information derived utilizing the image data of the second frame of image data.
US09721160B2
A machine-implemented method of processing an input image includes receiving user input that manually identifies a location in the input image that corresponds to a potential redeye artifact. A set of detected redeye artifacts in the input image is received. One of the detected redeye artifacts that is closest to the manually identified location is identified. The identified detected redeye artifact is stored in a list of redeye artifacts that are identified with manual assistance if the identified detected redeye artifact is within a threshold distance from the manually identified location.
US09721154B2
An object detection apparatus is capable of estimating the size of a moving object easily based on images. An object detection apparatus (5) of an object detection system (1) includes an object detection/determination unit (7) configured to analyze a period of motion of the object based on the images to estimate a size of the object based on the period of motion of the object.
US09721150B2
Biometric enrollment and verification techniques for ocular-vascular, periocular, and facial regions are described. Periocular image regions can be defined based on the dimensions of an ocular region identified in an image of a facial region. Feature descriptors can be generated for interest points in the ocular and periocular regions using a combination of patterned histogram feature descriptors. Quality metrics for the regions can be determined based on region value scores calculated based on texture surrounding the interest points. A biometric matching process for calculating a match score based on the ocular and periocular regions can progressively include additional periocular regions to obtain a greater match confidence.
US09721145B2
A central person determining system includes an information terminal having a plurality of image data; and a server; wherein the information terminal performs face detection processing and generates a face detection result for each of a plurality of images based on the plurality of image data, generates a plurality of face image data by cropping, on the basis of the face detection result, a face image from the plurality of images based on the plurality of image data, and transmits the plurality of face image data to the server; and wherein the server performs central person determining processing on the basis of the plurality of face image data acquired from the information terminal, generates the central person determining result, and transmits the central person determining result to the information terminal.
US09721143B2
Modifying a visual depiction is provided. A processor identifies a first depiction of a first member of an online social network. The processor determines a first date value representing a date corresponding to the first depiction. The processor determines a relationship between the first member and a second member of the online social network. The processor identifies a second date value based, at least in part, on the relationship between the first member and the second member. The processor determines a region of the first depiction by performing facial recognition based, at least in part, on the first depiction. The processor generates a second depiction by applying one or more operations to the region of the first depiction based, at least in part, on the second date value, wherein the second depiction allows identification of the first member based, at least in part, on the second date value.
US09721139B2
Example embodiments disclose a fingerprint recognition sensor and a fingerprint recognition system. The fingerprint recognition sensor may include a pad configured to apply a first wave signal having multi-frequency characteristics to an object, a signal applying electrode configured to transmit the first wave signal having multi-frequency characteristics to the pad and a signal receiving electrode configured to receive a reflection wave signal from the object to the pad based on the first wave signal.
US09721127B2
Systems and methods for a material handling vehicle include a controller and a near field communication reader adapted to communicate with the controller. The controller is configured to activate at least one of a software option and a hardware option when a near field communication device encoded with option information is placed within an operable range to the near field communication reader.
US09721124B1
A magnetic stripe reader including a base element defining a first spring seat, a magnetic module support element arranged for limited pivotable motion relative to the base element and defining a second spring seat, a generally truncated conical spring having a first, relatively large diameter end seated in the first spring seat and a second, relatively small diameter end seated in the second spring seat and a magnetic module fixedly mounted onto the magnetic module support element.
US09721120B2
An obfuscated program can be configured to resist attacks in which an attacker directly calls a non-entry function by verifying that an execution path to the function is an authorized execution path. To detect an unauthorized execution order, a secret value is embedded in each function along an authorized execution path. At runtime, the secrets are combined to generate a runtime representation of the execution path, and the runtime representation is verified against an expected value. To perform the verification, a verification polynomial is evaluated using the runtime representation as input. A verification value result of zero means the execution path is an authorized execution path.
US09721119B2
A system and method for secure use of messaging systems. A mediator may receive an original message, process the original message to produce a processed message, and may forward the processed message to a server or a messaging system. A mediator may receive a processed message from a server or a messaging system, process the received processed message to produce an unprocessed message that may be substantially identical to the original message and may forward the unprocessed message to a destination.
US09721110B2
Methods, systems, and devices secure content in memory. The content includes a lock that prohibits reading the content from memory. Prior to expiration of the lock the content cannot be read from memory. However, a preview option allows at least a portion of the content to be accessed. The preview option provides a preview of the content. At expiration, the content is readable.
US09721103B2
A method, system and program product for performing a trusted boot of a virtual machine comprises the steps of executing, in turn, a series of components of the trusted boot, performing a function on each component prior to the execution of the respective component, storing the output of the functions in a virtual trusted platform module, detecting that the virtual trusted platform module has not responded to the storing of the output of a function in the virtual trusted platform module, and generating a request that the virtual trusted platform module be disabled.
US09721097B1
As part of an analysis of the likelihood that a given input (e.g. a file, etc.) includes malicious code, a convolutional neural network can be used to review a sequence of chunks into which an input is divided to assess how best to navigate through the input and to classify parts of the input in a most optimal manner. At least some of the sequence of chunks can be further examined using a recurrent neural network in series with the convolutional neural network to determine how to progress through the sequence of chunks. A state of the at least some of the chunks examined using the recurrent neural network summarized to form an output indicative of the likelihood that the input includes malicious code. Methods, systems, and articles of manufacture are also described.
US09721081B2
In physical token-less security screening using biometrics, a person provides biometric data to a security computing device as part of a security screening. The biometric data is used by the security computing device to look up an identifier (such as an airline account identifier or a security status identifier) for the person from a security back end. The identifier is used by the security computing device to obtain electronic pass information (such as an electronic boarding pass or a security screening status indicator) from a third party computing system (such as an airline computing system or a clearinghouse), which may be used to clear the person and/or otherwise facilitate the security screening. In some implementations, these techniques may also be used for physical token-less pass processing (such as boarding pass-less airline processing, confirmation of assigned traveling credentials, or determination of security protocols).
US09721079B2
Verifying the identity of a person claiming to be represented by a picture by way of providing a string of text (randomly generated or generated by another person seeking verification of same) to be recited by the claimant. The string of text is recited in a video which is received by an intermediary server at a network node, or by a person seeking such verification. Automated processes may be utilized to compare the audio and video received to the picture and string of text sent. Further, comparisons to previously received audio, video, and strings of text, as well as the same available from third parties, may be used to determine fraud attempts. Viewers of the person's profile may also vote on the authenticity of a profile, thereby raising or lowering a certification confidence level, with their votes weighted more heavily towards those who have high confidence levels.
US09721068B2
An approach is provided for determining associations and/or propensity among the word occurrences during a therapy interaction for supporting a procedure. The approach involves parsing captured therapy interaction data to identify one or more word occurrences. The approach also involves determining one or more associations among the one or more word occurrences using a fuzzy association analysis and deep belief networks. The approach further involves determining a propensity of the one or more associations based on a probability analysis. The approach also involves specifying the one or more associations as evidence data for supporting a therapeutic outcome, a mental state classification, or a combination thereof.
US09721067B2
An Accelerated Progression Relapse Test (APRT) and method is provided for use in the prognosis of a patient having an ER+ breast cancer. The APRT provides a determination of when a patient in a particular diseased state is likely to benefit from further disease treatment, or does not have a high probability of benefit with additional treatment. Four genetic probes are disclosed that target the MKI67, CDC6 and SPAG5 gene and gene products. The ER+ breast cancer patient population is stratified into two groups, with the low gene expression group identifying the patient/patient group that is less likely to benefit from additional treatment measures, and a high gene expression group identifying the patient group that is more likely to benefit from additional treatment measures.
US09721066B1
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for monitoring a user's health data. A wearable fitness tracking device may include a heart-rate sensor, a steps taken sensor, a display, and perform operations including: receiving, from the heart-rate sensor, data representing the user's heart rate during a time period, receiving, from the steps taken sensor, data representing the number of steps taken by the user during the time period, determining a risk score for the user using the data representing the user's heart rate during the time period and the data representing the number of steps taken by the user during the time period, comparing the risk score to a threshold risk score, determining a risk profile using a result of comparing the risk score to the threshold risk score, and presenting data for the risk profile on the display.
US09721059B1
Disclosed are integrated circuit (IC) design methods, systems and computer program products. During IC design, an electrical netlist with built-in electrical resistance elements (i.e., electrical resistors) is extracted based on an IC design layout. A thermal netlist with built-in thermal resistance elements (i.e., thermal resistors) is automatically extracted based on the electrical netlist. This thermal netlist identifies thermal resistors, external thermal nodes and internal thermal node(s) and does so such that there is one-to-one mapping of the thermal resistors to electrical resistors in the electrical netlist, one-to-one mapping of the external thermal nodes to input, output and power supply nodes in the electrical netlist and one-to-one mapping of the internal thermal node(s) to element(s) (e.g., library and/or customized elements) in the electrical netlist. The electrical and thermal netlists are combined and simulations are performed on the combined electrical-thermal netlist in order to generate a thermal-aware performance model of the IC.
US09721058B2
A system and method use reactive initialization to facilitate formal verification of an electronic logic design. The system verifies that a part of the logic design correctly transitions through a sequence of states by automatically assigning an initial state value. The system interacts with a correction-unit to provide meaningful feedback of verification failures, making it possible for the correction-unit to correct the failures or add new constraints that allow the verification to complete. Assigning an initial state simplifies the verification of the validity of the remaining states in the sequence, thus making it more likely to reach a conclusive result and consuming less computing resources.
US09721057B2
A system and method for netlist clock domain crossing verification leverages RTL clock domain crossing (CDC) verification data and results. The netlist clock domain crossing verification system (NCDC) migrates RTL-level constraints and waivers to the netlist design so that the user does not have to re-enter them. The NCDC checks the netlist and generates a report that compares RTL-level CDC checking results to the netlist-level CDC checking results to make it easy to see new issues. The NCDC receives and stores netlist corrections from user input or automatically corrects certain CDC violations, in the netlist.
US09721052B1
The present disclosure relates to a system and method for multi-user, at least partially concurrent, electronic circuit design. Embodiments may include displaying, at a first client computing device associated with a first user, at least a portion of an electronic circuit design, wherein the electronic circuit design is accessible by multiple users in an at least partially concurrent manner. Embodiments may further include processing a command at the first client computing device from the first user and receiving a temporary update from a server computing device, wherein the temporary update corresponds to a second user associated with a second client computing device. Embodiments may also include displaying, at the first client computing device, an operation corresponding to the received temporary update.
US09721050B2
A memory cell arrangement of SRAM cell groups may be provided in which in each of the groups multiple SRAM cells are connected to an input of a local read amplifier by at least one common local bit-line. Outputs of the amplifiers are connected to a shared global bit-line. The global bit-line is connected to a pre-charge circuit, and the pre-charge circuit is adapted for pre-charging the global bit-line with a programmable pre-charge voltage before reading data. The pre-charge circuit comprises a limiter circuit which comprises a pre-charge regulator circuit connected to the global bit-line to pre-charge the global bit-line with the programmable pre-charge voltage, and an evaluation and translation circuit connected to the pre-charge regulator circuit and the global bit-line to compensate leakage current of the global bit-line without changing its voltage level.
US09721039B2
A relationship visualization system displays contextual information for a relationship between two entities of a document management system, such as for a user and a document. The system can receive a request for a relationship visualization from a user, such that the request indicates the user and a document. Then, the system determines, from a multipartite graph, a set of relationship paths coupling entity nodes that correspond to the user and the document. A relationship path can include one or more entity nodes indicating contextual information for the relationship between the user and the document. Then, the system selects a first group of entity nodes from the set of relationship paths to represent the relationship between the user and the document. The system then provides a relationship visualization that displays contextual information from the first group of entity nodes to illustrate the relationship between the user and the document.
US09721037B2
A method and system for converting XML files to and from files in a data format based on hierarchies in real-time. A method for converting from XML to the data format based on hierarchies includes: applying a stylesheet to at least one XML file thereby generating at least one data record in an intermediate format and including information included in the at least one XML file; and, translating the at least one record in the intermediate format to the data format based on hierarchies. A method for converting from a data format based on hierarchies to XML includes: translating at least one record including information stored in the file format based on hierarchies to an intermediate format; and, applying a stylesheet to the at least one record in the intermediate format thereby generating at least one XML file being indicative of the information and suitable for transmission.
US09721034B2
The management of tabs in browser applications may be at least partially automated. In a described implementation, a link present in browser content information may include a link property indicating that the new browser content information targeted by the link is to be opened in a new tab. A browser application can therefore automatically launch a new tab without a user request. In another described implementation, a new travelog created for a new tab may be initially populated with an historical entry that points to spawning browser content information and identifies the originating tab. When a user attempts to move backward from an initial page of the new tab, a browser application can therefore automatically redisplay the spawning browser content information at the originating tab.
US09721029B1
An embodiment is a system and method for a user to organize web content and applications and to share web content and applications with other users. A user may bubble web pages that interest them. The bubbles may be linked or stitched together to form a trail of pages that may not only aid the user to navigate relevant pages, but also be shared with other users.
US09721025B2
In one embodiment, a method comprises, by a computer system, receiving a search term, determining a search constraint for a search query, and generating a search query. The search query includes the search term and the search constraint. The search query requires that at least a first number of search results that are returned in response to the search query match both the search term and the search constraint. The search query permits at least a second number of the search results to match only the search term. The computer system provides the search query for a search against a store of data.
US09721022B2
A method for searching and displaying content related to a post in an activity stream may include presenting, by a processor, an activity stream to a user. The activity stream may include a plurality of posts. The method may also include detecting a user action with respect to a particular post of the plurality of posts and analyzing content of the particular post. The method may additionally include searching at least other posts in the activity stream of the user for related content to the particular post based on the analysis of the content of the particular post. The method may additionally include generating a list of posts including related content to the particular post in response to the search. The method may further include presenting the list of posts comprising the related content. The list of posts provide a history or context leading up to the particular post.
US09721020B2
System, method, and computer program product to perform an operation to obfuscate search queries via broadened subqueries and recombining, by referencing an ontology to identify a set of generalized terms corresponding to at least one term of a received query, generating a plurality of subqueries based on the received query and the set of generalized terms, executing each of the plurality of subqueries to retrieve a result set for each respective subquery, and filtering the result sets using the received query to produce a result set responsive to the received query.
US09721017B2
A computer-implemented system and method for search and navigation on a network to find and display specific search identified information in documents. Queries are sent to search engine services and responses comprising snippets are returned. Then, in response to only one or a few user inputs, documents are opened and locations of content matching or best matching the snippets are found reliably and distinguished in a display.
US09721012B1
A system and machine-implemented method for displaying social presence information associated with content, the method including identifying content being provided for display, determining an entity associated with the content, determining one or more social presence scores for the content based on social activity at one or more pages belonging to the entity at one or more social networking services, the social presence score being determined based on one or more indications of the quantity or quality of the social activity, determining, based on at least one score of the one or more social presence scores, whether the content should be annotated with social presence information regarding the social activity and providing the content and social presence information for display if it is determined that the content should be annotated with social presence information.
US09720996B1
A system dependencies tracking application for large scale Information Technology (IT) systems is provided. In one embodiment, a computing system may capture information related to components of an information technology system and relationship information between each component of the information technology system. The computing system may also store the information related to the components and the relationship information in a database.
US09720993B2
In accordance with embodiments, there are provided mechanisms and methods for synchronizing data in a database network system. These mechanisms and methods for synchronizing data in database network system can enable embodiments to provide users a synchronization button on a UI or synchronization field through an API for specifying data for synchronization. The ability of embodiments to provide users a synchronization button on a UI or synchronization field through an API for specifying data for synchronization can enable users to easily and efficiently change and update data in a database system.
US09720992B2
Technologies are described for performing replication within a database environment. For example, replication of database data can be performed using data manipulation language (DML) statements and logical logs. A database node can execute a DML statement, create a logical log comprising the DML statement, and insert the logical log into a logical log queue. The logical log can be sent to one or more other database nodes for execution of the DML statement stored within the logical log. Logical logs can be grouped for sending to other nodes. Logical logs can be executed on a first node and one or more other nodes within the same transaction boundary. Execution of DML statements can be decoupled from sending, receiving, grouping, and/or processing of logical logs.
US09720975B2
An engine and method for tracking the influence of an entity operating within a social network are presented. A query containing social network content is received. A database for entries referencing the social network content is searched, and interactions between an entity participating within the social network and the social network content are identified. A dynamic interaction network (DIN) of a plurality of the entities is identified and a dynamic influence score for an entity in the query specific DIN is calculated.
US09720964B1
Methods for enhancing search results includes providing a search result including a plurality of search result items and posting the search result items or a link thereto to a social network cite.
US09720960B2
A view schema is generated from a view definition, wherein the view schema includes one or more relational views that are created by translating one or more object queries in the view definition into one or more relational queries. A report design schema is generated from the view definition by: creating one or more report tables that correspond to the one or more relational views of the view schema and extending the one or more report tables with one or more primary key constraints and one or more foreign key constraints. A reporting model is generated by reverse engineering the report design schema, wherein the reporting model includes the one or more primary key constraints and the one or more foreign key constraints. A report is generated using the reporting model, wherein the report includes the one or more primary key constraints and the one or more foreign key constraints.
US09720953B2
Systems and methods for converting a data item provided by an external data provider system into a data type specified by a data processing system for a data field of the data item. A data processing system stores a coercion rule for each data field of a first data set provided by the data provider system. Each stored coercion rule identifies at least one data type for the corresponding data field. Responsive to a second data set provided by the data provider system, the data processing system coerces each data item of the second data set into at least one data type specified by the stored coercion rule for the data field of the data item to generate at least one converted data item of the second data set. The data processing system generates information from at least one converted data item, and provides the information to a consuming system.
US09720942B2
Calculation of aggregated values in a history database table can be optimized using an approach in which an ordered history table is accessed. The ordered history table can include a sequential listing of commit identifiers associated with updates, insertions, and/or deletions to values in the database table. The ordered history table can be traversed in a single pass to calculate an aggregation function using an optimized algorithm. The optimized algorithm can enable calculation of an aggregated metric of the values based on a selected method for tracking invalidated values to their corresponding commit identifiers. The calculated metric is generated for a current version of the database table; and promoted.
US09720937B2
The invention relates to a method, a system (101) and a computer program product to identify a particular data object of a data type in a database (104) that comprises data objects of the data type. The system (101) comprises a query composition unit (102) to compose a search query to identify a candidate data object being a candidate for the particular data object. A search unit (103) identifies the candidate data object in the database (104) based on the search query. A presentation unit (105) presents the candidate data object to the user. A feedback receiving unit (106) receives user feedback on the relevance or irrelevance of a segment of the candidate data object. The search unit (103) further identifies an improved candidate data object in response to the received user feedback. The improved candidate data object is an improved candidate for the particular data object.
US09720935B2
In one embodiment, receiving, from a user of a social network, an image with embedded metadata; and suggesting, to the user, information to be associated with the image based on the embedded metadata.
US09720930B2
A travel management system may include a client module to generate a request to update and/or search for data related to a trip. A database module may receive the request and communicate with a database. The database may include data organized in a trip data store table including unique keys respectively identifying trips. The database may further include index tables related to attributes of the trips and identified by the unique keys. The database module may obtain data related to the request from an index table corresponding to a unique key and forward a response to the client module.
US09720928B2
A system can efficiently removes ranges of entries from a flat sorted data structure that represent stale fingerprints As part of fingerprint verification during deduplication, the system performs an attributes intersect range calculation (AIRC) procedure on the stale fingerprint data structure to compute a set of non-overlapping and latest consistency point (CP) ranges. During the AIRC procedure, an inode associated with a data container is selected and the FBN tuple of each deleted data block in the file is sorted in a predefined FBN order. The AIRC procedure then identifies the most recent fingerprint associated with a deleted data block. The set of non-overlapping and latest CP ranges is then used to remove stale fingerprints associated with that deleted block from the fingerprint database. A single pass through the fingerprint database identifies the set of non-overlapping and latest CP ranges, thereby improving efficiency of the storage system.
US09720924B2
Embodiments of the present invention disclose a method, a computer program product, and a computer system for suspending and activating a database index. A computer determines a quantity of changes for a number of rows of a database that are to be made by an update of the database. The computer determines whether to suspend an index of the database based, at least in part, on a comparison between the quantity of changes and a pre-determined threshold value. The computer suspends the index of the database based on a result of the comparison that indicates the quantity of changes at least meet the pre-determined threshold value. A suspension of the index of the database initiates a rebuilding of the index.
US09720915B2
In some implementations, a method for managing data in a user device includes pushing first metadata for a first resource in a first perimeter to a service external to the first perimeter. The first perimeter is configured to prevent external resources from accessing resources in the first perimeter. Second metadata for a second resource in a second perimeter is pushed to the external service. The external service is external to the second perimeter, the second perimeter being configured to prevent external resources from accessing resources in the second perimeter. Information is presented to the user based on a combination of the first metadata and the second metadata.
US09720912B2
It is possible to reduce a review load of a reviewer. A document management system includes a screen display unit that displays a document group having a plurality of pieces of document data extracted from digital information to be determined for relevance to a lawsuit by a user and classification buttons allowing the user to select classification conditions for classifying the document group under predetermined conditions, a selection information reception unit that receives information relating to a classification button selected by the user among the classification button displayed by the screen display unit as selection information, and a classification instruction unit that analyzes the document group based on the selection information, classifies document data in the document group using the analysis result, and instructs the screen display unit to display the document group based on the classification result.
US09720908B2
An approach to generating a context for translating strings for a graphical user interface. The approach includes a computer receiving a string to be translated and associated source code, the string identified by a unique key within the associated source code and the associated source code is markup language. The computer identifies a first logical section of the associated source code corresponding to a unique key of the string and one or more graphical user interface components within the identified logical section of the associated source code. The computer then creates a mockup image presenting the one or more graphical user interface components and the string. The computer then labels, in the created mockup image, each of the one or more graphical user interface components and the first string of the plurality of strings, and identifies one or more additional graphical user interface components.
US09720905B2
An approach is provided in which a knowledge manager generates syntactic annotation tokens that correspond to syntactic relationships between terms included in a source document. The knowledge manager creates a knowledge structure that stores the syntactic annotation tokens in parallel fields and stores the source document terms in original text fields, which align to the parallel fields. In turn, the knowledge manager utilizes the knowledge structure to generate answers to questions based upon the syntactic annotation tokens.
US09720902B2
A new information in a language and relating to a subject matter domain is parsed into a constituent set of complete grammatical constructs. In a subset of the complete grammatical constructs, a set of linguistic styles of the language is identified according to a subset of a set of word-style associations related to the language and independent of the subject matter domain. A first weight is assigned to a first linguistic style and a second weight to a second linguistic style from the set of linguistic styles. A first intention information is mapped to the first style using a first style-intention rule, and a second intention information to the second style using a second style-intention rule. A complete grammatical construct in the subset is tagged with the first intention information responsive to a weight associated with the first intention information exceeding an intention selection threshold.
US09720901B2
A method for an automated text-evaluation service, and more particularly a method and apparatus for automatically evaluating text and returning a score which represents a degree of inappropriate language. The method is implemented in a computer infrastructure having computer executable code tangibly embodied in a computer readable storage medium having programming instructions. The programming instructions are configured to: receive an input text which comprises an unstructured message at a first computing device; process the input text according to a string-structure similarity measure which compares each word of the input text to a predefined dictionary to indicate whether there is similarity in meaning, and generate an evaluation score for each word of the input text and send the evaluation score to another computing device. The evaluation score for each input message is based on the string-structure similarity measure between each word of the input text and the predefined dictionary.
US09720897B2
Mutations representing spreadsheet edit operations are received at a server from client computers of collaborators and also at a collaborator's client computer from other collaborators and the server. Different mutations may conflict, i.e., provide contradictory instructions on how a spreadsheet is to be edited. Techniques for representing sort operations, cut-and-paste operations, and operations to change cell properties as mutations, and operational transform techniques that can be used to resolve conflicts between such mutations, are disclosed herein. Further disclosed herein are techniques for identifying and processing computationally intensive types of mutations in a calculation thread which operates asynchronously with respect to a UI thread at a collaborator's client computer. The processing may include performing an operational transform on results of the calculation thread based on results obtained in the UI thread.
US09720893B2
A system and method for automated customization are disclosed herein. The system includes a content distribution network formed of a content network, an end-user network, and one or several customization networks. The end-user network includes a local data server and an end-user server. The end-user server can be programmed to receive a document, identify one or several customizations for insertion into that document; identify one or several insertion points designated to receive the one or several customizations, and to insert the one or several customizations into the designated one or several insertion points.
US09720892B2
A method for managing file changes is provided. A file editor is able to view if the file he is submitting for review, is already under review with any reviewer. A reviewer would be informed that another editor has edited the same file and has submitted his changes for review. Editors would be informed of all reviewer comments if there are multiple reviewers on one file.
US09720889B1
Systems and methods for checking for redirection of a content item are provided. A first web page identified by a first uniform resource locator (URL), the first web page comprising a content item. The first URL is stored in a memory element. After a predetermined period of time elapses, a second URL associated with a second web page rendered by the browser is identified. A discrepancy between the first URL and the second URL is detected. Responsive to the discrepancy detection, the content item is identified as ineligible for participation in an online auction system.
US09720888B1
An intermediary system operates as an intermediary between content servers and user devices, and provides services for improving page load times as seen by end users. One such service involves converting all or a portion of a retrieved content page (e.g., web page) into a stream of graphics commands, such as OpenGL commands, that can be executed by the user device's graphics processing unit (GPU). The intermediary system sends these commands to a browser component running on the user device for execution by the GPU.
US09720882B2
Generating notifications comprising text and image data for client devices with limited display screens is disclosed. An image to be included in the notification is resized and reshaped using image processing techniques. The resized image is further analyzed to identify optimal portions for placing the text data. The text data can also be analyzed and shortened for including at the identified portion of resized image to generate a notification. The resulting notification displays the text and image data optimally within the limited screen space of the client device so that a user observing the notification can obtain the information at a glance.
US09720867B2
Embodiments of a multi-processor array are disclosed that may include a plurality of processors and configurable communication elements coupled together in a interspersed arrangement. Each configurable communication element may include a local memory and a plurality of routing engines. The local memory may be coupled to a subset of the plurality of processors. Each routing engine may be configured to receive one or more messages from a plurality of sources, assign each received message to a given destination of a plurality of destinations dependent upon configuration information, and forward each message to assigned destination. The plurality of destinations may include the local memory, and routing engines included in a subset of the plurality of configurable communication elements.
US09720861B2
Methods and apparatus for control access to memory in dual-processor. In particular, there are disclosed methods and apparatus for use where a single memory is shared for instructions for the processors and a data store to reduce conflicts between access requirements.
US09720856B2
A content sharing device may receive, from a content providing device, information that identifies content to be shared with a dongle device via a content sharing service. The content sharing device may receive, from the content providing device, information that identifies a contact with which the content is to be shared. The content sharing device may determine, based on the information that identifies the contact, a dongle device identifier. The dongle device identifier may include a network address associated with the dongle device. The content sharing device may provide, to the dongle device and based on determining the dongle device identifier, information that identifies the content. The information that identifies the content may cause the content to be accessible by a content receiving device connected to the dongle device.
US09720855B2
An embodiment includes a system, comprising: a device configured to present a logical device and enable a virtual device in response to a control signal; and a processor coupled to the device and configured to: present the logical device through a first device interface; transmit the control signal to the device to enable the virtual device; and after the virtual device is enabled, present the virtual device through a second device interface.
US09720854B2
Aspects of the disclosure enable location of a wireless peripheral by a computing device even when the wireless peripheral is beyond a communication range of, or otherwise inaccessible by, the computing device. A user gives a command to a first computing device to determine the location of the wireless peripheral. The first computing device requests other networked computing devices to locate the wireless peripheral. At least one of the other networked computing devices establishes communication with the wireless peripheral, obtains location information for the wireless peripheral, and communicates the location information to the first computing device. The first computing device communicates the location of the wireless peripheral to the user.
US09720847B2
A method and apparatus for calculating a victim way that is always the least recently used way. More specifically, in an m-set, n-way set associative cache, each way in a cache set comprises a valid bit that indicates that the way contains valid data. The valid bit is set when a way is written and cleared upon being invalidated, e.g., via a snoop address, The cache system comprises a cache LRU circuit which comprises an LRU logic unit associated with each cache set. The LRU logic unit comprises a FIFO of n-depth (in certain embodiments, the depth corresponds to the number of ways in the cache) and m-width. The FIFO performs push, pop and collapse functions. Each entry in the FIFO contains the encoded way number that was last accessed.
US09720845B2
A mapping may be changed in a table stored in memory. The table may map a first set of addresses, for a set of data, to a second set of addresses. The changing of the mapping may including mapping the first set of addresses to a third set of addresses. In response to the changing of the mapping, one or more flush operations may be executed to invalidate one or more entries within one or more address translation caches. The one or more entries may include the second set of addresses. In response to the executing of the one or more flush operations, a first test case may be run. The first test case may be to test whether any of the first set of addresses are mapping to the second set of addresses.
US09720841B2
A computing element, system, and method for implementing control structures for a compressed cache in hardware. Embodiments provide a first engine configured to allocate and deallocate virtual memory pages and physical memory pages from pools of available pages to store received data to the compressed cache, a second engine configured to compress received data and store the compressed data. Embodiments also provide for embedding data within the virtual and physical memory pages to indicate page size, type, and data compression.
US09720840B2
Methods and systems that identify and power up ways for future instructions are provided. A processor includes an n-way set associative cache and an instruction fetch unit. The n-way set associative cache is configured to store instructions. The instruction fetch unit is in communication with the n-way set associative cache and is configured to power up a first way, where a first indication is associated with an instruction and indicates the way where a future instruction is located and where the future instruction is two or more instructions ahead of the current instruction.
US09720837B2
A computer allows non-cacheable loads or stores in a hardware transactional memory environment. Transactional loads or stores, by a processor, are monitored in a cache for TX conflicts. The processor accepts a request to execute a transactional execution (TX) transaction. Based on processor execution of a cacheable load or store instruction for loading or storing first memory data of the transaction, the computer can perform a cache miss operation on the cache. Based on processor execution of a non-cacheable load instruction for loading second memory data of the transaction, the computer can not-perform the cache miss operation on the cache based on a cache line associated with the second memory data being not-cached, and load an address of the second memory data into a non-cache-monitor. The TX transaction can be aborted based on the non-cache monitor detecting a memory conflict from another processor.
US09720822B2
In one embodiment, a node coupled to solid state drives (SSDs) of a plurality of storage arrays executes a storage input/output (I/O) stack having a plurality of layers. The node includes a non-volatile random access memory (NVRAM). A first portion of the NVRAM is configured as a write-back cache to store write data associated with a write request and a second portion of the NVRAM is configured as one or more non-volatile logs (NVLogs) to record metadata associated with the write request. The write data is passed from the write-back cache over a first path of the storage I/O stack for storage on a first storage array and the metadata is passed from the one or more NVLogs over a second path of the storage I/O stack for storage on a second storage array, wherein the first path is different from the second path.
US09720820B2
A FLASH memory control technique with wear leveling between the different blocks of the FLASH memory. By a controller managing the blocks of a FLASH memory within a data storage device, some of the blocks are pushed into a spare queue waiting to be allocated as data blocks or system blocks. When the number of blocks within the spare queue is lower than a clean threshold and any block within the spare queue has an erase count greater than an overused lower threshold, the controller performs a garbage correction operation with wear leveling between the different blocks.
US09720818B2
A testing framework has been developed to address these issues that takes common functionality normally imported by the testing scripts on the client device and instead splits the functionality into standalone, fault tolerant, scalable services. Accordingly, the scripts can utilize the functionality through APIs and therefore test drivers executing a test or building a test environment or other testing processes may access the services through an API. Therefore, each testing client and test driver does not need to separately import the functionality and run the functionality on the memory of the client device separately. Rather, multiple tests can use these functionalities, allowing the testing services to be scaled between tests.
US09720817B2
In order to perform system-capability testing, an application in an application layer may provide predefined system capabilities and/or requirements of or associated with the application to a communication plugin in a data-link layer, such as availability of communication via a network and/or a latency of the network less than a predefined value. In response, the communication plugin may determine feedback information that specifies whether the predefined system capabilities are available and whether the predefined requirements are satisfied. Then, the communication plugin may provide the feedback information to the application. When the feedback information indicates that a system capability is unavailable, remedial action may be performed. For example, the remedial action may include updating a version of the application, updating a version of the communication plugin, and/or updating a path to a location in a network.
US09720815B2
A technique for generating testcases includes receiving a new product specification for an application. A noun-verb pairing is performed on the new product specification. An attempt is made to locate a similar noun-verb pairing in a previous product specification for the application that corresponds to the new noun-verb pairing. In response to locating the similar noun-verb pairing in the previous product specification, a new testcase is generated by modifying an existing testcase that is associated with the similar noun-verb pairing in the previous product specification. In response to not locating the similar noun-verb pairing in the previous product specification, the fact that the new testcase was not generated is indicated.
US09720813B2
Information associated with tests performed on an application program is captured and stored in memory. This information is then used to recommend a set of regression tests to a user for use in regression testing the application. Particularly, responsive to being notified about a change in the program code, the device analyzes the stored information and recommends a selected set of regression tests to a user based on the results of that analysis. The recommended tests enable the user to adequately regression test the program code in the application program using an optimal number of test cases.
US09720808B2
A debugging system receives traceback data representing logging of a system error of a target system. An operating environment of the target system is replicated by creating a virtual machine (VM) having characteristics represented by the state data representing an operating state of the target system. An analysis is performed on the traceback data within the VM to simulate the system error.
US09720799B1
Application validation is performed based on object level hierarchy data associated with the application. An application is executed on a physical or emulated host device, and assembly code is generated for the executing application. The assembly code is analyzed to identify objects associated with the application, and to identify relationships between the objects. Based on the object and relationship data, an object level hierarchy is generated for the application. Validation of the application may be performed by comparing an object level hierarchy for a current version of the application to a previously generated hierarchy for a previous version of the application to identify differences between the two hierarchies.
US09720795B2
System and computer program product to perform an operation comprising generating, based on a first output generated by a first execution instance of a command, a first output file specifying a value of at least one performance metric, wherein the first output file is formatted according to a predefined format, comparing the value of the at least one performance metric in the first output file to a value of the performance metric in a second output file, the second output file having been generated based on a second output generated by a second execution instance of the command, and outputting for display an indication of a result of the comparison of the value of the at least one performance metric of the first output file to the value of the at least one performance metric of the second output file.
US09720792B2
Computer-implemented techniques are disclosed for verifying circuit designs using dynamic problem generation. A device under test (DUT) is modeled as part of a test bench where the test bench is a random process. A set of constraints is solved to generate stimuli for the DUT. Problem generation is repeated numerous times throughout a verification process with problems and sub-problems being generated and solved. When a problem is solved, the problem structure can be stored in a cache. The storage can be based on entropy of variables used in the problem. The problem storage cache can be searched for previously stored problems which match a current problem. By retrieving a problem structure from cache, the computational burden is reduced during verification. Problems can be multi-phase problems with storage and retrieval of problem structures based on the phase level. Caching can be accomplished using an information theoretic approach.
US09720786B2
When the mirrored point in time copy fails, at that point in time all the data for making the source and target of the point in time copy consistent is available on secondary volumes at disaster recovery site. The data for the source and target of the failed point in time copy are logically and physically equal at that point in time. This logical relationship can be maintained, and protected against ongoing physical updates to the affected tracks on the source secondary volume, by first reading the affected tracks from the source secondary volume, copying the data to the target secondary volume, and then writing the updated track to the source secondary volume.
US09720779B2
A backup system and a backup method thereof are provided. The backup system includes an operational storage, a backup storage, a service client, a metadata server and a backup client. The service client accesses the operational storage according to an operational storage layout metadata and makes a data change to the operational storage to transmit a metadata update request. The metadata server receives the metadata update request from the service client, updates a local operational storage layout metadata in response to the data change according to the metadata update request, acknowledges the metadata update request and instructs the backup client to back up the data change of the operational storage to the backup storage according to the metadata update request.
US09720778B2
Systems and methods for backing up data associated with storage area network (SAN) data stores connected to a backup device over a SAN such that the backup is performed without using a local area network (LAN). The systems and methods include receiving a snapshot of a virtual machine (VM), the VM being associated with a VM datastore disk, which is further associated with a unique ID. The unique ID associated with the VM datastore disk is compared with a unique ID associated with a disk available on the computing device. When the unique ID associated with the VM datastore disk matches the unique ID associated with the disk on the computing device, the disk on the computing device with the matching unique ID is opened for reading, and data from the opened disk is copied to a copy data storage pool over a storage area network.
US09720775B2
A method, system and computer program product are provided for implementing concurrent adapter firmware update of a Single Root Input/Output Virtualization (SRIOV) adapter in a virtualized system. An adapter driver is used to update adapter firmware concurrent with normal I/O operations. When configuration is stored in a scratchpad buffer, the adapter driver detects virtual functions (VFs) configured and operating. An enhanced error handling (EEH) process is initiated, freezing the VFs, and an updated adapter firmware image is loaded to the adapter. The adapter driver completes the EEH recovery, the adapter is restarted using the new updated adapter firmware. The VFs device drivers unfreeze the VFs, and complete the EEH recovery.
US09720771B2
A system includes a first nonvolatile memory array, a second nonvolatile memory array, and a memory controller. The memory controller is configured to write an indicator bit to the second nonvolatile memory array, determine whether the indicator bit is valid in response to a power up of the system after a high-temperature event, a received command after a high-temperature event, a predetermined number of power ups, or a power up or received command after each of a predetermined number of high-temperature events, and write data stored in the second nonvolatile memory array to the first nonvolatile memory array when the indicator bit is valid.
US09720764B2
Uncorrectable memory errors in pipelined central processing units. A processor core may be connected to a memory system and it may include a processor cache. In response to determining an uncorrectable error in data stored in the memory system, the address of a memory location of the uncorrectable error is stored in an address buffer and a recovery procedure is performed for the processor core. When fetching data from a memory location and if it is determined that the address of this memory location is stored in the address buffer, the content of a cache line related to the address is moved into a quarantine buffer of the processor core. When detecting an error in the data of the moved cache line, a repair procedure for the data of this address is triggered.
US09720759B2
A server includes a distribution difference calculator and a determining unit. The distribution difference calculator calculates difference information between a first distribution of features calculated from operating data of terminal devices of a first machine type and a second distribution of features calculated from operating data of terminal devices of a second machine type. The determining unit determines whether a model is applicable to the terminal devices of the first machine type to predict occurrence possibility of a failure in each terminal device of the first machine type on basis of the difference information wherein the model is generated on basis of operating data of the terminal devices of the second machine type and is configured to predict occurrence possibility of a failure in each terminal device of the second machine type on basis of each of the features calculated from the operating data thereof.
US09720756B2
A computing system includes: a volatile memory configured to: store a debug assert flag mask including bits; cores, coupled to the volatile memory, configured to: detect an error in at least one of the cores, set at least one of the bits corresponding to the cores with the error detected, collect debug information for each of the cores with the error detected, collect operating information for each of the cores without the error detected, generate assert dump information based on compiling the debug information; and a nonvolatile memory, coupled to at least one of the cores, configured to: store the assert dump information, the operating information, configured to by at least one of the cores.
US09720754B2
A table of error counts is generated based on reading wordlines of a flash memory device, the table storing an error count for each combination of wordline and respective read level voltage used to read the wordlines. A plurality of offset wordline groups are generated based on the table of error counts, with each group associating a different read level offset voltage with a plurality of wordline addresses. A storage device is configured to read memory cells using a read level offset voltage of a generated offset wordline group associated with a wordline address of the memory cells to be read. After a predetermined point in a life cycle of a respective memory block, the table is regenerated and plurality of offset wordline groups are regenerated based the regenerated table of error counts.
US09720752B2
Various embodiments are generally directed an apparatus and method for receiving information to write on a clustered system comprising at least a first cluster and a second cluster, determining that a failure event has occurred on the clustered system creating unsynchronized information, the unsynchronized information comprising at least one of inflight information and dirty region information, and performing a resynchronization operation to synchronize the unsynchronized information on the first cluster and the second cluster based on log information in at least one of an inflight tracker log for the inflight information and a dirty region log for the dirty region information.
US09720750B1
Examples of techniques for invoking a restricted access service through a representational state transfer (RESTful) interface are disclosed. In one example implementation according to aspects of the present disclosure, a method may include: receiving, at a web server, a RESTful application program interface (API) request to access a RESTful API from a user on a mobile device; determining whether the user is authorized to access the RESTful API using an authorization service; responsive to determining that the user is authorized to access the RESTful API, routing the RESTful API request from the web server to the restricted access service to process the request; receiving, by the web server, return data from the restricted access service after processing the request; and invoking a data transformer associated with the RESTful API to transform the return data into transformed data.
US09720747B2
Flow control of messages to/from clients and services in a remote access system. Within the remote access system a layered architecture may be provided that includes a client layer at a client device, a service layer associated with a service, and a server layer that is a communications proxy for messages sent between the client device and the service. The service layer may have a receive queue for messages received from the client device and a send queue of messages destined for the client device. The server layer may include an outbound queue of messages destined for the client device. Full duplex communications between the client layer and the server layer may be implemented using a service protocol in a first channel for communication between the client layer and the server layer and a second channel for communication between the server layer and the client layer.
US09720745B2
A method for providing communication between application programs running via devices connected to a same network is provided. The method includes an operation for connecting a first application program, which is running in a first device via a web socket server in the first device, with a second application program, which is running in a second device, and an operation for transmitting and receiving data between the second application program and the first application program via the web socket server.
US09720744B2
A system and method for a performance monitoring hardware unit that may include logic to poll one or more performance monitoring shared resources and determine a status of each performance monitoring shared resource. The performance monitoring hardware unit may also include an interface to provide the status to allow programming of the one or more performance monitoring shared resource. The status may correspond to a usage and/or an errata condition. Thus, the performance monitoring hardware unit may prevent programming conflicts of the one or more performance monitoring shared resources.
US09720727B1
Systems and method for the management of migrations of virtual machine instances are provided. A migration manager monitors the resource usage of a virtual machine instance over time in order to create a migration profile. When migration of a virtual machine instance is desired, the migration manager schedules the migration to occur such that the migration conforms to the migration profile.
US09720724B2
A system and method for instantiation of a virtual machine (VM) in a datacenter includes providing a network appliance in a location for listening to management information traffic. Indices are created for data center images in the network appliance. VM instantiation requests are intercepted in the network appliance. Locations from which blocks for the VM should be fetched based upon network cost are determined. VM image blocks are populated from the locations.
US09720697B2
In an embodiment, a method is provided. The method includes managing user-level threads on a first instruction sequencer in response to executing user-level instructions on a second instruction sequencer that is under control of an application level program. A first user-level thread is run on the second instruction sequencer and contains one or more user level instructions. A first user level instruction has at least 1) a field that makes reference to one or more instruction sequencers or 2) implicitly references with a pointer to code that specifically addresses one or more instruction sequencers when the code is executed.
US09720693B2
A processor core in an instruction block-based microarchitecture includes a control unit that allocates instructions into an instruction window in bulk by fetching blocks of instructions and associated resources including control bits and operands at once. Such bulk allocation supports increased efficiency in processor core operations by enabling consistent management and policy implementation across all the instructions in the block during execution. For example, when an instruction block branches back on itself, it may be reused in a refresh process rather than being re-fetched from the instruction cache. As all of the resources for that instruction block are in one place, the instructions can remain in place and only valid bits need to be cleared. Bulk allocation also facilitates operand sharing by instructions in a block and explicit messaging among instructions.
US09720671B2
The described implementations relate to installation of customized applications. One technique obtains a software application generated by a producer. The technique identifies customizations made by a customizer to the software application that are desired by a customer. The technique further installs the software application and the customizations on the customer's computer in a single operation.
US09720667B2
Technologies for automatic loop vectorization include a computing device with an optimizing compiler. During an optimization pass, the compiler identifies a loop and generates a transactional code segment including a vectorized implementation of the loop body including one or more vector memory read instructions capable of generating an exception. The compiler also generates a non-transactional fallback code segment including a scalar implementation of the loop body that is executed in response to an exception generated within the transactional code segment. The compiler may detect whether the loop contains a memory read dependent on a condition that may be updated in a previous iteration or whether the loop contains a potential data dependence between two iterations. The compiler may generate a dynamic check for an actual data dependence and an explicit transactional abort instruction to be executed when an actual data dependence exists. Other embodiments are described and claimed.
US09720666B2
The disclosed embodiments provide a system for densely storing strings within the memory of a software program. During operation, the system receives a set of characters to be stored in a string, wherein each character is encoded using a multi-byte public encoding. The system then stores the set of characters in the string at least in part by performing the following steps. The system determines whether every character of the set can be encoded using a first private encoding that consumes less space per character than the multi-byte public encoding. Responsive to determining that every character of the set can be encoded using the first private encoding, the system stores a particular value associated with the first private encoding in a particular field of the string. The system then stores the set of characters in the string in the first private encoding.
US09720665B2
Technology is disclosed for backing up and retrieving data in a distributed backup system (“the technology”). Files of a user can be stored across multiple computing devices (“the devices”) of the user, e.g., mobile devices, and/or at a server, e.g., a cloud storage server, in the distributed backup system. The user can define various policies for storing different files at different devices. For example, the user may define a policy for storing video files on a device that has a bigger display. The devices can be used as an edge cache of the distributed backup system in serving files to the user. Upon receiving a request for retrieving a file, the technology determines if any of the user devices that are in proximity to the requesting device has the file. If yes, the file is transmitted to the user from the proximate device instead of from the server.
US09720664B2
One or more processors determine whether a first procedure within a first program meets a first criterion. The first criterion is included in a plurality of criteria that are configured for pessimistic aliasing. Responsive to the determination, one or more processors determine whether to flag the first procedure for pessimistic aliasing.
US09720650B2
A method and an assemblage for post-processing an output of a random source of a random generator are presented. In the method, an output signal of the random source is compressed, thereby yielding a sequence of compressed signal values that are checked in terms of their distribution.
US09720646B2
A redundant representation is provided where an M-bit value represents a P-bit numeric value using a plurality of N-bit portions, where M>P>N. An anchor value identifies the significance of bits of each N-bit, and within a group of at least two adjacent N-bit portions, two or more overlap bits of a lower N-bit portion of the group have a same significance as two or more least significant bits of at least one upper N-bit portion of the group. A plurality of operation circuit units can perform a plurality of independent N-bit operation in parallel, each N-bit operation comprising computing a function of corresponding N-bit portions of at least two M-bit operand values having the redundant representation to generate a corresponding N-bit portion of an M-bit result value having the redundant representation. This enables fast associative processing of relatively long M-bit values in the time taken for performing an N-bit operation.
US09720636B2
A method of providing an automatic connection service by a server includes: acquiring at least one of state information of an image forming apparatus and state information of a job performed by the image forming apparatus; determining whether the acquired at least one of state information satisfies a performing condition stored in a second server; and if the stored performing condition is satisfied, performing a stored operation in accordance with the stored performing condition.
US09720631B2
Relay server, storage medium storing instructions executable by the relay server, and control method
A relay server includes: a communication device communicable with a recording apparatus, a conversion server which converts image data, and a storage server which stores the image data; and a controller. The controller is configured to: acquire, from the recording apparatus, a storing instruction for storing converted image data into the storage server, the converted image data being image data converted by the conversion server; acquire account identification information for identifying an account of the recording apparatus in the storage server, from the recording apparatus via the communication device; acquire the converted image data from the conversion server via the communication device; and transmit the acquired converted image data and the acquired account identification information to the storage server via the communication device in a state in which the acquired converted image data and the acquired account identification information are associated with each other.
US09720627B2
Managing data stored in at least one data storage device (DSD) of a computer system where the at least one DSD includes at least one disk for storing data. A Linear Tape File System (LTFS) write or read command is generated including an LTFS block address. The LTFS block address is translated to a device address for the at least one DSD and data on a disk of the at least one DSD is written or read at the device address.
US09720626B2
One or more techniques and/or systems are provided for cluster configuration information replication, managing cluster-wide service agents, and/or for cluster-wide outage detection. In an example of cluster configuration information replication, a replication workflow corresponding to a storage operation implemented for a storage object (e.g., renaming of a volume) of a first cluster may be transferred to a second storage cluster for selectively implementation. In an example of managing cluster-wide service agents, cluster-wide service agents are deployed to nodes of a cluster storage environment, where a master agent actively processes cluster service calls and standby agents passively wait for reassignment as a failover master in the event the master agent fails. In an example of cluster-wide outage detection, a cluster-wide outage may be determined for a cluster storage environment based upon a number of inaccessible nodes satisfying a cluster outage detection metric.
US09720621B2
A storage controller performing a copy process in which data stored in a copy source storage area is copied to a copy destination storage area, the storage controller includes a processor, wherein the processor receives a transfer command for giving an instruction for transferring data stored in a first area of the copy source storage area to a second area of the copy source storage area, starts a transfer process in which transfer data from the first area is read and is written into the second area in accordance with reception of the transfer command, and starts copying the transfer data into a corresponding area of the copy destination storage area that corresponds to the second area in the copy process together with the starting of the transfer process.
US09720620B1
A block-based storage system may implement efficient replication for restoring a data volume from a reduced durability state. A storage node that is not replicating write requests for a data volume may determine that replication for the data volume is to be enabled. A peer storage node may be identified that maintains a stale replica of the data volume. One or more replication operations may be performed to update stale data chunks in the stale replica of the data volume with current data chunks without updating data chunks in the stale replica of the data volume that are current. Stale replicas that are no longer needed may be deleted according timeouts or the amount of stale data in the replica.
US09720608B2
A storage control apparatus performs, for each virtual area to which a physical area is allocated, any one of coarse-grained management for managing a correspondence relationship between a virtual area and a physical area in a first size unit, and fine-grained management for managing a correspondence relationship between a virtual area and a physical area in a second size unit smaller than the first size unit. The storage control apparatus manages mapping information that expresses a correspondence relationship between a virtual area and a physical area. The storage control apparatus performs at least one of change of any of fine-grained virtual areas to a coarse-grained virtual area and change of any of coarse-grained virtual areas to a fine-grained virtual area, based on the number of duplication areas of each virtual area and a size of the mapping information.
US09720602B1
A computer-implemented method includes receiving a request to transmit column group data to a target node, the column group data comprising C columns within a column-oriented data table and determining a transmission row count R for transmitting the column group data to the target node. The method may also include transmitting a transmission packet comprising R sequentially-ordered data elements for each of the C columns to the target node. The R data elements for each column may be sequentially retrieved from memory. A corresponding method includes receiving, at a target node, a request to receive the column group data, determining the transmission row count R for receiving the column group data, and receiving a transmission packet comprising R sequentially-ordered data elements for each of the C columns and storing the sequentially-ordered data elements within memory. A corresponding computer system and corresponding computer program products are also disclosed herein.
US09720598B2
A storage system comprises a storage array comprising a plurality of solid state storage devices (SSDs), a first processor comprising a first root complex of the storage system, a plurality of controller devices, and a first switch to interconnect the plurality of SSDs, the first processor and the plurality of controller devices. A first controller device of the plurality of controller devices is to connect the storage system to one or more remote servers. The first controller device is further to receive a first request from a first server of the one or more remote servers and determine whether the first request is a data request or a control request. The first controller device is further to send a first message to a first SSD of the plurality of SSDs via the first switch, bypassing the first processor, responsive to a determination that the first request is a data request.
US09720594B2
A device with a touch-sensitive surface detects a touch on the touch-sensitive surface, determines that the touch is cancelled, and in accordance with a determination that the touch is cancelled, sends a touch cancel event to at least one of the one or more applications. Also disclosed is a device configured to determine that a respective touch has been cancelled by the device. If the respective touch has been cancelled, the device ignores the respective touch. If the respective touch has not been cancelled, the device processes the respective touch. In addition, a device configured to detect one or more touches and process at least a subset of the touches with at least one application is described. While processing at least a subset of the touches, the device receives a touch cancel event, and, in response to receiving the touch cancel event, ignores the touches.
US09720593B2
A touch panel operation device recognizes multiple kinds of operation events with respect to a touch panel with sufficient assurance and effectively restricts execution of processing not intended by a user. A gesture microcomputer detects a user's gesture with respect to a touch panel and notifies an HMI application of an operation signal corresponding to the detection. The HMI application determines an operation event from the operation signal notified by the gesture microcomputer. The notification is received in such a way that a present state of the touch panel is judged and the determination is made based on variation of the state and the like by monitoring the state.
US09720590B2
An electronic apparatus including a proximity sensor is provided. The apparatus includes a touch sensor configured to sense a touch trace of the object in response to a user gesture of touching the electronic apparatus using an object and moving the touched point being input, a proximity sensor configured to sense a motion of the object before and after the touch, and a controller configured to change the touch trace based on a direction of motion of the object before and after the touch, and recognize the user gesture according to the changed touch trace. Accordingly, the touch trace may be changed and thus, an accurate control operation may be performed.
US09720589B2
A touch display device includes a touch sensor, a visual accelerator, and a display. The touch sensor senses a touch. The visual accelerator visualizes the touch. The display displays information corresponding to the visualized touch. When the touch is outside a visual acceleration area, the visual accelerator does not process the touch. When the touch is in the visual acceleration area, the visual accelerator visualizes the touch on the display.
US09720579B2
A method, system, and computer program product for selectively associating one or more processing elements, or portions thereof, to one or more compute nodes. The method, system, and computer program product can include presenting a stream computing application, presenting metrics associated with at least one compute node and at least one processing element (or portion thereof), receiving input from a graphical display, associating one or more processing elements (or portions thereof) to one or more compute nodes, and updating the graphical display and the metrics to reflect the selective associations.
US09720570B2
The technology disclosed relates to identification of future activity options. In particular, it relates to identifying future activity options that are similar to a selected future activity, similar to past activities, that meet descriptive language criteria, that form compatible sequences of activities, or that form compatible multi-day sequences of activities. The technology disclosed also relates to rapid and convenient sorting through activity options.
US09720567B2
Multitasking and full screen menu contexts are described. In one or more implementations, an input is received to cause output of a menu in a user interface of a computing device. Responsive to this receipt, a determination is made as which of a plurality of portions displayed simultaneously in the user interface in a multitasking mode has focus, each of the plurality of portions corresponding to an output of a respective one of a plurality of applications. Responsive to the determination, output is caused of the menu as associated with the focused portion of the user interface and having a representation of at least one function based the focused portion, the representation selectable to cause performance of the function.
US09720565B2
User activity is communicated in a messaging system. Communication is performed by monitoring an input region displayed to a first user of the messaging system in a client executed at a user terminal of the first user; responsive to receiving a user activated input at the input region, analyzing the input and using the analysis to match the input to a type of user activity from a predetermined set of user activities; and transmitting a message comprising data representing the type of user activity from the user terminal of the first user to a user terminal of at least one other user of the messaging system over a communications network.
US09720559B2
The description relates to a shared digital workspace. One example includes a display device and sensors. The sensors are configured to detect users proximate the display device and to detect that an individual user is performing an individual user command relative to the display device. The system also includes a graphical user interface configured to be presented on the display device that allows multiple detected users to simultaneously interact with the graphical user interface via user commands.
US09720558B2
An exemplary method includes a media service provider system tracking statuses of media programs with respect to a user of a media service through which the media programs are distributed by way of a plurality of different media distribution models and providing a user interface view personalized for the user for display on a display screen, the user interface view including personalized user interface content that indicates one or more of the statuses of one or more of the media programs with respect to the user. In certain examples, the statuses indicated in the user interface view may include at least a first status of a first media program distributed by way of a first media distribution model and a second status of a second media program included in the media programs and distributed by way of a second media distribution model. Corresponding systems and methods are also described.
US09720557B2
An approach for providing an always-on-top user interface for a mobile application is described. An always-on-top module may provide an always-on-top user interface mode for a mobile application, wherein the always-on-top user interface mode presents at least one session of the mobile application in a user interface element that is always visible in a display of a mobile device. The always-one-top module may also receive an input for activating the always-on-top user interface mode for the mobile application. Further, the always-one-top module may render the user interface element for presenting the at least one session in the display of the mobile device.
US09720549B2
A touch-sensitive display device includes a display body, a container, a movable cover and at least two optical modules. The display body has a display surface. The container is connected with the display body. The movable cover pivots on the container so as to have an open position and a storage position. The two optical modules are disposed on the movable cover. When the movable cover is at the open position, the two optical modules protrudes outward from an extended surface of the display surface, such that the two optical modules is exposed outward from the container. When the movable cover rotates from the open position to the storage position, the movable cover drives the two optical modules to move backward to be underneath the extended surface of the display surface, such that the two optical modules are located inside the container.
US09720547B2
An optical apparatus includes a touch substrate; a waveguide layer arranged on the touch substrate, the waveguide layer including a plurality of waveguides; an optical output structure arranged on the waveguide layer and configured to output light propagating in the plurality of waveguides at touched locations on the touch substrate; a gap layer arranged to provide a predetermined gap between the waveguide layer and the optical output structure; and an optical system, which projects light output by the optical output structure.
US09720540B2
The present invention provides a touch signal detection circuit. The touch signal detection circuit includes: a processing unit, at least one linear transmitting electrode, and at least two linear receiving electrodes; the transmitting electrode is perpendicular to the receiving electrode, the receiving electrode is perpendicular to a source driver line of a display screen, and each receiving electrode and each transmitting electrode form one node mutual capacitance; the processing unit acquires capacitance change values of at least two node mutual capacitances, and acquires a location of a touch signal according to the capacitance change values of the at least two node mutual capacitances.
US09720539B2
An adapter that fits to a touchscreen of a tablet computer or mobile phone enabling input and output to and from the device. Output is achieved by a plurality of phototransistors arranged in a matrix which interpret a plurality of video image dots, squares or groups of pixels on the tablet computer or mobile phone touchscreen converting them to 1s (ones) or 0s (zeroes).Input is achieved by a plurality of conductors which are selectively electrified by control electronics to a charge sufficient to disrupt the field or capacitance of the touchscreen finger tip sense at a plurality of locations on the screen. A program(s) on the tablet computer or mobile phone interprets the electronically controlled touches as data.
US09720527B2
An electronic device having a customizable interface includes a processor configured to execute instructions and a display device configured to generate an interface based in part in response to the processor. The electronic device further includes a touch screen associated with the display device and configured to sense a user input with respect to a plurality of objects, wherein the input is provided to the processor. The processor further configured to determine at least one of a physical aspect of the user input and a frequency of an interaction with each of the plurality objects displayed on the touch screen. The processor further configured to modify a manner in which the plurality objects are displayed on the display device based on the determination of at least one of the physical aspects of the user input and the frequency of interaction with the plurality of objects.
US09720526B2
An active stylus without function keys is disclosed to include a pen body defining therein an accommodation chamber, a control device mounted inside the accommodation chamber and including a circuit board capable of outputting a signal to a touch control device of a touch screen being touched by the active stylus and two first conductors electrically connected to the circuit board, and a rotating barrel rotatably mounted on the pen body around the control device, the rotating barrel including a second conductor movable with the rotating barrel relative to the pen body into contact with either or both of the two first conductors or away from the first conductors to provide one of a series of signals for driving circuit board to output a corresponding control signal to the touch control device of the touch screen.
US09720525B2
A cursor-manipulating device comprising a light diffusing surface, for example a Lambertian surface, covering a cavity containing a light source and an image sensor, wherein the cursor-manipulating device is a touch pad like device. The image detector senses the touching of the outer surface of the cursor-manipulating device with a pointing device, for example a finger, in which the outer surface comprises a light diffusing surface that allows the image sensor to capture and track an image of the pointing device touching the light diffusing surface in order to control a cursor of an electronic device. Multiple touching devices, like fingers, can be used to control simultaneous events on the screen of an electronic device, e.g. a notebook PC, cellular phone, game device and a GPS device.
US09720523B2
A device includes a connector configured to electrically contact a conductive core of a pencil and a circuit electrically connected to the contact. The circuit transmits a signal via the contact and the conductive core.
US09720522B2
An apparatus that has a touchscreen, is configured to determine a response to a contact by a hand with a region of the touchscreen, and includes a first means for determining a location of a graphical projection of a digital pen onto the touchscreen, a second means for determining, via an ultrasonic wave, a first angle between a first line along an edge of the touchscreen and a second line along the graphical projection, a third means for determining a distance between the touchscreen and the digital pen, and a fourth means for determining, from the distance, the response to the contact by the hand with the region defined by the location and the first angle.
US09720521B2
Implementations of the technology described herein provide a method for detecting gesture commands using an ultrasonic pen system. The system has a pen and a user device. Detection of gesture commands is based on two-dimensional gestures relative to the screen of a user device, three-dimensional gestures relative to the screen of the user device, roll/rotation around a longitudinal axis of the pen body, and micro-twisting around the longitudinal axis of the pen body. The user device receives the gestures and translates them into commands such as UNDO and BACK.
US09720514B2
An electronic device, system associated therewith, and method of operating an electronic device are disclosed. In one example embodiment, the method includes storing 310 a first base tilt position of the electronic device based upon at least one position signal received by a processing device at least indirectly from a position or movement sensing component. The method additionally includes defining 312 a plurality of tilt zones in relation to the base tilt position, including a base tilt zone containing the base tilt position, determining 324 whether a tilt position of the device has changed to a second tilt zone of the plurality of tilt zones, and causing 328 a display component of the device to perform displaying of information in a scrolling manner determined at least in part based upon the second tilt zone.
US09720513B2
Provided are an apparatus and method for inputting a character The apparatus includes a recognition unit configured to measure lengths from arbitrary points on a user's hands to respective fingertips and recognize a click gesture using the measured lengths, a control unit configured to control character input according to the recognized click gesture, and a display unit configured to display a character pad for the character input and display a character input according to the click gesture recognized on the character pad.
US09720508B2
A method of operating a device having at least two camera lenses includes inputting a first image via a first camera lens, and detecting a control gesture from image processing of the first image. The method further includes controlling an operation associated with processing an image input from a second camera lens in response to the detected gesture from the first image.
US09720507B2
Techniques are disclosed for processing a video stream to reduce platform power by employing a stepped and distributed pipeline process, wherein CPU-intensive processing is selectively performed. The techniques are particularly well-suited for hand-based navigational gesture processing. In one example case, for instance, the techniques are implemented in a computer system wherein initial threshold detection (image disturbance) and optionally user presence (hand image) processing components are proximate to or within the system's camera, and the camera is located in or proximate to the system's primary display. In some cases, image processing and communication of pixel information between various processing stages which lies outside a markered region is suppressed. In some embodiments, the markered region is aligned with, a mouse pad or designated desk area or a user input device such as a keyboard. Pixels evaluated by the system can be limited to a subset of the markered region.
US09720504B2
Methods and apparatuses are presented for controlling an application on a device. In some embodiments, a method may include detecting that a user is maintaining an object or gesture at a position hovering near the device for a threshold length of time. The method may also include anchoring an initial position of the object or gesture to the device based on the detection of the maintained position, and controlling the application using the anchored initial position. In some embodiments, controlling the application using the anchored initial position may include manipulating the application based on detecting within a stable zone associated with the anchored initial position a change in height of the gesture or object relative to the device, and not manipulating the application whenever the object or gesture is detected to move along a plane above and parallel to the device and within the stable zone.
US09720503B2
A vibration control device configured to provide a haptic function and control a vibration device driven by a sine wave. The vibration control device includes a sampling frequency signal generator and a sine wave synthesizer. The vibration control device is configured to generate a sampling frequency signal using a clock signal, wherein the sampling frequency signal is related to an operation cycle of a digital filter; and the sine wave synthesizer includes the digital filter. The digital filter is configured to adjust at least one of a cycle of the sine wave and amplitude of the sine wave using the sampling frequency signal and a plurality of coefficients of the digital filter; and generate an adjusted sine wave.
US09720499B2
A display apparatus having a screen on which recording by a user's touch can be performed is provided. The display apparatus includes a display configured to provide the screen, an accommodator configured to accommodate the display and having a screen aperture formed thereon with a predetermined depth to expose the screen, a touch position sensor configured to sense the position of a touch device that is used by a user when a distance between the screen and the touch device is shorter than the predetermined depth, a vibration sensor mounted on the display and configured to sense vibration of the display due to a contact of the touch device with the screen, and a controller configured to control the display to perform recording on a point of the screen that corresponds to the sensed position of the touch device when the vibration is sensed.
US09720498B2
Systems and techniques are disclosed for controlling a vehicle. A vehicle control apparatus includes a sensing unit that senses an eyeline of a passenger in a vehicle. The vehicle control apparatus also includes a controller. In some implementations, the controller identifies a window of the vehicle that corresponds to the sensed eyeline of the passenger, detects a window control action performed by the passenger, and controls the identified window to open or close based on the window control action performed by the passenger. In some implementations, the controller identifies a device of the vehicle that corresponds to the sensed eyeline of the passenger, and operates the identified device based on the sensed eyeline of the passenger, wherein the identified device is a multimedia device or a navigation device of the vehicle.
US09720493B2
Disclosed is a novel system and method for maintaining computing functionality when a client device must be used in a low-power state. More particularly, when a client device is placed in a low-power state, sleep mode, or even shut-down, this method transfers aspects of the machine state onto a virtual machine in the cloud. This virtual machine may then function as a partial or full emulator of the user's client machine and thus can be: 1) accessed; and 2) communicated with by the machine's owner or others who use the machine. As long as the client device is shutdown, the cloud continues to temporarily function as the user's machine. Numerous embodiments are disclosed including a “hybrid decomposition feature” in which the data on the client machine is prioritized and then transfer to a server, typically a virtual emulator, component by component or piecemeal manner or manner.
US09720490B2
A circuit includes a central processing unit (CPU), which includes a first memory block having a first power domain; and a core block signally connected to the first memory block and having a second power domain disconnected from the first power domain.
US09720483B2
A bus system includes a bus module which performs data transfer between a master module and a slave module and a detection module which detects transfer of transmission data from the master module to the bus module. When the bus module is shifted to a power saving mode and then is returned from the power saving mode, a power control module delays release of the power saving mode until a plurality of data transfer requests is detected. Accordingly, a power saving effect can be improved in the bus system.
US09720482B2
Methods, computing systems and computer program products implement embodiments of the present invention that include determining a required electrical power level for one or more computer elements. Upon selecting a first value indicating a first electrical power level that is less than the required electrical power level, the first value is conveyed to a first power supply unit (PSU), so that that the first PSU delivers, to the one or more computer elements, the first electrical power level. A second value is selected that indicates a second electrical power level that is different from the first value, the second value indicating a difference between the required electrical power level and the first electrical power level. The second value is conveyed to a second PSU, so that that upon receiving the second value, the second PSU delivers, to the one or more computer elements, the second electrical power level.
US09720457B1
A solid state disk is provided, including: a main body, including a shell portion having a light-penetrable shell portion, a substrate disposed on the shell portion and a memory module disposed on the substrate, the substrate having a light-penetrable portion and a first face and integrally formed with the light-penetrable portion, the first face having a first coating layer which has an emergent light-penetrable portion, the light-penetrable shell portion corresponding to the emergent light-penetrable portion, the substrate including a transmission port, the memory module electrically connected to the transmission port; a light-emitting portion, buried in the substrate and electrically connected to the transmission port, a light emitted from the light-emitting portion being capable of being projected toward an interior of the substrate to the light-penetrable portion and the emergent light-penetrable portion and via the light-penetrable shell portion to an exterior of the solid state disk.
US09720454B2
It is provided according to embodiments of the application a connecting device and an electronic device including the connecting device. The connecting device includes a first mounting plate, a second mounting plate, a hinge assembly and a filler. The hinge assembly rotatably connects the first mounting plate and the second mounting plate, and the filler fills a gap inside the hinge assembly.
US09720450B2
An electronic device may include a foldable housing, and at least one electronic component arranged within the housing. The at least one electronic component may be exposed to an area external to the housing through a folding part of the housing in a folded state of the housing. The electronic device may be transitionable between a folded state and an unfolded state. Activation of the at least one electronic component may be effected by the folding or unfolding of the electronic device.
US09720448B2
A display unit which can realize reduction in thickness and weight of the display unit by omitting a void between a touch panel and a display panel, and its manufacturing method. Whole faces of the touch panel and the display panel are directly bonded together with an adhesive layer in between. The display panel has a structure wherein a driving substrate in which organic light emitting devices are formed and a sealing substrate are bonded together with an adhesive layer in between. The touch panel has a structure wherein a lower plastic film in which a transparent electrode is formed and a touch-side plastic film in which a transparent electrode is formed are layered so that the transparent electrodes are placed opposite. The display panel is constructed with only the driving substrate, and the organic light emitting devices are sealed by the touch panel instead of the sealing substrate. Therefore, thickness and weight of the display unit can be further reduced.
US09720441B1
A system and method for generating a timestamp without processor core execution stall are provided. For example, the method includes generating, using a first processor core, a timestamp. The method also includes preventing, using the first processor core, a second processor core from accessing the timestamp for a minimum time granularity interval. The time granularity interval provides a delay such that the timestamp generated by the first processor core is earlier in time than a second processor core timestamp.
US09720438B2
A clock switch device includes a controller and a switching circuit. The controller sets a clock switch period using a control signal when a logic level of a mode signal is changed. The switching circuit receives a first clock signal, a second clock signal and an auxiliary clock signal. The switching circuit, based on the control signal, outputs one clock signal between the first clock signal and the second clock signal as a glitch free clock signal before the clock switch period, stops outputting the one clock signal and outputs the auxiliary clock signal as the glitch free clock signal during the clock switch period, and stops outputting the auxiliary clock signal and outputs another clock signal between the first clock signal and the second clock signal as the glitch free clock signal after the clock switch period.
