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公开(公告)号:CN1264207C
公开(公告)日:2006-07-12
申请号:CN03120430.9
申请日:2003-03-14
Applicant: 富士通株式会社
CPC classification number: H01L21/6836 , H01L21/4857 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/49822 , H01L24/97 , H01L25/0655 , H01L25/50 , H01L2221/68327 , H01L2221/68331 , H01L2221/68345 , H01L2221/68359 , H01L2221/68363 , H01L2224/05001 , H01L2224/05008 , H01L2224/05023 , H01L2224/05024 , H01L2224/05571 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/75315 , H01L2224/75755 , H01L2224/7598 , H01L2224/81005 , H01L2224/83005 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01072 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/09701 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/16152 , H01L2924/181 , H01L2924/18161 , H01L2924/19041 , H01L2924/19105 , H01L2924/30105 , H01L2924/3025 , H01L2224/81 , H01L2924/00 , H01L2924/00012
Abstract: 本发明公开了一种半导体器件及其制造方法,尤其是提供了一种采用布线衬底的半导体器件制造方法,该方法可以便于布线衬底的操纵。该方法包括以下步骤:在硅衬底上形成可剥离树脂层;在所述可剥离树脂层上形成布线衬底;将半导体芯片安装在所述布线衬底上;通过用密封树脂密封所述多个半导体芯片来形成半导体器件;通过从密封树脂侧将这些半导体器件切分但是保留硅衬底来使这些半导体器件个体化;将每个个体化半导体器件在所述硅衬底和可剥离树脂层之间从硅衬底上剥离;并且通过形成穿过可剥离树脂层的孔或者通过除去可剥离树脂层来使布线衬底上的端子暴露。
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公开(公告)号:CN1855401A
公开(公告)日:2006-11-01
申请号:CN200610089954.X
申请日:2003-03-14
Applicant: 富士通株式会社
CPC classification number: H01L24/97 , H01L2221/68345 , H01L2224/16 , H01L2224/97 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01072 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/09701 , H01L2924/10253 , H01L2924/15787 , H01L2924/181 , H01L2924/18161 , H01L2924/19041 , H01L2224/81 , H01L2924/00
Abstract: 本发明公开了一种半导体器件及其制造方法,所述方法包括以下步骤:a.在硅衬底上形成金属薄膜层;b.通过在所述金属薄膜层上的多个水平面中形成导电层和绝缘层来形成薄膜多层衬底;c.通过粘合部件将支撑部件贴在所述薄膜多层衬底上;d.除去所述硅衬底和所述金属薄膜层;e.将所述薄膜多层衬底连同所述支撑部件一起个体化;f.将所述薄膜多层衬底安装在封装衬底上并且将所述薄膜多层衬底固定在所述封装衬底上;g.降低所述粘合部件的粘附性,从所述薄膜多层衬底上剥离所述支撑部件和所述粘合部件;以及h.将至少一个半导体芯片安装在所述薄膜多层衬底上。
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公开(公告)号:CN1461050A
公开(公告)日:2003-12-10
申请号:CN03120430.9
申请日:2003-03-14
Applicant: 富士通株式会社
CPC classification number: H01L21/6836 , H01L21/4857 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/49822 , H01L24/97 , H01L25/0655 , H01L25/50 , H01L2221/68327 , H01L2221/68331 , H01L2221/68345 , H01L2221/68359 , H01L2221/68363 , H01L2224/05001 , H01L2224/05008 , H01L2224/05023 , H01L2224/05024 , H01L2224/05571 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/75315 , H01L2224/75755 , H01L2224/7598 , H01L2224/81005 , H01L2224/83005 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01072 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/09701 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/16152 , H01L2924/181 , H01L2924/18161 , H01L2924/19041 , H01L2924/19105 , H01L2924/30105 , H01L2924/3025 , H01L2224/81 , H01L2924/00 , H01L2924/00012
Abstract: 本发明公开了一种半导体器件及其制造方法,尤其是提供了一种采用布线衬底的半导体器件制造方法,该方法可以便于布线衬底的操纵。该方法包括以下步骤:在硅衬底上形成可剥离树脂层;在所述可剥离树脂层上形成布线衬底;将半导体芯片安装在所述布线衬底上;通过用密封树脂密封所述多个半导体芯片来形成半导体器件;通过从密封树脂侧将这些半导体器件切分但是保留硅衬底来使这些半导体器件个体化;将每个个体化半导体器件在所述硅衬底和可剥离树脂层之间从硅衬底上剥离;并且通过形成穿过可剥离树脂层的孔或者通过除去可剥离树脂层来使布线衬底上的端子暴露。
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