Non-volatile memory with multi-level cell array and associated program control method

    公开(公告)号:US11170861B1

    公开(公告)日:2021-11-09

    申请号:US16939573

    申请日:2020-07-27

    Abstract: A non-volatile memory includes a cell array, a current supply circuit, a path selecting circuit and a verification circuit. The cell array includes plural multi-level memory cells in an m×n array. The cell array is connected with m word lines and n lines. Each of the plural multi-level memory cells is in one of X storage states. The current supply circuit provides plural reference currents. The path selecting circuit is connected with the current supply circuit and the n bit lines. The verification circuit is connected with the path selecting circuit, and generates n verification signals. A first path selector of the path selecting circuit is connected with a path selecting circuit and a first bit line. A first verification device of the verification circuit is connected with the first path selector and generates a first verification signal.

    Non-volatile memory with multi-level cell array and associated read control method

    公开(公告)号:US11264092B2

    公开(公告)日:2022-03-01

    申请号:US16989929

    申请日:2020-08-11

    Abstract: A non-volatile memory includes a cell array, a current supply circuit, a path selecting circuit and a judging circuit. The cell array includes plural multi-level memory cells in an m×n array. The cell array is connected with m word lines and n lines. The current supply circuit provides one of plural reference currents according to a current control value. The path selecting circuit is connected with the current supply circuit and the n bit lines. The judging circuit is connected with the path selecting circuit, and generates n output data. A first path selector of the path selecting circuit is connected with a path selecting circuit and a first bit line. A first judging device of the judging circuit is connected with the first path selector and generates a first output data.

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