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公开(公告)号:CN105226035B
公开(公告)日:2018-06-05
申请号:CN201510535157.9
申请日:2011-05-11
Applicant: 精材科技股份有限公司
IPC: H01L23/31 , H01L23/525 , H01L21/56 , H01L21/683 , H01L29/06
CPC classification number: H01L24/05 , G06K9/0004 , H01L21/561 , H01L21/6835 , H01L23/3121 , H01L23/525 , H01L24/08 , H01L24/13 , H01L24/48 , H01L29/06 , H01L29/0657 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/02371 , H01L2224/02375 , H01L2224/02379 , H01L2224/02381 , H01L2224/0401 , H01L2224/04042 , H01L2224/05548 , H01L2224/05558 , H01L2224/06165 , H01L2224/06167 , H01L2224/0801 , H01L2224/16105 , H01L2224/16225 , H01L2224/16227 , H01L2224/24226 , H01L2224/48091 , H01L2224/48227 , H01L2224/73215 , H01L2224/73253 , H01L2224/94 , H01L2924/00014 , H01L2924/10156 , H01L2924/10253 , H01L2924/12041 , H01L2924/14 , H01L2924/1461 , H01L2924/15788 , H01L2924/3701 , H05K1/181 , H05K2201/09418 , H05K2201/09445 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/03
Abstract: 本发明提供一种晶片封装体,该晶片封装体包括:一下基底;一上基底,具有一上表面及一下表面,且设置于下基底上方;一凹口,邻近于上基底的一侧壁,其中凹口沿着自上基底的上表面朝下表面的一方向而形成;一元件区或感测区,位于上基底的上表面;一导电垫,位于上基底的上表面;以及一导电层电性连接导电垫,且沿着上基底的侧壁延伸至凹口。本发明可大幅缩减晶片封装制程所需的图案化制程,且可显著缩减制程时间与成本。
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公开(公告)号:CN105244330A
公开(公告)日:2016-01-13
申请号:CN201510535128.2
申请日:2011-05-11
Applicant: 精材科技股份有限公司
IPC: H01L23/31 , H01L23/525 , H01L29/06 , H01L21/56 , H01L21/683
CPC classification number: H01L24/05 , G06K9/0004 , H01L21/561 , H01L21/6835 , H01L23/3121 , H01L23/525 , H01L24/08 , H01L24/13 , H01L24/48 , H01L29/06 , H01L29/0657 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/02371 , H01L2224/02375 , H01L2224/02379 , H01L2224/02381 , H01L2224/0401 , H01L2224/04042 , H01L2224/05548 , H01L2224/05558 , H01L2224/06165 , H01L2224/06167 , H01L2224/0801 , H01L2224/16105 , H01L2224/16225 , H01L2224/16227 , H01L2224/24226 , H01L2224/48091 , H01L2224/48227 , H01L2224/73215 , H01L2224/73253 , H01L2224/94 , H01L2924/00014 , H01L2924/10156 , H01L2924/10253 , H01L2924/12041 , H01L2924/14 , H01L2924/1461 , H01L2924/15788 , H01L2924/3701 , H05K1/181 , H05K2201/09418 , H05K2201/09445 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/03
Abstract: 本发明提供一种晶片封装体,该晶片封装体包括:一基底,具有一上表面及一下表面;一凹口,邻近于基底的一侧壁,其中凹口沿着自基底的上表面朝下表面的一方向而形成;生物特征的元件区或感测区,位于基底的上表面;一导电垫,位于基底的上表面;以及一导电层,电性连接导电垫,且沿着基底的侧壁延伸至凹口。本发明可大幅缩减晶片封装制程所需的图案化制程,且可显著缩减制程时间与成本。
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公开(公告)号:CN102244047B
公开(公告)日:2015-09-23
申请号:CN201110122210.4
申请日:2011-05-11
Applicant: 精材科技股份有限公司
IPC: H01L23/31 , H01L23/488 , H01L21/56 , H01L21/60
CPC classification number: H01L24/05 , G06K9/0004 , H01L21/561 , H01L21/6835 , H01L23/3121 , H01L23/525 , H01L24/08 , H01L24/13 , H01L24/48 , H01L29/06 , H01L29/0657 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/02371 , H01L2224/02375 , H01L2224/02379 , H01L2224/02381 , H01L2224/0401 , H01L2224/04042 , H01L2224/05548 , H01L2224/05558 , H01L2224/06165 , H01L2224/06167 , H01L2224/0801 , H01L2224/16105 , H01L2224/16225 , H01L2224/16227 , H01L2224/24226 , H01L2224/48091 , H01L2224/48227 , H01L2224/73215 , H01L2224/73253 , H01L2224/94 , H01L2924/00014 , H01L2924/10156 , H01L2924/10253 , H01L2924/12041 , H01L2924/14 , H01L2924/1461 , H01L2924/15788 , H01L2924/3701 , H05K1/181 , H05K2201/09418 , H05K2201/09445 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/03
Abstract: 本发明提供一种晶片封装体及其形成方法,该晶片封装体包括:一承载基底;一半导体基底,具有一上表面及一下表面,且设置于该承载基底之上;一元件区或感测区,位于该半导体基底的该上表面;一导电垫,位于该半导体基底的该上表面;一导电层,电性连接该导电垫,且自该半导体基底的该上表面延伸至该半导体基底的一侧壁上;以及一绝缘层,位于该导电层与该半导体基底之间。本发明可大幅缩减晶片封装制程所需的图案化制程,且可显著缩减制程时间与成本。
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公开(公告)号:CN105244330B
公开(公告)日:2019-01-22
申请号:CN201510535128.2
申请日:2011-05-11
Applicant: 精材科技股份有限公司
IPC: H01L23/31 , H01L23/525 , H01L29/06 , H01L21/56 , H01L21/683
Abstract: 本发明提供一种晶片封装体,该晶片封装体包括:一半导体基底,具有一上表面及一下表面;一凹口,邻近于半导体基底的一侧壁,其中凹口沿着自半导体基底的上表面朝下表面的一方向而形成;元件区或感测区,位于半导体基底的上表面;一导电垫,位于半导体基底的上表面;以及一导电层,电性连接导电垫,且沿着半导体基底的侧壁延伸至凹口。本发明可大幅缩减晶片封装制程所需的图案化制程,且可显著缩减制程时间与成本。
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公开(公告)号:CN105226035A
公开(公告)日:2016-01-06
申请号:CN201510535157.9
申请日:2011-05-11
Applicant: 精材科技股份有限公司
IPC: H01L23/31 , H01L23/525 , H01L21/56 , H01L21/683 , H01L29/06
CPC classification number: H01L24/05 , G06K9/0004 , H01L21/561 , H01L21/6835 , H01L23/3121 , H01L23/525 , H01L24/08 , H01L24/13 , H01L24/48 , H01L29/06 , H01L29/0657 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/02371 , H01L2224/02375 , H01L2224/02379 , H01L2224/02381 , H01L2224/0401 , H01L2224/04042 , H01L2224/05548 , H01L2224/05558 , H01L2224/06165 , H01L2224/06167 , H01L2224/0801 , H01L2224/16105 , H01L2224/16225 , H01L2224/16227 , H01L2224/24226 , H01L2224/48091 , H01L2224/48227 , H01L2224/73215 , H01L2224/73253 , H01L2224/94 , H01L2924/00014 , H01L2924/10156 , H01L2924/10253 , H01L2924/12041 , H01L2924/14 , H01L2924/1461 , H01L2924/15788 , H01L2924/3701 , H05K1/181 , H05K2201/09418 , H05K2201/09445 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/03
Abstract: 本发明提供一种晶片封装体,该晶片封装体包括:一下基底;一上基底,具有一上表面及一下表面,且设置于下基底上方;一凹口,邻近于上基底的一侧壁,其中凹口沿着自上基底的上表面朝下表面的一方向而形成;一元件区或感测区,位于上基底的上表面;一导电垫,位于上基底的上表面;以及一导电层电性连接导电垫,且沿着上基底的侧壁延伸至凹口。本发明可大幅缩减晶片封装制程所需的图案化制程,且可显著缩减制程时间与成本。
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公开(公告)号:CN102244047A
公开(公告)日:2011-11-16
申请号:CN201110122210.4
申请日:2011-05-11
Applicant: 精材科技股份有限公司
IPC: H01L23/31 , H01L23/488 , H01L21/56 , H01L21/60
CPC classification number: H01L24/05 , G06K9/0004 , H01L21/561 , H01L21/6835 , H01L23/3121 , H01L23/525 , H01L24/08 , H01L24/13 , H01L24/48 , H01L29/06 , H01L29/0657 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/02371 , H01L2224/02375 , H01L2224/02379 , H01L2224/02381 , H01L2224/0401 , H01L2224/04042 , H01L2224/05548 , H01L2224/05558 , H01L2224/06165 , H01L2224/06167 , H01L2224/0801 , H01L2224/16105 , H01L2224/16225 , H01L2224/16227 , H01L2224/24226 , H01L2224/48091 , H01L2224/48227 , H01L2224/73215 , H01L2224/73253 , H01L2224/94 , H01L2924/00014 , H01L2924/10156 , H01L2924/10253 , H01L2924/12041 , H01L2924/14 , H01L2924/1461 , H01L2924/15788 , H01L2924/3701 , H05K1/181 , H05K2201/09418 , H05K2201/09445 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/03
Abstract: 本发明提供一种晶片封装体及其形成方法,该晶片封装体包括:一承载基底;一半导体基底,具有一上表面及一下表面,且设置于该承载基底之上;一元件区或感测区,位于该半导体基底的该上表面;一导电垫,位于该半导体基底的该上表面;一导电层,电性连接该导电垫,且自该半导体基底的该上表面延伸至该半导体基底的一侧壁上;以及一绝缘层,位于该导电层与该半导体基底之间。本发明可大幅缩减晶片封装制程所需的图案化制程,且可显著缩减制程时间与成本。
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