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    Non-volatile storage element with suspended charge storage region
    3.
    发明授权
    Non-volatile storage element with suspended charge storage region 有权
    具有悬浮电荷存储区域的非易失性存储元件

    公开(公告)号：US09548311B2

    公开(公告)日：2017-01-17

    申请号：US15138615

    申请日：2016-04-26

    Applicant: SanDisk Technologies Inc.

    Inventor： Donovan Lee ,  Vinod R Purayath ,  James Kai

    IPC: H01L29/00 ,  H01L27/115 ,  H01L21/311 ,  H01L29/66 ,  H01L29/423

    CPC classification number: H01L27/11521 ,  H01L21/28273 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/76224 ,  H01L27/11517 ,  H01L27/11526 ,  H01L27/11529 ,  H01L29/42324 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/7881

    Abstract: Suspended charge storage regions are utilized for non-volatile storage to decrease parasitic interferences and increase charge retention in memory devices. Charge storage regions are suspended from an overlying intermediate dielectric material. The charge storage regions include an upper surface and a lower surface that extend in the row and column directions. The upper surface of the charge storage region is coupled to the overlying intermediate dielectric material. The lower surface faces the substrate surface and is separated from the substrate surface by a void. The charge storage region includes a first vertical sidewall and a second vertical sidewall that extend in the column direction and a third vertical sidewall and fourth vertical sidewall that extend in the row direction. The first, second, third, and fourth vertical sidewall are separated from neighboring features of the non-volatile memory by the void. The void may include a vacuum, air, gas, or a liquid.

    Abstract translation: 悬浮电荷存储区域用于非易失性存储以减少寄生干扰并增加存储器件中的电荷保持。 电荷存储区域从上覆的中间介电材料悬浮。 电荷存储区域包括在行和列方向上延伸的上表面和下表面。 电荷存储区域的上表面与上覆的中间介电材料耦合。 下表面面向基板表面，并通过空隙与基板表面分离。 电荷存储区域包括在列方向上延伸的第一垂直侧壁和第二垂直侧壁以及沿行方向延伸的第三垂直侧壁和第四垂直侧壁。 第一，第二，第三和第四垂直侧壁通过空隙与非易失性存储器的相邻特征分离。 空隙可以包括真空，空气，气体或液体。

    In-situ support structure for line collapse robustness in memory arrays
    4.
    发明授权
    In-situ support structure for line collapse robustness in memory arrays 有权
    存储阵列线路崩溃鲁棒性的原位支持结构

    公开(公告)号：US09543139B2

    公开(公告)日：2017-01-10

    申请号：US14246656

    申请日：2014-04-07

    Applicant: SANDISK TECHNOLOGIES INC.

    Inventor： Akira Matsudaira ,  Donovan Lee

    IPC: H01L21/82 ,  H01L21/02 ,  H01L21/28 ,  H01L29/788 ,  H01L27/02 ,  H01L27/115

    CPC classification number: H01L21/02164 ,  H01L21/28273 ,  H01L27/0207 ,  H01L27/11519 ,  H01L27/11524 ,  H01L29/7883

    Abstract: Methods for preventing line collapse during the fabrication of NAND flash memory and other microelectronic devices that utilize closely spaced device structures with high aspect ratios are described. In some embodiments, one or more mechanical support structures may be used to provide lateral support between closely spaced device structures to prevent collapsing of the closely spaced device structures during an etching process (e.g., during a word line etch). In one example, during fabrication of a NAND flash memory, one or more mechanical support structures may be in place prior to performing a high aspect ratio word line etch or may be formed during the word line etch. In some cases, the one or more mechanical support structures may comprise portions of an inter-poly dielectric (IPD) layer that were in place prior to performing the word line etch.

    Abstract translation: 描述了在制造NAND闪速存储器和利用具有高纵横比的紧密间隔的器件结构的其它微电子器件时防止线塌陷的方法。 在一些实施例中，可以使用一个或多个机械支撑结构来在紧密间隔开的装置结构之间提供横向支撑，以防止在蚀刻过程（例如，在字线蚀刻期间）紧密间隔开的装置结构的折叠。 在一个示例中，在NAND快闪存储器的制造过程中，在执行高宽比字线蚀刻之前，一个或多个机械支撑结构可以就位，或者可以在字线蚀刻期间形成。 在一些情况下，一个或多个机械支撑结构可以包括在执行字线蚀刻之前就位的多晶硅间电介质（IPD）层的部分。

    VERTICAL FLOATING GATE NAND WITH OFFSET DUAL CONTROL GATES
    6.
    发明申请
    VERTICAL FLOATING GATE NAND WITH OFFSET DUAL CONTROL GATES 审中-公开
    垂直浮动门NAND与偏移双控制门

    公开(公告)号：US20150318295A1

    公开(公告)日：2015-11-05

    申请号：US14265733

    申请日：2014-04-30

    Applicant: SanDisk Technologies, Inc.

    Inventor： James Kai ,  Vinod Purayath ,  Donovan Lee ,  Akira Matsudaira

    IPC: H01L27/115 ,  H01L21/285 ,  H01L21/28 ,  H01L21/02 ,  H01L29/423 ,  H01L29/788

    CPC classification number: H01L27/11556 ,  H01L27/11524

    Abstract: A method of making a monolithic three dimensional NAND string includes providing a stack of alternating insulating layers and control gate films over a major surface of a substrate. Each of the control gate films includes a middle layer located between a first control gate layer and a second control gate layer, the middle layer being a different material from the first and second control gate layers and from the insulating layers. The method also includes forming a front side opening in the stack, and forming a blocking dielectric, at least one charge storage region, a tunnel dielectric and a semiconductor channel in the front side opening in the stack.

    Abstract translation: 制造单片三维NAND串的方法包括在衬底的主表面上提供交替绝缘层和控制栅极膜的堆叠。 每个控制栅膜包括位于第一控制栅极层和第二控制栅极层之间的中间层，中间层是与第一和第二控制栅极层以及绝缘层不同的材料。 该方法还包括在堆叠中形成前侧开口，并且在堆叠中的前侧开口中形成阻挡电介质，至少一个电荷存储区，隧道电介质和半导体沟道。

    IN-SITU SUPPORT STRUCTURE FOR LINE COLLAPSE ROBUSTNESS IN MEMORY ARRAYS
    9.
    发明申请
    IN-SITU SUPPORT STRUCTURE FOR LINE COLLAPSE ROBUSTNESS IN MEMORY ARRAYS 有权
    存储器阵列中线性逼真的现场支持结构

    公开(公告)号：US20150287733A1

    公开(公告)日：2015-10-08

    申请号：US14246656

    申请日：2014-04-07

    Applicant: SANDISK TECHNOLOGIES INC.

    Inventor： Akira Matsudaira ,  Donovan Lee

    IPC: H01L27/115 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/28 ,  H01L29/788

    CPC classification number: H01L21/02164 ,  H01L21/28273 ,  H01L27/0207 ,  H01L27/11519 ,  H01L27/11524 ,  H01L29/7883

    Abstract: Methods for preventing line collapse during the fabrication of NAND flash memory and other microelectronic devices that utilize closely spaced device structures with high aspect ratios are described. In some embodiments, one or more mechanical support structures may be used to provide lateral support between closely spaced device structures to prevent collapsing of the closely spaced device structures during an etching process (e.g., during a word line etch). In one example, during fabrication of a NAND flash memory, one or more mechanical support structures may be in place prior to performing a high aspect ratio word line etch or may be formed during the word line etch. In some cases, the one or more mechanical support structures may comprise portions of an inter-poly dielectric (IPD) layer that were in place prior to performing the word line etch.

    Abstract translation: 描述了在制造NAND闪速存储器和利用具有高纵横比的紧密间隔的器件结构的其它微电子器件时防止线塌陷的方法。 在一些实施例中，可以使用一个或多个机械支撑结构来在紧密间隔开的装置结构之间提供横向支撑，以防止在蚀刻过程（例如，在字线蚀刻期间）紧密间隔开的装置结构的折叠。 在一个示例中，在NAND快闪存储器的制造过程中，在执行高宽比字线蚀刻之前，一个或多个机械支撑结构可以就位，或者可以在字线蚀刻期间形成。 在一些情况下，一个或多个机械支撑结构可以包括在执行字线蚀刻之前就位的多晶硅间电介质（IPD）层的部分。

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