公开(公告)号：US09978859B2

公开(公告)日：2018-05-22

申请号：US15614257

申请日：2017-06-05

Applicant: Vishay-Siliconix

Inventor： Chanho Park ,  Ayman Shibib ,  Kyle Terrill

IPC: H01L29/76 ,  H01L29/40 ,  H01L21/336 ,  H01L29/78 ,  H01L29/10 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L29/36 ,  H01L29/872

CPC classification number: H01L29/7802 ,  H01L29/086 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/404 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/66348 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7813 ,  H01L29/872

Abstract: A semiconductor device includes a trench formed in an epitaxial layer and an oxide layer that lines the sidewalls of the trench. The thickness of the oxide layer is non-uniform, so that the thickness of the oxide layer toward the top of the trench is thinner than it is toward the bottom of the trench. The epitaxial layer can have a non-uniform dopant concentration, where the dopant concentration varies according to the thickness of the oxide layer.

公开(公告)号：US10381473B2

公开(公告)日：2019-08-13

申请号：US15643328

申请日：2017-07-06

Applicant: Vishay-Siliconix

Inventor： Ayman Shibib ,  Kyle Terrill ,  Yongping Ding ,  Jinman Yang

IPC: H01L29/40 ,  H01L29/423 ,  H01L29/47 ,  H01L29/778 ,  H01L29/205 ,  H01L29/20 ,  H01L29/06 ,  H01L29/66 ,  H01L21/768 ,  H01L23/535 ,  H01L21/02 ,  H01L29/417 ,  H01L29/10

Abstract: A high-electron-mobility transistor (HEMT) includes a substrate layer of silicon, a first contact disposed on a first surface of the substrate layer, and a number of layers disposed on a second surface of the substrate layer opposite the first surface. A second contact and a gate contact are disposed on those layers. A trench containing conducting material extends completely through the layers and into the substrate layer. In an embodiment of the HEMT, the first contact is a drain contact and the second contact is a source contact. In another embodiment of the HEMT, the first contact is a source contact and the second contact is a drain contact.

公开(公告)号：US10665711B2

公开(公告)日：2020-05-26

申请号：US16450513

申请日：2019-06-24

Applicant: Vishay-Siliconix

Inventor： Ayman Shibib ,  Kyle Terrill ,  Yongping Ding ,  Jinman Yang

IPC: H01L29/778 ,  H01L29/40 ,  H01L21/02 ,  H01L29/47 ,  H01L29/205 ,  H01L29/20 ,  H01L29/06 ,  H01L29/66 ,  H01L21/768 ,  H01L23/535 ,  H01L29/423 ,  H01L29/417 ,  H01L29/10

Abstract: A high-electron-mobility transistor (HEMT) includes a substrate layer of silicon, a first contact disposed on a first surface of the substrate layer, and a number of layers disposed on a second surface of the substrate layer opposite the first surface. A second contact and a gate contact are disposed on those layers. A trench containing conducting material extends completely through the layers and into the substrate layer. In an embodiment of the HEMT, the first contact is a drain contact and the second contact is a source contact. In another embodiment of the HEMT, the first contact is a source contact and the second contact is a drain contact.

公开(公告)号：US10256227B2

公开(公告)日：2019-04-09

申请号：US15097024

申请日：2016-04-12

Applicant: VISHAY-SILICONIX

Inventor： Chanho Park ,  Ayman Shibib ,  Kyle Terrill

IPC: H01L27/02 ,  H01L21/66 ,  H01L23/60 ,  H01L23/62 ,  H01L23/00 ,  H01L21/48

Abstract: Disclosed are semiconductor devices that include additional gate pads, and methods of fabricating and testing such devices. A device may include a first gate pad, a second gate pad, and a third gate pad. The first gate pad is connected to a gate including a gate oxide layer. The second and third gate pads are part of an electro-static discharge (ESD) protection network for the device. The ESD protection network is initially isolated from the first gate pad and hence from the gate and gate oxide layer. Accordingly, gate oxide integrity (GOI) testing can be effectively performed and the reliability and quality of the gate oxide layer can be checked. The second gate pad can be subsequently connected to the first gate pad to enable the ESD protection network, and the third gate pad can be subsequently connected to an external terminal when the device is packaged.

公开(公告)号：US11004841B2

公开(公告)日：2021-05-11

申请号：US16379609

申请日：2019-04-09

Applicant: VISHAY-SILICONIX

Inventor： Chanho Park ,  Ayman Shibib ,  Kyle Terrill

IPC: H01L27/02 ,  H01L21/48 ,  H01L23/60 ,  H01L21/66 ,  H01L23/00

Abstract: Disclosed are semiconductor devices that include additional gate pads, and methods of fabricating and testing such devices. A device may include a first gate pad, a second gate pad, and a third gate pad. The first gate pad is connected to a gate including a gate oxide layer. The second and third gate pads are part of an electro-static discharge (ESD) protection network for the device. The ESD protection network is initially isolated from the first gate pad and hence from the gate and gate oxide layer. Accordingly, gate oxide integrity (GOI) testing can be effectively performed and the reliability and quality of the gate oxide layer can be checked. The second gate pad can be subsequently connected to the first gate pad to enable the ESD protection network, and the third gate pad can be subsequently connected to an external terminal when the device is packaged.

公开(公告)号：US10651303B2

公开(公告)日：2020-05-12

申请号：US16291996

申请日：2019-03-04

Applicant: Vishay-Siliconix

Inventor： Ayman Shibib ,  Kyle Terrill

IPC: H01L29/778 ,  H01L29/205 ,  H01L21/8252 ,  H01L29/423 ,  H01L29/861 ,  H01L29/20 ,  H01L29/10 ,  H01L29/207

Abstract: A device includes a first high electronic mobility transistor (HEMT) and a second HEMT. The first HEMT includes a first gate, a source coupled to the first gate, and a drain coupled to the first gate. The second HEMT includes a second gate coupled to the source and to the drain. The second HEMT has a lower threshold voltage than the first HEMT.

公开(公告)号：US10224426B2

公开(公告)日：2019-03-05

申请号：US15643306

申请日：2017-07-06

Applicant: Vishay-Siliconix

Inventor： Ayman Shibib ,  Kyle Terrill

IPC: H01L29/778 ,  H01L29/205 ,  H01L29/423 ,  H01L29/861 ,  H01L29/20 ,  H01L29/10 ,  H01L29/207

Abstract: A device includes a first high electronic mobility transistor (HEMT) and a second HEMT. The first HEMT includes a first gate, a source coupled to the first gate, and a drain coupled to the first gate. The second HEMT includes a second gate coupled to the source and to the drain. The second HEMT has a lower threshold voltage than the first HEMT.

公开(公告)号：US09673314B2

公开(公告)日：2017-06-06

申请号：US14794164

申请日：2015-07-08

Applicant: Vishay-Siliconix

Inventor： Chanho Park ,  Ayman Shibib ,  Kyle Terrill

IPC: H01L29/76 ,  H01L29/40 ,  H01L27/095 ,  H01L29/78 ,  H01L29/10 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L29/7802 ,  H01L29/086 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/404 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/66348 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7813 ,  H01L29/872

Abstract: A semiconductor device includes a trench formed in an epitaxial layer and an oxide layer that lines the sidewalls of the trench. The thickness of the oxide layer is non-uniform, so that the thickness of the oxide layer toward the top of the trench is thinner than it is toward the bottom of the trench. The epitaxial layer can have a non-uniform dopant concentration, where the dopant concentration varies according to the thickness of the oxide layer.