Analog Neuron With S-Domain Characteristic
    2.
    发明公开

    公开(公告)号:US20230196064A1

    公开(公告)日:2023-06-22

    申请号:US17818228

    申请日:2022-08-08

    CPC classification number: G06N3/04

    Abstract: An analog element for use as a neuron in a recurrent neural network is described, the analog element having memory of a prior layer state and being a continuous time circuit rather than having a discrete clocking interval. The element is characterized and described by the Laplace s-domain operator, as distinct from a digital solution that uses the z-domain operator appropriate for quantized time descriptions. Rather than using an all-pass filter, the analog equivalent of a unit delay in the z-domain, a finite gain integrator, which is a simpler circuit, may be used to provide the delay in the analog s-domain. The resulting circuit may be easily implemented at the transistor level.

    Fast Fourier Transforms With Incomplete Input Data Replacement

    公开(公告)号:US20230185872A1

    公开(公告)日:2023-06-15

    申请号:US18080557

    申请日:2022-12-13

    CPC classification number: G06F17/142

    Abstract: A method for performing a fast Fourier transform. The bin spreading effect of conventional FFT methodology may be removed by a mathematical technique that relies on an incomplete replacement of the input data sequence. In the present approach this replacement is accomplished by a “round robin” method. In this approach no window function is required and the FFT calculation proceeds after each new sample is added round robin fashion to the input sequence. The resulting output bins from the FFT show the signal evolution with time, overlapping as in the known art but by a single sample. The output of a FFT so constructed is not time invariant, but rather there is a rotation present in each output bin when viewed as an analytical signal. This rotation is predictable and hence removeable, but is also exploitable as a means to remove the bin spill over.

    Programmable impedance
    4.
    发明授权

    公开(公告)号:US11514302B2

    公开(公告)日:2022-11-29

    申请号:US16806264

    申请日:2020-03-02

    Abstract: A programmable impedance element consists of a plurality of nominally identical two-port elements, each two-port element having an impedance element and two switches, the two-port elements arranged in a chain fashion with a structured set of switches such that a range of impedances can be obtained from each cell by dynamically changing the connections between the impedance elements in the cell. The common cell is constructed by connecting the nominally identical two-port impedance elements in a way that the number of possible combinations of the impedance elements is reduced to the subset of all possible combinations that uses the minimum possible number of connections. This structure allows the creation of matched impedances using industry standard devices. The connections between impedance elements are switches that may be “field-programmable,” i.e., that may be set on the chip after manufacture and configured during operation of the circuit, or alternatively may be mask programmable.

    EEG with artificial intelligence as control device

    公开(公告)号:US11513596B2

    公开(公告)日:2022-11-29

    申请号:US16849794

    申请日:2020-04-15

    Abstract: Described herein is a system and method for controlling a computing system by an AI network based upon an electroencephalograph (EEG) signal from a user. The user's EEG signals are first detected as the user operates an existing controller, during which time the associated artificial intelligence (AI) system learns by correlating the EEG signals with the commands received from the controller. Once the AI system determines that there is sufficient correlation to predict the user's actions, it can take control of the computing system and initiate commands based upon the user's EEG signal in place of the user's actions with the controller. At this point, weights in the AI network may be locked so that further commands from the controller, or the lack thereof, do not reduce correlation with the EEG signals. In some embodiments, the AI network may initiate commands faster than the user would be able to do.

    Analog neuron with s-domain characteristic

    公开(公告)号:US11481601B2

    公开(公告)日:2022-10-25

    申请号:US16806980

    申请日:2020-03-02

    Abstract: An analog element for use as a neuron in a recurrent neural network is described, the analog element having memory of a prior layer state and being a continuous time circuit rather than having a discrete clocking interval. The element is characterized and described by the Laplace s-domain operator, as distinct from a digital solution that uses the z-domain operator appropriate for quantized time descriptions. Rather than using an all-pass filter, the analog equivalent of a unit delay in the z-domain, a finite gain integrator, which is a simpler circuit, may be used to provide the delay in the analog s-domain. The resulting circuit may be easily implemented at the transistor level.

    Amplifier bias control using tunneling current

    公开(公告)号:US11349446B2

    公开(公告)日:2022-05-31

    申请号:US17196914

    申请日:2021-03-09

    Abstract: An apparatus and method for using the known phenomena of quantum gate tunneling in semiconductor transistors to define the DC state of a charge-coupled amplifier is described. A first stage in which the tunneling current is bipolar (by pairing PMOS and NMOS transistors) in combination with a second stage with a controlled common mode voltage that can be used to control the first stage tunneling current, and thus the common mode voltage at the input. This can be done without the use of additional elements that may degrade performance or power consumption, since the input devices both process the input signal and maintain the DC operating point of the circuit. The approach may be advantageously used not only in charge-coupled amplifiers as described herein, but also in other capacitively coupled circuits such as charge balancing analog to digital converters (ADCs) and digital to analog converters (DACs).

    Method and Apparatus for Recovering Back-EMF Signal in a Switching Driver

    公开(公告)号:US20220014848A1

    公开(公告)日:2022-01-13

    申请号:US17372440

    申请日:2021-07-10

    Abstract: An apparatus and method for determining signals representative of events in the environment of a reactive transducer while being driven by a switching amplifier is disclosed. While the switching amplifier is in a zero voltage state, a signal capture circuit that is also in a zero voltage state is connected to the transducer for a relatively brief period of time during which a measurement is made of the residual current flow due to the inductance of the transducer. A prediction of the output signal is then subtracted from the signal measured across the transducer, reducing the overall range of the signal and increasing the relative size of the back-EMF signal compared to any remaining output signal. If desired, conventional echo cancellation can then be performed. The back-EMF signal can then be subjected to further processing by an analog-to-digital converter as known in the art.

    Programmable Impedance
    9.
    发明申请

    公开(公告)号:US20210133551A1

    公开(公告)日:2021-05-06

    申请号:US16806264

    申请日:2020-03-02

    Abstract: A programmable impedance element consists of a plurality of nominally identical two-port elements, each two-port element having an impedance element and two switches, the two-port elements arranged in a chain fashion with a structured set of switches such that a range of impedances can be obtained from each cell by dynamically changing the connections between the impedance elements in the cell. The common cell is constructed by connecting the nominally identical two-port impedance elements in a way that the number of possible combinations of the impedance elements is reduced to the subset of all possible combinations that uses the minimum possible number of connections. This structure allows the creation of matched impedances using industry standard devices. The connections between impedance elements are switches that may be “field-programmable,” i.e., that may be set on the chip after manufacture and configured during operation of the circuit, or alternatively may be mask programmable.

    Signal Processing Circuit Without Clock Mediation

    公开(公告)号:US20210036665A1

    公开(公告)日:2021-02-04

    申请号:US16940396

    申请日:2020-07-28

    Abstract: A signal processing circuit that achieves functionality similar to that of a switched capacitor circuit without the necessity a clock. The circuit compensates for finite open loop gain and for offset voltages in the components, allowing the circuit to “calculate” the result of a problem represented by the circuit essentially immediately upon the presentation of a new input or set of inputs. After the circuit is initialized to remove gain, an input is applied to the circuit, and propagates through the network and affects the state of amplifier outputs; the propagation from the input through capacitors to the ultimate output(s) of the circuit is the analog calculation taking place. The calculation is not mediated by a clock, but rather the calculation corresponds to the circuit's one-time response to the application of the inputs. Using these techniques complex signal processing circuits and even analog neural networks may be constructed.

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