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公开(公告)号：US12057816B2
公开(公告)日：2024-08-06
申请号：US17737802
申请日：2022-05-05
Applicant: SiliconIntervention Inc.
Inventor： A. Martin Mallinson
IPC: H03F3/45 , H03F1/02 , H03F1/42 , H04N19/182
CPC classification number: H03F3/45269 , H03F1/02 , H03F1/42 , H04N19/182 , H03F2200/36
Abstract: An apparatus and method for using the known phenomena of quantum gate tunneling in semiconductor transistors to define the DC state of a charge-coupled amplifier is described. A first stage in which the tunneling current is bipolar (by pairing PMOS and NMOS transistors) in combination with a second stage with a controlled common mode voltage that can be used to control the first stage tunneling current, and thus the common mode voltage at the input. This can be done without the use of additional elements that may degrade performance or power consumption, since the input devices both process the input signal and maintain the DC operating point of the circuit. The approach may be advantageously used not only in charge-coupled amplifiers as described herein, but also in other capacitively coupled circuits such as charge balancing analog to digital converters (ADCs) and digital to analog converters (DACs).
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公开(公告)号：US12047085B2
公开(公告)日：2024-07-23
申请号：US18077933
申请日：2022-12-08
Applicant: SiliconIntervention Inc.
Inventor： A. Martin Mallinson
IPC: H03M1/00 , G06F5/01 , G06F7/02 , H03F3/04 , H03F3/183 , H03F3/45 , H03G3/00 , H03K5/24 , H03M1/06 , H03M1/34 , H03M1/36
CPC classification number: H03M1/002 , G06F5/01 , G06F7/02 , H03F3/04 , H03F3/183 , H03F3/45089 , H03F3/45475 , H03G3/001 , H03K5/24 , H03M1/34 , H03M1/365 , H03F2203/45528 , H03M1/0682
Abstract: An apparatus and method for processing signals in the analog domain. A signal is derived from analog circuit properties that is shift and scale invariant. Although the circuit properties are not quantized as in traditional digital signal processing, the signal is immune from effects of the properties, such as common mode noise, absolute voltage or current level, finite settling time, etc., as a digital signal would be. The shift and scale invariance allows for mathematical operations of addition, subtraction, multiplication and division of signals. By combining these operations, various circuits may be constructed, including a voltage controlled amplifier, a time gain amplifier, and an analog-to-digital converter. The circuits are constructed using almost no non-linear, active devices, and will thus use less power for a given speed than comparable digital devices, and will often be faster as there are no delay elements and no need to wait for the circuit properties to settle.
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公开(公告)号：US12040808B2
公开(公告)日：2024-07-16
申请号：US18077917
申请日：2022-12-08
Applicant: SiliconIntervention Inc.
Inventor： A. Martin Mallinson
CPC classification number: H03M1/002 , G06F5/01 , G06F7/02 , H03F3/04 , H03G3/001 , H03K5/24 , H03M1/34
Abstract: An apparatus and method for processing signals in the analog domain. A signal is derived from analog circuit properties that is shift and scale invariant. Although the circuit properties are not quantized as in traditional digital signal processing, the signal is immune from effects of the properties, such as common mode noise, absolute voltage or current level, finite settling time, etc., as a digital signal would be. The shift and scale invariance allows for mathematical operations of addition, subtraction, multiplication and division of signals. By combining these operations, various circuits may be constructed, including a voltage controlled amplifier, a time gain amplifier, and an analog-to-digital converter. The circuits are constructed using almost no non-linear, active devices, and will thus use less power for a given speed than comparable digital devices, and will often be faster as there are no delay elements and no need to wait for the circuit properties to settle.
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公开(公告)号：US12021491B2
公开(公告)日：2024-06-25
申请号：US17838204
申请日：2022-06-11
Applicant: SiliconIntervention Inc.
Inventor： A. Martin Mallinson
CPC classification number: H03F3/2173 , H03F1/0227 , H03F2200/03 , H03F2200/102
Abstract: An apparatus and method for improving the efficiency of a D class amplifier, particularly at lower output levels. A class D amplifier having a load with inductance, such as a transducer, is configured to concurrently act as its own buck regulator. A capacitor connected to ground and to both ends of the transducer through switches functions as the buck regulator in connection with the inductance of the transducer, providing the class D amplifier with additional voltage levels such as might be provided by a G/H class amplifier but without the added complexity or expense of the G/H configurations. Better efficiency is possible than that provided by a 100% efficient conventional buck regulator. No envelope detector is required, nor any change to the gain of the digital signal to the class D amplifier. Feedback may be used if desired, but is not required to obtain a high quality output signal.
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公开(公告)号：US20230179218A1
公开(公告)日：2023-06-08
申请号：US18077933
申请日：2022-12-08
Applicant: SiliconIntervention Inc.
Inventor： A. Martin Mallinson
Abstract: An apparatus and method for processing signals in the analog domain. A signal is derived from analog circuit properties that is shift and scale invariant. Although the circuit properties are not quantized as in traditional digital signal processing, the signal is immune from effects of the properties, such as common mode noise, absolute voltage or current level, finite settling time, etc., as a digital signal would be. The shift and scale invariance allows for mathematical operations of addition, subtraction, multiplication and division of signals. By combining these operations, various circuits may be constructed, including a voltage controlled amplifier, a time gain amplifier, and an analog-to-digital converter. The circuits are constructed using almost no non-linear, active devices, and will thus use less power for a given speed than comparable digital devices, and will often be faster as there are no delay elements and no need to wait for the circuit properties to settle.
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Patent Agency Ranking
公开(公告)号：US20220264113A1
公开(公告)日：2022-08-18
申请号：US17737802
申请日：2022-05-05
Applicant: SiliconIntervention Inc.
Inventor： A. Martin Mallinson
IPC: H04N19/159 , H04N19/117 , H04N19/182
Abstract: An apparatus and method for using the known phenomena of quantum gate tunneling in semiconductor transistors to define the DC state of a charge-coupled amplifier is described. A first stage in which the tunneling current is bipolar (by pairing PMOS and NMOS transistors) in combination with a second stage with a controlled common mode voltage that can be used to control the first stage tunneling current, and thus the common mode voltage at the input. This can be done without the use of additional elements that may degrade performance or power consumption, since the input devices both process the input signal and maintain the DC operating point of the circuit. The approach may be advantageously used not only in charge-coupled amplifiers as described herein, but also in other capacitively coupled circuits such as charge balancing analog to digital converters (ADCs) and digital to analog converters (DACs).
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公开(公告)号：US20210365766A1
公开(公告)日：2021-11-25
申请号：US17330288
申请日：2021-05-25
Applicant: SiliconIntervention Inc.
Inventor： A. Martin Mallinson
Abstract: An apparatus and method for creating data dependency in a neural network without the need for historical data or training is described. An “auxiliary path” that is adjacent to the main path of the neural network contains neurons that receive input data, creating non-linearity beyond that normally present in the network. The outputs of the neurons in the auxiliary path do not directly feed into the layers of neurons in the main path of the network as inputs, but instead are used to “adjust” the input weights to neurons in the main path by selecting which of existing, pre-determined weights are used for any given input. No training phase is required, and the weights in the network do not change, but instead existing paths are simply opened or closed to inputs depending upon the inputs, effectively altering the input weights to the neurons in the main path.
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公开(公告)号：US20200333882A1
公开(公告)日：2020-10-22
申请号：US16849794
申请日：2020-04-15
Applicant: SiliconIntervention Inc.
Inventor： A. Martin Mallinson
IPC: G06F3/01 , A61B5/0476 , A61B5/00 , G06N3/04
Abstract: Described herein is a system and method for controlling a computing system by an AI network based upon an electroencephalograph (EEG) signal from a user. The user's EEG signals are first detected as the user operates an existing controller, during which time the associated artificial intelligence (AI) system learns by correlating the EEG signals with the commands received from the controller. Once the AI system determines that there is sufficient correlation to predict the user's actions, it can take control of the computing system and initiate commands based upon the user's EEG signal in place of the user's actions with the controller. At this point, weights in the AI network may be locked so that further commands from the controller, or the lack thereof, do not reduce correlation with the EEG signals. In some embodiments, the AI network may initiate commands faster than the user would be able to do.
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公开(公告)号：US20200293871A1
公开(公告)日：2020-09-17
申请号：US16815223
申请日：2020-03-11
Applicant: SiliconIntervention Inc.
Inventor： A. Martin Mallinson , Christian Leth Petersen
Abstract: A self-clocking (or self-oscillating) modulator in signal processing, similar to a ΣΔ modulator, with particular application in the design of neural networks based on such modulators is described. A system of multiple self-clocking modulators and supporting structures may be configured to perform a calculation similar to that of an analog computer, such as a neural network, at lower power and smaller size than a digital implementation. Such a system constructed using the present approach does not require a sequential solution, but rather converges on a solution in one step; unlike the typical prior art, it thus requires no clock and operates asynchronously in a manner similar to a conventional analog computer. The self-clocking modulator can function as a neuron in a neural network, receiving a sum-of-products signal and generating an output stream like that of a ΣΔ modulator that represents this sum-of-products, potentially also including an activation function and offset.
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公开(公告)号：US10680794B2
公开(公告)日：2020-06-09
申请号：US16517623
申请日：2019-07-21
Applicant: SiliconIntervention Inc.
Inventor： A. Martin Mallinson
Abstract: Described herein is an apparatus for the recovery of asynchronous data into a fixed clock domain. A phase-locked loop (PLL) of the known art is replaced by a modified quadrature resolver, and the output from the resolver re-creates the selected frequency component of the input asynchronous data. The zero-crossings of this re-created data clock are used to sample the input data stream. One advantage of this technique is that it operates as a state machine on a single clock, and no analog components such as phase detectors or VCOs are needed. In another embodiment, the samples from the input data stream are changed from pulses to Gaussians, allowing for conversion of the sample rate from one clock domain to another.
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