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1.
公开(公告)号:US09972681B2
公开(公告)日:2018-05-15
申请号:US15617992
申请日:2017-06-08
Applicant: Power Integrations, Inc.
Inventor: Alexei Ankoudinov , Sorin Georgescu , Vijay Parthasarathy , Kelly Marcum , Jiankang Bu
IPC: H01L29/06 , H01L29/78 , H01L29/08 , H01L29/10 , H01L29/40 , H01L29/861 , H01L29/739 , H01L27/08 , H01L27/088
CPC classification number: H01L29/0692 , H01L27/0814 , H01L27/088 , H01L29/0649 , H01L29/0696 , H01L29/0865 , H01L29/0882 , H01L29/1095 , H01L29/404 , H01L29/407 , H01L29/4238 , H01L29/7395 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/861 , H01L29/8613
Abstract: A semiconductor device including a dummy pillar and a plurality of racetrack pillars. The dummy pillar of semiconductor material extends in a first lateral direction. The plurality of racetrack pillars, including the semiconducting material, surrounds the dummy pillar. Each of the plurality of racetrack pillars has a first linear section, which extends in the first lateral direction, and a first rounded section to form a racetrack shape. The plurality of racetrack pillars includes a first racetrack pillar and a second racetrack pillar. The first racetrack pillar is disposed proximate to the dummy pillar and the second racetrack pillar surrounds the first racetrack pillar. The first racetrack pillar is disposed between the dummy pillar and the second racetrack pillar. The semiconductor device includes a plurality of spacing regions including a first spacing region that surrounds the dummy pillar and is disposed between the first racetrack pillar and the dummy pillar.
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公开(公告)号:US20190393874A1
公开(公告)日:2019-12-26
申请号:US16564850
申请日:2019-09-09
Applicant: Power Integrations, Inc.
Inventor: Hartley Horwitz , Sorin Georgescu , Kuo-Chang Robert Yang
IPC: H03K17/567 , H03K5/08 , H01L29/06 , H01L29/866 , H03K17/081
Abstract: A switch having a drain, a source, and a control. The switch comprising a depletion-mode transistor including a first, a second, and a control terminal and an enhancement-mode transistor including a first, a second, and a control terminal. The first terminal of the depletion-mode transistor is the drain of the switch and the control of the depletion-mode transistor is coupled to the source of the switch. The control of the enhancement-mode transistor is coupled to the control of the switch, the second terminal of the enhancement-mode transistor is the source of the switch. The switch comprises a clamp circuit to clamp a voltage of the first terminal of the enhancement-mode transistor to a threshold, the clamp circuit comprises a resistor and a pn-junction device coupled between the first and second terminals of the enhancement-mode transistor and between the second terminal and the control of the depletion-mode transistor.
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公开(公告)号:US20200350908A1
公开(公告)日:2020-11-05
申请号:US16935642
申请日:2020-07-22
Applicant: Power Integrations, Inc.
Inventor: Hartley Horwitz , Sorin Georgescu , Kuo-Chang Robert Yang
IPC: H03K17/567 , H03K5/08 , H01L29/06 , H01L29/866 , H03K17/081
Abstract: A switch having a drain, a source, and a control. The switch comprising a depletion-mode transistor including a first, a second, and a control terminal and an enhancement-mode transistor including a first, a second, and a control terminal. The first terminal of the depletion-mode transistor is the drain of the switch and the control of the depletion-mode transistor is coupled to the source of the switch. The control of the enhancement-mode transistor is coupled to the control of the switch, the second terminal of the enhancement-mode transistor is the source of the switch. The switch comprises a clamp circuit to clamp a voltage of the first terminal of the enhancement-mode transistor to a threshold, the clamp circuit comprises a resistor and a pn-junction device coupled between the first and second terminals of the enhancement-mode transistor and between the second terminal and the control of the depletion-mode transistor.
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公开(公告)号:US09871510B1
公开(公告)日:2018-01-16
申请号:US15246395
申请日:2016-08-24
Applicant: Power Integrations, Inc.
Inventor: Hartley Horwitz , Sorin Georgescu , Kuo-Chang Robert Yang
IPC: H03K17/687 , H03K17/567 , H03K5/08 , H01L29/06 , H01L29/866
CPC classification number: H03K17/567 , H01L29/0619 , H01L29/866 , H03K5/08 , H03K17/08116
Abstract: A cascode switch circuit includes a normally-on device cascode coupled to a normally-of device between first and second terminals of the cascode switch circuit. A leakage clamp circuit is coupled between first and second terminals of the normally-off device. The leakage clamp circuit is coupled to clamp a voltage at an intermediate terminal between the normally-on device and the normally-off device at a threshold voltage level. The leakage clamp circuit is further coupled to clamp a voltage between the second terminal of the normally-on device and the control terminal of the normally-on device at the threshold voltage level to keep the normally-on device off when the normally-on device and the normally-off device are off.
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5.
公开(公告)号:US12136646B2
公开(公告)日:2024-11-05
申请号:US17615553
申请日:2019-06-19
Applicant: POWER INTEGRATIONS, INC.
Inventor: Kuo-Chang Yang , Sorin Georgescu
IPC: H01L29/06 , H01L29/417 , H01L29/78 , H01L29/808 , H01L29/861
Abstract: Coupled polysilicon guard rings for enhancing breakdown voltage in a power semiconductor device are presented herein. Polysilicon guard rings are disposed above the power device drift region and electrically coupled to power device regions (e.g., device diffusions) so as to spread electric fields associated with an operating voltage. Additionally, PN junctions (i.e., p-type and n-type junctions) are formed within the polysilicon guard rings to operate in reverse bias with a low leakage current between the power device regions (e.g., device diffusions). Low leakage current may advantageously enhance the electric field spreading without deleteriously affecting existing (i.e., normal) power device performance; and enhanced electric field spreading may in turn reduce breakdown-voltage drift.
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公开(公告)号:US10763852B2
公开(公告)日:2020-09-01
申请号:US16564850
申请日:2019-09-09
Applicant: Power Integrations, Inc.
Inventor: Hartley Horwitz , Sorin Georgescu , Kuo-Chang Robert Yang
IPC: H01L29/06 , H03K17/567 , H03K5/08 , H01L29/866 , H03K17/081
Abstract: A switch having a drain, a source, and a control. The switch comprising a depletion-mode transistor including a first, a second, and a control terminal and an enhancement-mode transistor including a first, a second, and a control terminal. The first terminal of the depletion-mode transistor is the drain of the switch and the control of the depletion-mode transistor is coupled to the source of the switch. The control of the enhancement-mode transistor is coupled to the control of the switch, the second terminal of the enhancement-mode transistor is the source of the switch. The switch comprises a clamp circuit to clamp a voltage of the first terminal of the enhancement-mode transistor to a threshold, the clamp circuit comprises a resistor and a pn-junction device coupled between the first and second terminals of the enhancement-mode transistor and between the second terminal and the control of the depletion-mode transistor.
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公开(公告)号:US20190123738A1
公开(公告)日:2019-04-25
申请号:US16220684
申请日:2018-12-14
Applicant: Power Integrations, Inc.
Inventor: Hartley Horwitz , Sorin Georgescu , Kuo-Chang Robert Yang
IPC: H03K17/567 , H03K17/081 , H03K5/08 , H01L29/06 , H01L29/866
CPC classification number: H03K17/567 , H01L29/0619 , H01L29/866 , H03K5/08 , H03K17/08116
Abstract: A switch having a drain terminal, a source terminal and a control terminal. The switch comprises a normally-on device including a first terminal, a second terminal, and a control terminal, a normally-off device including a first terminal, a second terminal, and a control terminal, and a clamp circuit. The first terminal of the normally-on device is the drain terminal of the switch and the control terminal of the normally-on device is coupled to the source terminal of the switch. The control terminal of the normally-off device is coupled to the control terminal of the switch. The second terminal of the normally-off device is the source terminal of the switch, and the first terminal of the normally-off device is coupled to the second terminal of the normally-on device. The clamp circuit coupled across the normally-off device and comprises a first transistor coupled to the first terminal of the normally-off device.
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公开(公告)号:US20180262190A1
公开(公告)日:2018-09-13
申请号:US15977689
申请日:2018-05-11
Applicant: Power Integrations, Inc.
Inventor: Hartley Horwitz , Sorin Georgescu , Kuo-Chang Robert Yang
IPC: H03K17/567 , H01L29/866 , H01L29/06 , H03K5/08
CPC classification number: H03K17/567 , H01L29/0619 , H01L29/866 , H03K5/08 , H03K17/08116
Abstract: A switch having a first terminal, a second terminal and a control terminal. The switch includes a normally-on device with a first terminal, a second terminal, and a control terminal. The first terminal of the normally-on device is the first terminal of the switch. The control terminal of the normally-on device is coupled to the second terminal of the switch. A normally-off device includes a first terminal, a second terminal, and a control terminal. The control terminal of the normally-off device is coupled to the control terminal of the switch. The second terminal of the normally off-device is the second terminal of the switch. The first terminal of the normally-off device is coupled to the second terminal of the normally-on device. A clamp circuit is coupled across the normally-off device. The clamp circuit is coupled to clamp a voltage of the first terminal of the normally-off device to a threshold.
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公开(公告)号:US11025249B2
公开(公告)日:2021-06-01
申请号:US16935642
申请日:2020-07-22
Applicant: Power Integrations, Inc.
Inventor: Hartley Horwitz , Sorin Georgescu , Kuo-Chang Robert Yang
IPC: H03K17/081 , H01L29/20 , H03K17/567 , H03K5/08 , H01L29/06 , H01L29/866
Abstract: A switch having a drain, a source, and a control. The switch comprising a depletion-mode transistor including a first, a second, and a control terminal and an enhancement-mode transistor including a first, a second, and a control terminal. The first terminal of the depletion-mode transistor is the drain of the switch and the control of the depletion-mode transistor is coupled to the source of the switch. The control of the enhancement-mode transistor is coupled to the control of the switch, the second terminal of the enhancement-mode transistor is the source of the switch. The switch comprises a clamp circuit to clamp a voltage of the first terminal of the enhancement-mode transistor to a threshold, the clamp circuit comprises a resistor and a pn-junction device coupled between the first and second terminals of the enhancement-mode transistor and between the second terminal and the control of the depletion-mode transistor.
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公开(公告)号:US10187054B2
公开(公告)日:2019-01-22
申请号:US15977689
申请日:2018-05-11
Applicant: Power Integrations, Inc.
Inventor: Hartley Horwitz , Sorin Georgescu , Kuo-Chang Robert Yang
IPC: H01L29/66 , H03K17/567 , H01L29/866 , H03K5/08 , H01L29/06
Abstract: A switch having a first terminal, a second terminal and a control terminal. The switch includes a normally-on device with a first terminal, a second terminal, and a control terminal. The first terminal of the normally-on device is the first terminal of the switch. The control terminal of the normally-on device is coupled to the second terminal of the switch. A normally-off device includes a first terminal, a second terminal, and a control terminal. The control terminal of the normally-off device is coupled to the control terminal of the switch. The second terminal of the normally off-device is the second terminal of the switch. The first terminal of the normally-off device is coupled to the second terminal of the normally-on device. A clamp circuit is coupled across the normally-off device. The clamp circuit is coupled to clamp a voltage of the first terminal of the normally-off device to a threshold.
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