公开(公告)号：US09431511B2

公开(公告)日：2016-08-30

申请号：US14682958

申请日：2015-04-09

Applicant: IMEC

Inventor： Stefaan Decoutere ,  Silvia Lenci

IPC: H01L29/66 ,  H01L27/06 ,  H01L21/8252 ,  H01L29/872 ,  H01L29/778 ,  H01L29/06 ,  H01L29/10 ,  H01L29/20

CPC classification number: H01L29/66431 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0623 ,  H01L27/0629 ,  H01L29/0619 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66143 ,  H01L29/66212 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/872

Abstract: A semiconductor device includes a Schottky diode and a High Electron Mobility Transistor (HEMT) formed on a III-nitride stack. The III-nitride stack includes at least a lower and an upper III-nitride layer forming a heterojunction therebetween, so that a 2-dimensional electron gas (2DEG) layer may be formed in the lower layer. The 2DEG layer serves as a charge carrier for the diode and the HEMT. A doped III-nitride layer may be present between a portion of the anode of the diode and the III-nitride stack, and the portion may be located between the diode's Schottky junction and the cathode. A further layer of doped III-nitride material may be present between the gate electrode of the HEMT and the III-nitride stack. The thickness of the III-nitride layers is not equal, so that the turn-on voltage of the diode and the threshold voltage of the HEMT may be tuned according to specific requirements. The disclosure also involves a method of producing such a semiconductor device.

公开(公告)号：US09276082B2

公开(公告)日：2016-03-01

申请号：US14254615

申请日：2014-04-16

Applicant: IMEC

Inventor： Stefaan Decoutere ,  Silvia Lenci

IPC: H01L27/06 ,  H01L29/66 ,  H01L21/8252 ,  H01L29/872 ,  H01L29/778 ,  H01L29/06 ,  H01L29/10 ,  H01L29/20

CPC classification number: H01L29/66431 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0623 ,  H01L27/0629 ,  H01L29/0619 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66143 ,  H01L29/66212 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/872

Abstract: A semiconductor device includes a Schottky diode and a High Electron Mobility Transistor (HEMT) formed on a III-nitride stack. The III-nitride stack includes at least a lower and an upper III-nitride layer forming a heterojunction therebetween, so that a 2-dimensional electron gas (2DEG) layer may be formed in the lower layer. The 2DEG layer serves as a charge carrier for the diode and the HEMT. A doped III-nitride layer may be present between a portion of the anode of the diode and the III-nitride stack, and the portion may be located between the diode's Schottky junction and the cathode. A further layer of doped III-nitride material may be present between the gate electrode of the HEMT and the III-nitride stack. The thickness of the III-nitride layers is not equal, so that the turn-on voltage of the diode and the threshold voltage of the HEMT may be tuned according to specific requirements. The disclosure also involves a method of producing such a semiconductor device.

Abstract translation: 半导体器件包括形成在III族氮化物层上的肖特基二极管和高电子迁移率晶体管（HEMT）。 III族氮化物堆叠包括至少一个在其间形成异质结的下部和上部III族氮化物层，从而可以在下层中形成二维电子气（2DEG）层。 2DEG层用作二极管和HEMT的电荷载体。 掺杂的III族氮化物层可以存在于二极管的阳极的一部分和III族氮化物层之间，并且该部分可以位于二极管的肖特基结和阴极之间。 掺杂的III族氮化物材料的另一层可以存在于HEMT的栅电极和III族氮化物层之间。 III族氮化物层的厚度不相等，可以根据具体要求调整二极管的导通电压和HEMT的阈值电压。 本公开还涉及制造这种半导体器件的方法。

公开(公告)号：US20150214327A1

公开(公告)日：2015-07-30

申请号：US14682958

申请日：2015-04-09

Applicant: IMEC

Inventor： Stefaan Decoutere ,  Silvia Lenci

IPC: H01L29/66 ,  H01L21/8252

CPC classification number: H01L29/66431 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0623 ,  H01L27/0629 ,  H01L29/0619 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66143 ,  H01L29/66212 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/872

Abstract: A semiconductor device includes a Schottky diode and a High Electron Mobility Transistor (HEMT) formed on a III-nitride stack. The III-nitride stack includes at least a lower and an upper III-nitride layer forming a heterojunction therebetween, so that a 2-dimensional electron gas (2DEG) layer may be formed in the lower layer. The 2DEG layer serves as a charge carrier for the diode and the HEMT. A doped III-nitride layer may be present between a portion of the anode of the diode and the III-nitride stack, and the portion may be located between the diode's Schottky junction and the cathode. A further layer of doped III-nitride material may be present between the gate electrode of the HEMT and the III-nitride stack. The thickness of the III-nitride layers is not equal, so that the turn-on voltage of the diode and the threshold voltage of the HEMT may be tuned according to specific requirements. The disclosure also involves a method of producing such a semiconductor device.

Abstract translation: 半导体器件包括形成在III族氮化物层上的肖特基二极管和高电子迁移率晶体管（HEMT）。 III族氮化物堆叠包括至少一个在其间形成异质结的下部和上部III族氮化物层，从而可以在下层中形成二维电子气（2DEG）层。 2DEG层用作二极管和HEMT的电荷载体。 掺杂的III族氮化物层可以存在于二极管的阳极的一部分和III族氮化物层之间，并且该部分可以位于二极管的肖特基结和阴极之间。 掺杂的III族氮化物材料的另一层可以存在于HEMT的栅电极和III族氮化物层之间。 III族氮化物层的厚度不相等，可以根据具体要求调整二极管的导通电压和HEMT的阈值电压。 本公开还涉及制造这种半导体器件的方法。

公开(公告)号：US11351539B2

公开(公告)日：2022-06-07

申请号：US16706292

申请日：2019-12-06

Applicant: IMEC VZW

Inventor： Silvia Lenci

IPC: B01L3/00

Abstract: A multi-level microfluidic device is provided. The device includes a silicon wafer substrate and a stack of layers arranged on the silicon wafer substrate. The stack comprises a plurality of fluidic silicon layers, wherein each fluidic silicon layer includes a microfluidic structure at least one intermediate layer. The at least one intermediate layer is arranged between two fluidic silicon layers, and a fluid inlet and a fluid outlet in fluid connection with at least one of the fluidic silicon layers. Each layer in the stack is formed by deposition or growth. Methods for manufacturing microfluidic devices is also provided.

公开(公告)号：US20140306235A1

公开(公告)日：2014-10-16

申请号：US14254615

申请日：2014-04-16

Applicant: IMEC

Inventor： Stefaan Decoutere ,  Silvia Lenci

IPC: H01L27/06 ,  H01L21/8252

CPC classification number: H01L29/66431 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0623 ,  H01L27/0629 ,  H01L29/0619 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66143 ,  H01L29/66212 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/872

Abstract: A semiconductor device includes a Schottky diode and a High Electron Mobility Transistor (HEMT) formed on a III-nitride stack. The III-nitride stack includes at least a lower and an upper III-nitride layer forming a heterojunction therebetween, so that a 2-dimensional electron gas (2DEG) layer may be formed in the lower layer. The 2DEG layer serves as a charge carrier for the diode and the HEMT. A doped III-nitride layer may be present between a portion of the anode of the diode and the III-nitride stack, and the portion may be located between the diode's Schottky junction and the cathode. A further layer of doped III-nitride material may be present between the gate electrode of the HEMT and the III-nitride stack. The thickness of the III-nitride layers is not equal, so that the turn-on voltage of the diode and the threshold voltage of the HEMT may be tuned according to specific requirements. The disclosure also involves a method of producing such a semiconductor device.

Abstract translation: 半导体器件包括形成在III族氮化物层上的肖特基二极管和高电子迁移率晶体管（HEMT）。 III族氮化物堆叠包括至少一个在其间形成异质结的下部和上部III族氮化物层，从而可以在下层中形成二维电子气（2DEG）层。 2DEG层用作二极管和HEMT的电荷载体。 掺杂的III族氮化物层可以存在于二极管的阳极的一部分和III族氮化物层之间，并且该部分可以位于二极管的肖特基结和阴极之间。 掺杂的III族氮化物材料的另一层可以存在于HEMT的栅电极和III族氮化物层之间。 III族氮化物层的厚度不相等，可以根据具体要求调整二极管的导通电压和HEMT的阈值电压。 本公开还涉及制造这种半导体器件的方法。