公开(公告)号：US20140211554A1

公开(公告)日：2014-07-31

申请号：US14242495

申请日：2014-04-08

Applicant: Being Advanced Memory Corporation

Inventor： Yuanxing Li ,  Van Butler ,  Ryan Jurasek

IPC: G11C13/00

CPC classification number: G11C13/004 ,  G11C7/1006 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069

Abstract: Methods and systems for phase change memories and arrays with improved write characteristics. If a data word can be more efficiently written by e.g. exchanging SETs and RESETs, it is written as such on the fly, and e.g. a bit of overhead is written to indicate the transformation. This has a surprising synergy with phase change memory as SET operations usually take longer and consume more power than do RESET operations. In one sample embodiment of multilevel phase change memory, states intermediate between SET and RESET can be even less desirable to write than SETs, as they take more precision than do the extreme states of SET and RESET, so that a desirable transformation can be to exchange intermediate states for extreme states.

公开(公告)号：US08908417B2

公开(公告)日：2014-12-09

申请号：US14242495

申请日：2014-04-08

Applicant: Being Advanced Memory Corporation

Inventor： Yuanxing Li ,  Van Butler ,  Ryan Jurasek

IPC: G11C11/00 ,  G11C13/00

CPC classification number: G11C13/004 ,  G11C7/1006 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069

Abstract: Methods and systems for phase change memories and arrays with improved write characteristics. If a data word can be more efficiently written by e.g. exchanging SETs and RESETs, it is written as such on the fly, and e.g. a bit of overhead is written to indicate the transformation. This has a surprising synergy with phase change memory as SET operations usually take longer and consume more power than do RESET operations. In one sample embodiment of multilevel phase change memory, states intermediate between SET and RESET can be even less desirable to write than SETs, as they take more precision than do the extreme states of SET and RESET, so that a desirable transformation can be to exchange intermediate states for extreme states.

Abstract translation: 具有改进写入特性的相变存储器和阵列的方法和系统。 如果数据字可以通过例如更有效地写入。 交换SET和RESET，它是如此写入，例如。 写一点开销来指示转换。 这与相变存储器具有惊人的协同作用，因为SET操作通常需要更长的时间并消耗比RESET操作更多的功率。 在多级相变存储器的一个示例实施例中，与SET相比，SET和RESET之间的中间状态甚至可能比SET更适合，因为它们比SET和RESET的极端状态具有更高的精度，使得期望的变换可以是交换 极端状态的中间状态。

公开(公告)号：US20140211555A1

公开(公告)日：2014-07-31

申请号：US14242508

申请日：2014-04-01

Applicant: BEING ADVANCED MEMORY CORPORATION

Inventor： Yuanxing Li ,  Van Butler ,  Ryan Jurasek

IPC: G11C13/00

CPC classification number: G11C13/004 ,  G11C7/1006 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069

Abstract: Methods and systems for phase change memories and arrays with improved write characteristics. If a data word can be more efficiently written by e.g. exchanging SETs and RESETs, it is written as such on the fly, and e.g. a bit of overhead is written to indicate the transformation. This has a surprising synergy with phase change memory as SET operations usually take longer and consume more power than do RESET operations. In one sample embodiment of multilevel phase change memory, states intermediate between SET and RESET can be even less desirable to write than SETs, as they take more precision than do the extreme states of SET and RESET, so that a desirable transformation can be to exchange intermediate states for extreme states.

公开(公告)号：US08830731B2

公开(公告)日：2014-09-09

申请号：US14242508

申请日：2014-04-01

Applicant: Being Advanced Memory Corporation

Inventor： Yuanxing Li ,  Van Butler ,  Ryan Jurasek

IPC: G11C11/00 ,  G11C13/00

CPC classification number: G11C13/004 ,  G11C7/1006 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069

Abstract: Methods and systems for phase change memories and arrays with improved write characteristics. If a data word can be more efficiently written by e.g. exchanging SETs and RESETs, it is written as such on the fly, and e.g. a bit of overhead is written to indicate the transformation. This has a surprising synergy with phase change memory as SET operations usually take longer and consume more power than do RESET operations. In one sample embodiment of multilevel phase change memory, states intermediate between SET and RESET can be even less desirable to write than SETs, as they take more precision than do the extreme states of SET and RESET, so that a desirable transformation can be to exchange intermediate states for extreme states.

公开(公告)号：US08773891B2

公开(公告)日：2014-07-08

申请号：US14011266

申请日：2013-08-27

Applicant: Being Advanced Memory Corporation

Inventor： Yuanxing Li ,  Van Butler ,  Ryan Jurasek

IPC: G11C11/00 ,  G11C13/00

CPC classification number: G11C13/004 ,  G11C7/1006 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069

Abstract: Methods and systems for phase change memories and arrays with improved write characteristics. If a data word can be more efficiently written by e.g. exchanging SETs and RESETs, it is written as such on the fly, and e.g. a bit of overhead is written to indicate the transformation. This has a surprising synergy with phase change memory as SET operations usually take longer and consume more power than do RESET operations. In one sample embodiment of multilevel phase change memory, states intermediate between SET and RESET can be even less desirable to write than SETs, as they take more precision than do the extreme states of SET and RESET, so that a desirable transformation can be to exchange intermediate states for extreme states.

公开(公告)号：US20140071748A1

公开(公告)日：2014-03-13

申请号：US14011266

申请日：2013-08-27

Applicant: Being Advanced Memory Corporation

Inventor： Yuanxing Li ,  Van Butler ,  Ryan Jurasek

IPC: G11C13/00

CPC classification number: G11C13/004 ,  G11C7/1006 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069

Abstract: Methods and systems for phase change memories and arrays with improved write characteristics. If a data word can be more efficiently written by e.g. exchanging SETs and RESETs, it is written as such on the fly, and e.g. a bit of overhead is written to indicate the transformation. This has a surprising synergy with phase change memory as SET operations usually take longer and consume more power than do RESET operations. In one sample embodiment of multilevel phase change memory, states intermediate between SET and RESET can be even less desirable to write than SETs, as they take more precision than do the extreme states of SET and RESET, so that a desirable transformation can be to exchange intermediate states for extreme states.

公开(公告)号：US20140211556A1

公开(公告)日：2014-07-31

申请号：US14242523

申请日：2014-04-01

Applicant: Being Advanced Memory Corporation

Inventor： Yuanxing Li ,  Van Butler ,  Ryan Jurasek

IPC: G11C13/00

CPC classification number: G11C13/004 ,  G11C7/1006 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069

Abstract: Methods and systems for phase change memories and arrays with improved write characteristics. If a data word can be more efficiently written by e.g. exchanging SETs and RESETs, it is written as such on the fly, and e.g. a bit of overhead is written to indicate the transformation. This has a surprising synergy with phase change memory as SET operations usually take longer and consume more power than do RESET operations. In one sample embodiment of multilevel phase change memory, states intermediate between SET and RESET can be even less desirable to write than SETs, as they take more precision than do the extreme states of SET and RESET, so that a desirable transformation can be to exchange intermediate states for extreme states.

Abstract translation: 具有改进写入特性的相变存储器和阵列的方法和系统。 如果数据字可以通过例如更有效地写入。 交换SET和RESET，它是如此写入，例如。 写一点开销来指示转换。 这与相变存储器具有惊人的协同作用，因为SET操作通常需要更长的时间并消耗比RESET操作更多的功率。 在多级相变存储器的一个示例实施例中，与SET相比，SET和RESET之间的中间状态甚至可能比SET更适合，因为它们比SET和RESET的极端状态具有更高的精度，使得期望的变换可以是交换 极端状态的中间状态。