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公开(公告)号：US10862512B2
公开(公告)日：2020-12-08
申请号：US16452466
申请日：2019-06-25
Applicant: Western Digital Technologies, Inc.
Inventor： Dudy David Avraham , Eran Sharon , Omer Fainzilber , Ran Zamir , Stella Achtenberg
Abstract: A storage device may include a decoder configured to connect bits to a content node based on content-aware decoding process. The content-aware decoding process may be dynamic and determine connection structures of bits and content nodes based on patterns in data. In some cases, the decoder may connect non-adjacent bits to a content node based on a content-aware decoding process. In other cases, the decoder may connect a first number of bits to a first content node and a second number of bits to a second content node. In such cases, the first number of bits and the second number of bits are a different number.
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公开(公告)号：US20200235757A1
公开(公告)日：2020-07-23
申请号：US16254575
申请日：2019-01-22
Applicant: Western Digital Technologies, Inc.
Inventor： Stella Achtenberg , Omer Fainzilber , Dudy David Avraham
Abstract: Disclosed herein are memory devices, systems, and methods of content-aware decoding of encoded data. In one aspect, an encoded data chunk is received and one or more characteristics, such as source statistics, are determined. A similar data chunk (that may, e.g., contain data of a similar type) with comparable statistics may be sought. The similar data chunk may, for example, have source statistics that are positively correlated to the source statistics of the encoded data chunk to be decoded. Decoder parameters for the encoded data may be set to correspond with decoder parameters suited to the similar data chunk. The encoded data chunk is decoded using the new decoder parameters. Decoding encoded data based on content can enhance performance, reducing decoding latency and/or power consumption.
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公开(公告)号：US11258465B2
公开(公告)日：2022-02-22
申请号：US16931305
申请日：2020-07-16
Applicant: Western Digital Technologies, Inc.
Inventor： Dudy David Avraham , Eran Sharon , Omer Fainzilber , Alexander Bazarsky , Stella Achtenberg
Abstract: A method and apparatus for obtaining data from a memory, estimating a probability of data values of the obtained data based on at least one of a source log-likelihood ratio and a channel log-likelihood ratio, wherein each bit in the obtained data has an associated log-likelihood ratio, determining at least one data pattern parameter for the data and performing a decoding process using the at least one data pattern parameters to determine a decoded data set.
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公开(公告)号：US10979072B2
公开(公告)日：2021-04-13
申请号：US16357522
申请日：2019-03-19
Applicant: Western Digital Technologies, Inc.
Inventor： Ran Zamir , Eran Sharon , Idan Goldenberg , Dudy David Avraham
Abstract: A method for punctured bit estimation includes receiving a punctured codeword. The method further includes generating a reconstructed codeword using the punctured codeword and at least one punctured bit having a default logic value. The method further includes generating a syndrome vector for the reconstructed codeword. The method further includes determining, using the syndrome vector, a number of unsatisfied parity-checks for the at least one punctured bit. The method further includes determining, for the at least one punctured bit, a bit value using, at least, the number of unsatisfied parity-checks associated with the at least one punctured bit.
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公开(公告)号：US11755407B2
公开(公告)日：2023-09-12
申请号：US17331346
申请日：2021-05-26
Applicant: Western Digital Technologies, Inc.
Inventor： Dudy David Avraham , Ran Zamir , Eran Sharon
CPC classification number: G06F11/1068 , H03M13/098 , H03M13/1105 , H03M13/118
Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to create a dual parity matrix. The dual parity matrix includes a full parity form that includes a payload, a first parity portion, and a second parity portion and a reduced parity form that includes the payload and the first parity portion. The second parity portion is 0. The controller is further configured to create an incremental parity construction matrix. The incremental parity construction matrix includes two arrays. A first array includes a first payload portion, a first, first parity portion, and a first, second parity portion and a second array includes a second payload portion, a second, first parity portion, and a second, second parity portion. The incremental parity construction matrix is arranged in either a block triangular construction or a block diagonal construction.
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Patent Agency Ranking
公开(公告)号：US11727984B2
公开(公告)日：2023-08-15
申请号：US17184536
申请日：2021-02-24
Applicant: Western Digital Technologies, Inc.
Inventor： Eran Sharon , Karin Inbar , Alexander Bazarsky , Dudy David Avraham , Rohit Sehgal , Gilad Koren
CPC classification number: G11C11/5642 , G11C11/5671 , G11C16/26
Abstract: Data storage devices, such as solid state drives (SSDs), are disclosed. A read threshold calibration operation is utilized to generate a calibrated read threshold for one or more voltage states of a cell of a MLC memory. A single-level cell (SLC) read is then executed to sense the ratio of bit values at the read thresholds of the voltage states, where SLC read refers to reading at a single read threshold, rather than to the cell type. The sensing results in a binary page with certain statistics of 1's and 0's. The ratio of 1's (or 0's) in the binary page is used to determine a deviation from the expected ratio, where the deviation is used to adjust the calibrated read threshold to match the voltage states of the MLC memory.
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公开(公告)号：US11640267B2
公开(公告)日：2023-05-02
申请号：US17470141
申请日：2021-09-09
Applicant: Western Digital Technologies, Inc.
Inventor： Dudy David Avraham , Ran Zamir , Judah Gamliel Hahn
IPC: G06F3/06
Abstract: A data storage device includes a memory device including a plurality of endurance groups and a controller coupled to the memory device. The controller is configured to allocate tokens to the plurality of endurance groups, determine whether endurance group has sufficient tokens to perform an operation, and either deny the operation or approve the operation. The operation is selected from the group consisting of: garbage collection, relocation of data, and read scrubbing. Each operation has the same or different cost as another operation. The controller is further configured to set thresholds for each endurance group of the plurality of endurance groups and adjust a threshold for one or more endurance groups of the plurality of endurance groups. The controller is further configured to determine whether the operation will breach quality of service for other endurance groups.
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公开(公告)号：US20230071705A1
公开(公告)日：2023-03-09
申请号：US17470141
申请日：2021-09-09
Applicant: Western Digital Technologies, Inc.
Inventor： Dudy David Avraham , Ran Zamir , Judah Gamliel Hahn
IPC: G06F3/06
Abstract: A data storage device includes a memory device including a plurality of endurance groups and a controller coupled to the memory device. The controller is configured to allocate tokens to the plurality of endurance groups, determine whether endurance group has sufficient tokens to perform an operation, and either deny the operation or approve the operation. The operation is selected from the group consisting of: garbage collection, relocation of data, and read scrubbing. Each operation has the same or different cost as another operation. The controller is further configured to set thresholds for each endurance group of the plurality of endurance groups and adjust a threshold for one or more endurance groups of the plurality of endurance groups. The controller is further configured to determine whether the operation will breach quality of service for other endurance groups.
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公开(公告)号：US11513890B1
公开(公告)日：2022-11-29
申请号：US17332727
申请日：2021-05-27
Applicant: Western Digital Technologies, Inc.
Inventor： Evgeny Mekhanik , Dudy David Avraham , Alexander Bazarsky
IPC: G06F16/2453 , G06F16/22 , G06F16/2455 , G06F16/901 , G06F9/4401 , G06F9/50 , H04L67/10 , G06F3/06 , G06F12/0893 , G06F16/17 , G06F11/10 , G06F12/109 , G06F16/23 , G06F16/242 , H03M7/30 , G06F16/2457 , G06F16/2458 , G06F16/27 , G06F7/24 , G06F11/30 , G06F11/07
Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive a read command form a host device, collect environment data of the memory device, decode data associated with the read command, determine a bit error rate (BER) of the decoded data, compare the BER to a threshold, and determine whether the data associated with the read command is to be relocated. The environment data includes temperature, number of program/erase cycles, amount of grown defects, number of past relocations and time since last data relocation. The controller is further configured to dynamically adjust the threshold based on the collected environment data and an amount of time that has passed since a last relocation of the read command data.
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公开(公告)号：US10911069B2
公开(公告)日：2021-02-02
申请号：US16254575
申请日：2019-01-22
Applicant: Western Digital Technologies, Inc.
Inventor： Stella Achtenberg , Omer Fainzilber , Dudy David Avraham
Abstract: Disclosed herein are memory devices, systems, and methods of content-aware decoding of encoded data. In one aspect, an encoded data chunk is received and one or more characteristics, such as source statistics, are determined. A similar data chunk (that may, e.g., contain data of a similar type) with comparable statistics may be sought. The similar data chunk may, for example, have source statistics that are positively correlated to the source statistics of the encoded data chunk to be decoded. Decoder parameters for the encoded data may be set to correspond with decoder parameters suited to the similar data chunk. The encoded data chunk is decoded using the new decoder parameters. Decoding encoded data based on content can enhance performance, reducing decoding latency and/or power consumption.
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