公开(公告)号：US08837503B2

公开(公告)日：2014-09-16

申请号：US14094261

申请日：2013-12-02

Applicant: Unbound Networks, Inc.

Inventor： Damon Finney ,  Ashok Mathur

IPC: H04L12/28 ,  H04L12/863

CPC classification number: H04L47/6215 ,  G06F9/3885 ,  H04L49/00 ,  H04L49/9042

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

Abstract translation: 公开了通过多核网络处理器在通信网络中处理数据分组的方法，系统，范例和结构。 网络处理器包括多个多线程核心处理器和用于原子地并行地处理数据包的专用处理器。 网络处理器的入口模块将输入的数据分组存储在存储器中，并将它们添加到输入队列。 网络处理器通过在核心处理器的单个线程中对数据分组执行一组网络操作来处理数据分组。 专用处理器原子地执行数据包上的一组网络操作的子集。 出口模块基于与输出队列相关联的服务质量（QoS）从多个输出队列中检索经处理的数据分组，并将数据分组转发到其目的地址。

公开(公告)号：US08693490B1

公开(公告)日：2014-04-08

申请号：US13786232

申请日：2013-03-05

Applicant: Unbound Networks, Inc.

Inventor： Damon Finney ,  Ashok Mathur

IPC: H04L12/28

CPC classification number: H04L47/6215 ,  G06F9/3885 ,  H04L49/00 ,  H04L49/9042

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

公开(公告)号：US08831025B2

公开(公告)日：2014-09-09

申请号：US14153859

申请日：2014-01-13

Applicant: Unbound Networks, Inc.

Inventor： Damon Finney ,  Ashok Mathur

IPC: H04L12/28 ,  H04L12/861

CPC classification number: H04L47/6215 ,  G06F9/3885 ,  H04L49/00 ,  H04L49/9042

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

公开(公告)号：US20140181470A1

公开(公告)日：2014-06-26

申请号：US14094274

申请日：2013-12-02

Applicant: Unbound Networks, Inc.

Inventor： Damon Finney ,  Ashok Mathur

IPC: G06F9/38

CPC classification number: H04L47/6215 ,  G06F9/3885 ,  H04L49/00 ,  H04L49/9042

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

公开(公告)号：US20140177643A1

公开(公告)日：2014-06-26

申请号：US14153859

申请日：2014-01-13

Applicant: Unbound Networks, Inc.

Inventor： Damon Finney ,  Ashok Mathur

IPC: H04L12/861

CPC classification number: H04L47/6215 ,  G06F9/3885 ,  H04L49/00 ,  H04L49/9042

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

Abstract translation: 公开了通过多核网络处理器在通信网络中处理数据分组的方法，系统，范例和结构。 网络处理器包括多个多线程核心处理器和用于原子地并行地处理数据包的专用处理器。 网络处理器的入口模块将输入的数据分组存储在存储器中，并将它们添加到输入队列。 网络处理器通过在核心处理器的单个线程中对数据分组执行一组网络操作来处理数据分组。 专用处理器原子地执行数据包上的一组网络操作的子集。 出口模块基于与输出队列相关联的服务质量（QoS）从多个输出队列中检索经处理的数据分组，并将数据分组转发到其目的地址。

公开(公告)号：US08830829B2

公开(公告)日：2014-09-09

申请号：US14094274

申请日：2013-12-02

Applicant: Unbound Networks, Inc.

Inventor： Damon Finney ,  Ashok Mathur

IPC: G06F13/00 ,  G06F9/38

CPC classification number: H04L47/6215 ,  G06F9/3885 ,  H04L49/00 ,  H04L49/9042

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.

公开(公告)号：US20140177644A1

公开(公告)日：2014-06-26

申请号：US14094261

申请日：2013-12-02

Applicant: Unbound Networks, Inc.

Inventor： Damon Finney ,  Ashok Mathur

IPC: H04L12/863

CPC classification number: H04L47/6215 ,  G06F9/3885 ,  H04L49/00 ,  H04L49/9042

Abstract: Disclosed are methods, systems, paradigms and structures for processing data packets in a communication network by a multi-core network processor. The network processor includes a plurality of multi-threaded core processors and special purpose processors for processing the data packets atomically, and in parallel. An ingress module of the network processor stores the incoming data packets in the memory and adds them to an input queue. The network processor processes a data packet by performing a set of network operations on the data packet in a single thread of a core processor. The special purpose processors perform a subset of the set of network operations on the data packet atomically. An egress module retrieves the processed data packets from a plurality of output queues based on a quality of service (QoS) associated with the output queues, and forwards the data packets towards their destination addresses.