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公开(公告)号：US20210273308A1
公开(公告)日：2021-09-02
申请号：US16805519
申请日：2020-02-28
Applicant: TTM TECHNOLOGIES, INC.
Inventor： Chong Mei , Omar Eldaiki , Samir Tozin
Abstract: A directional coupler may include a first coupled section comprising a first and a second coupled transmission lines, the first coupled transmission line having a first end coupled to an input port. The directional coupler may also include a second coupled section comprising a first and a second coupled transmission lines. The directional coupler may also include a third coupled section comprising a first and a second coupled transmission lines. The first coupled transmission line of the third coupled section has a first end coupled to a second end of the second coupled transmission line of the second coupled section and a second end coupled to an output port. The directional coupler may further include a delay section. A total electrical length of the first coupled section, the second coupled section, the third coupled section, and the delay section is about 90 degrees.
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Patent Agency Ranking
公开(公告)号：US11362407B2
公开(公告)日：2022-06-14
申请号：US16805519
申请日：2020-02-28
Applicant: TTM TECHNOLOGIES, INC.
Inventor： Chong Mei , Omar Eldaiki , Samir Tozin
Abstract: A directional coupler may include a first coupled section comprising a first and a second coupled transmission lines, the first coupled transmission line having a first end coupled to an input port. The directional coupler may also include a second coupled section comprising a first and a second coupled transmission lines. The directional coupler may also include a third coupled section comprising a first and a second coupled transmission lines. The first coupled transmission line of the third coupled section has a first end coupled to a second end of the second coupled transmission line of the second coupled section and a second end coupled to an output port. The directional coupler may further include a delay section. A total electrical length of the first coupled section, the second coupled section, the third coupled section, and the delay section is about 90 degrees.
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公开(公告)号：US20210127482A1
公开(公告)日：2021-04-29
申请号：US16999969
申请日：2020-08-21
Applicant: TTM TECHNOLOGIES, INC.
Inventor： Omar Eldaiki , Chong Mei
IPC: H05K1/02
Abstract: A wideband termination circuit layout is provided for high power applications. The circuit layout may include a dielectric layer having a first surface and a second surface. The circuit layout may also include an input port disposed over the first surface. The circuit layout may further include at least two resistive film patches disposed over the first surface of the dielectric layer and a tuning line between the at least two resistive films disposed over the first surface of the dielectric layer. The at least two resistive film patches are connected in series with the at least one tuning line.
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公开(公告)号：US10772193B1
公开(公告)日：2020-09-08
申请号：US16705703
申请日：2019-12-06
Applicant: TTM TECHNOLOGIES, INC.
Inventor： Omar Eldaiki , Chong Mei
IPC: H05K1/02
Abstract: A wideband termination circuit layout is provided for high power applications. The circuit layout may include a dielectric layer having a first surface and a second surface. The circuit layout may also include an input port disposed over the first surface. The circuit layout may further include at least two resistive film patches disposed over the first surface of the dielectric layer and a tuning line between the at least two resistive films disposed over the first surface of the dielectric layer. The at least two resistive film patches are connected in series with the at least one tuning line.
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公开(公告)号：US20240313380A1
公开(公告)日：2024-09-19
申请号：US18607121
申请日：2024-03-15
Applicant: TTM Technologies, Inc.
Inventor： Omar Eldaiki , Niels Husted Kirkeby
Abstract: A device includes a top ferrite layer and a bottom ferrite layer. The device also includes a first circuit stack between the top ferrite layer and the bottom ferrite layer. The first circuit stack includes a first dielectric layer and a circulator circuit including a first circuit portion on a first side of the first dielectric layer and a second circuit portion on a second side of the first dielectric layer opposite the first side. The first circuit portion is different from the second circuit portion. The device also includes a second circuit stack including a second dielectric layer and a top ground layer disposed over the second dielectric layer. The second circuit stack is disposed over the top ferrite layer.
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公开(公告)号：US11406008B2
公开(公告)日：2022-08-02
申请号：US16999969
申请日：2020-08-21
Applicant: TTM TECHNOLOGIES, INC.
Inventor： Omar Eldaiki , Chong Mei
IPC: H05K1/02
Abstract: A wideband termination circuit layout is provided for high power applications. The circuit layout may include a dielectric layer having a first surface and a second surface. The circuit layout may also include an input port disposed over the first surface. The circuit layout may further include at least two resistive film patches disposed over the first surface of the dielectric layer and a tuning line between the at least two resistive films disposed over the first surface of the dielectric layer. The at least two resistive film patches are connected in series with the at least one tuning line.
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