Voltage converter with average input current control and input-to-output isolation

    公开(公告)号:US12206326B2

    公开(公告)日:2025-01-21

    申请号:US18525317

    申请日:2023-11-30

    Abstract: A circuit includes a control circuit having a first control circuit input, a second control circuit input, a first control circuit output, and a second control circuit output, and a first transistor having a first current terminal, a second current terminal, and a control terminal, the control terminal coupled to the first control circuit output, the first current terminal coupled to the first control circuit input and to a second transistor, and the second current terminal adapted to be coupled to the second transistor, a logic circuit having a first logic input, a second logic input, and a logic output, the first logic input coupled to the second control circuit output and a switch having a first switch terminal, a second switch terminal, and a switch control terminal, the switch control terminal coupled to the logic output and the first switch terminal coupled to the second current terminal.

    INTEGRATED BACKUP POWER SUPPLY ARCHITECTURE
    2.
    发明公开

    公开(公告)号:US20240283285A1

    公开(公告)日:2024-08-22

    申请号:US18171480

    申请日:2023-02-20

    Abstract: A power system includes a transistor device (e.g., one or more NFETs) is coupled between input voltage and switching node terminals, to provide a variable sense resistance. The system may further include low-side and high-side switching elements, with the low-side switching element coupled between a ground terminal and the switching node terminal, and the high-side switching element coupled between the switching node terminal and an output voltage terminal. The system may be configured to determine its mode of operation, based on primary and backup battery voltages, and enable a corresponding control loop based on that determined mode. With a control loop enabled, the system may be further configured to control the transistor device to provide a variable sense resistor based on a given control parameter. The low-side switching element may be shared by the modes, and external to a chip that includes the high-side switching element and transistor device.

    DC-DC converter with pulse modulation control circuit

    公开(公告)号:US11569743B2

    公开(公告)日:2023-01-31

    申请号:US17116794

    申请日:2020-12-09

    Abstract: A DC-DC converter control circuit includes an error amplifier, a voltage-to-current conversion circuit, an oscillator circuit, and a pulse frequency modulation (PFM) control circuit. The error amplifier is configured to generate a difference voltage as a difference of an output voltage of the DC-DC converter circuit and a reference voltage. The voltage-to-current conversion circuit configured to convert the difference voltage to a difference current. The oscillator circuit is configured to generate a clock signal at a predetermined frequency for pulse width modulation. The PFM control circuit is configured to disable the oscillator circuit, based on the difference current, for PFM operation.

    METHODS, APPARATUS AND CIRCUITS TO CONTROL TIMING FOR HYSTERETIC CURRENT-MODE BOOST CONVERTERS

    公开(公告)号:US20190229619A1

    公开(公告)日:2019-07-25

    申请号:US16006341

    申请日:2018-06-12

    Abstract: Examples to control timing for current-mode boost converters are disclosed. An example device to control timing includes a first input terminal to receive an input voltage of a current-mode boost converter a second input terminal to receive an output voltage of the current-mode boost converter, a generator to generate a first timing signal from the input voltage and the output voltage, a third input terminal to receive a second timing signal from the current-mode boost converter, a selector to select between the first on_off time signal and the second on_off time signal to generate a third on_off time signal based on a comparison of a first off time duration of the first on_off time signal and a second off time duration of the second on_off time signal, and an output terminal to control off times of the current-mode boost converter based on the third on_off time signal.

    Voltage converter with average input current control and input-to-output isolation

    公开(公告)号:US11881770B2

    公开(公告)日:2024-01-23

    申请号:US17563255

    申请日:2021-12-28

    CPC classification number: H02M3/155

    Abstract: A voltage converter having a voltage input and a voltage output, the voltage converter including a first and second transistors and an average current control circuit. The first transistor has a first control input, a first current terminal, and a second current terminal. The first current terminal is adapted to be coupled to a switch node. The second transistor has a second control input, a third current terminal, and a fourth current terminal. The third current terminal is adapted to be coupled to an inductor. The average current control circuit is coupled to the third current terminal and the fourth current terminal. The average current control circuit is configured to determine an average current level of current flowing through the second transistor and to control a voltage on the first control input of the first terminal based on the determined average current level.

    OUTPUT REGULATED BOOST CONVERTER
    8.
    发明申请

    公开(公告)号:US20230029559A1

    公开(公告)日:2023-02-02

    申请号:US17385904

    申请日:2021-07-27

    Abstract: In described examples, a boost converter includes an inductor, a voltage input, a current regulator, an intermediate node, a transistor, and a regulation circuit. The inductor has first and second terminals. The voltage input provides an input voltage, and is coupled to the first inductor terminal. The current regulator has current regulator input and output. The current regulator input is coupled to the second inductor terminal. The current regulator allows current to flow from the current regulator input to the current regulator output, and not vice versa. The intermediate node provides a node voltage. The transistor includes a source, a drain, and a gate. The drain is coupled to the current regulator output via the intermediate node. The regulation circuit includes a first regulation input coupled to receive the input voltage, a second regulation input coupled to the intermediate node, and a regulation output coupled to the gate.

    Exponential-based slope compensation

    公开(公告)号:US11567520B2

    公开(公告)日:2023-01-31

    申请号:US17231176

    申请日:2021-04-15

    Abstract: A voltage converter includes an inductor, a transistor, a comparator, an error amplifier, and a slope generator circuit. The transistor has a control input and first and second transistor current terminals. The first current terminal is coupled to the inductor. The comparator has first and second comparator inputs and a comparator output. The comparator output is usable to control the transistor's control input. The error amplifier has an error amplifier input and an error amplifier output. The error amplifier output is coupled to the first comparator input. The slope generator circuit is coupled to at least one of the first or second comparator inputs. The slope generator circuit is configured to generate a slope compensation current which, during at least a portion of each cycle of operation of the voltage regulator, varies approximately exponentially with respect to time.

    DC-DC converter with current loop gain

    公开(公告)号:US11081958B2

    公开(公告)日:2021-08-03

    申请号:US16805251

    申请日:2020-02-28

    Abstract: A converter system includes a first switch, a first sensing unit configured to generate a first sensed signal proportional to a current through the first switch, a second sensing unit (118) configured to generate a second sensed signal based on a difference between a reference voltage and a feedback voltage, a DC compensation unit configured to generate a slope peak DC signal relative to a slope peak of a slope compensation signal, and a signal combination unit configured to generate a control signal based on the first and second sensed signals, the slope compensation signal and the slope peak DC signal to switch off the first switch.

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