公开(公告)号：US09443808B2

公开(公告)日：2016-09-13

申请号：US14329816

申请日：2014-07-11

Applicant: Synaptics Display Devices GK

Inventor： Hisao Nakamura ,  Yuichi Nakagomi ,  Yasuhiro Kumagai

IPC: H01L23/544 ,  H01L21/82 ,  H01L29/06 ,  H01L23/00 ,  H01L23/58 ,  H01L21/66 ,  H01L23/31

CPC classification number: H01L23/544 ,  H01L21/82 ,  H01L22/34 ,  H01L23/3114 ,  H01L23/564 ,  H01L23/585 ,  H01L29/0607 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor wafer includes circuit integration regions each incorporating an integrated circuit and guard rings disposed to surround the circuit integration regions, respectively. A scribe region disposed between every adjacent two of the guard rings. An element and a pad electrically connected to the element are disposed in the scribe region. A groove is disposed along a corresponding guard ring on a front surface of the semiconductor wafer between the pad and the corresponding guard ring. The distance between the groove and the pad is varied along the corresponding guard ring.

Abstract translation: 半导体晶片包括各自包括集成电路的电路集成区域和分别围绕电路集成区域设置的保护环。 设置在每个相邻的两个保护环之间的划线区域。 电连接到元件的元件和焊盘设置在划线区域中。 沿着衬垫和对应的保护环之间的半导体晶片的前表面上的相应保护环设置凹槽。 槽和垫之间的距离沿对应的保护环变化。

公开(公告)号：US09385096B2

公开(公告)日：2016-07-05

申请号：US14276872

申请日：2014-05-13

Applicant: Synaptics Display Devices GK

Inventor： Hisao Nakamura ,  Yuichi Nakagomi ,  Shinya Suzuki

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/528

CPC classification number: H01L24/14 ,  H01L23/5286 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05567 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/1134 ,  H01L2224/13027 ,  H01L2224/13028 ,  H01L2224/13144 ,  H01L2224/1403 ,  H01L2224/14155 ,  H01L2224/1613 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/81139 ,  H01L2224/81191 ,  H01L2224/81903 ,  H01L2224/83139 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83851 ,  H01L2224/83986 ,  H01L2224/9211 ,  H01L2924/12044 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/83

Abstract: A semiconductor device includes: a semiconductor chip having a main face which has a pair of long sides parallel to each other and a pair of short sides orthogonal to the pair of long sides; first bumps arrayed in a first bump placement region of the semiconductor chip, the first bump placement region being positioned along one of the pair of long sides; second bumps arrayed in a second bump placement region of the semiconductor chip, the second bump placement region being positioned along the other of the pair of long sides; first power lines disposed in a region between the first bump placement region and the second bump placement region, the first power lines extending in a direction parallel to the pair of long sides; and third bumps integrated on the semiconductor chip. Each of the third bumps provides short-circuiting of the first power lines.

Abstract translation: 半导体器件包括：半导体芯片，其具有一对长边彼此平行的主面和与该一对长边正交的一对短边; 所述第一凸块排列在所述半导体芯片的第一凸点放置区域中，所述第一凸起放置区域沿着所述一对长边中的一个定位; 所述第二凸块排列在所述半导体芯片的第二凸点放置区域中，所述第二凸起放置区域沿着所述一对长边中的另一个定位; 第一电力线设置在第一凸点放置区域和第二凸点放置区域之间的区域中，第一电力线沿平行于该一对长边的方向延伸; 和集成在半导体芯片上的第三凸块。 第三个凸起中的每一个提供第一电力线的短路。