Abstract:
A method of operating a wireless data processing system to selectively enable a multi-antenna processor to demodulate N separate data signals from M separate antennas simultaneously. The multi-antenna processor is adapted to respond to changing channel conditions between two access points, so that it selectively kicks in if there is noise, interference, frequency fading, a need for an enhanced data rate, a need for an increased operating range, etc.
Abstract:
A wireless monitoring receiver and system use multiple video data feeds from a plurality of cameras. The video feeds are transmitted using a multi-antenna technique, and decoded by a a multi-antenna processor. The resulting transmissions are resistant to noise, interference, etc., and can be focused using antenna beams to achieve a simple form of location encryption.
Abstract:
A wireless data processing system uses a selectively enabled multi-antenna processor to demodulate N separate data signals from M separate antennas simultaneously. The multi-antenna processor is adapted to respond to changing channel conditions between two access points, so that it selectively kicks in if there is noise, interference, frequency fading, a need for an enhanced data rate, a need for an increased operating range, etc.
Abstract:
A wireless monitoring receiver and system use multiple video data feeds from a plurality of cameras. The video feeds are transmitted using a multi-antenna technique, and decoded by a multi-antenna processor. The resulting transmissions are resistant to noise, interference, etc., and can be focused using antenna beams to achieve a simple form of location encryption.
Abstract:
A DC/AC power converter (“DPC”) capable of generating multi-phase power supply is disclosed. DPC, in one embodiment, includes a first switching bridge, second switching bridge, patch component, first phase generator, and second phase generator. The first switching bridge is coupled to a DC bus and configured to extract a first portion of the DC bus in accordance with a first phase of DC waveform. The second switching bridge, in one aspect, extracts a second portion of the DC bus in accordance with a second phase of DC waveform. The patch component is capable of generating a first patch waveform in response to a third portion of the DC bus. The first phase generator is configured to generate a first phase AC waveform based on the first portion of the DC bus and a first patch waveform.
Abstract:
A DC/AC power converter (“DPC”) capable of generating multi-phase power supply is disclosed. DPC, in one embodiment, includes a first switching bridge, second switching bridge, patch component, first phase generator, and second phase generator. The first switching bridge is coupled to a DC bus and configured to extract a first portion of the DC bus in accordance with a first phase of DC waveform. The second switching bridge, in one aspect, extracts a second portion of the DC bus in accordance with a second phase of DC waveform. The patch component is capable of generating a first patch waveform in response to a third portion of the DC bus. The first phase generator is configured to generate a first phase AC waveform based on the first portion of the DC bus and a first patch waveform.
Abstract:
A wireless monitoring receiver and system use multiple video data feeds from a plurality of cameras. The video feeds are transmitted using a multi-antenna technique, and decoded by a multi-antenna processor. The resulting transmissions are resistant to noise, interference, etc., and can be focused using antenna beams to achieve a simple form of location encryption.
Abstract:
A system and method for maintaining timing compatibility for high rate wireless transceivers employs a cycle stealing technique so that latencies introduced by multi-antenna signal processors in an access point can be masked. A speculative pre-stored, predetermined preamble is issued in response to a data transmission initiation from another access point, so that a responsive packet is sent within an acceptable protocol timing interval.
Abstract:
A single chip integrated circuit wireless data processor demodulates N separate data signals from M separate antennas simultaneously. The multi-antenna processor can be coupled to a baseband processor on the IC, so that it responds to changing channel conditions between two access points, and selectively kicks in if there is noise, interference, frequency fading, a need for an enhanced data rate, a need for an increased operating range, etc. to improve a performance of the baseband processor.
Abstract:
A method of operating a wireless data processing system to selectively enable a multi-antenna processor to demodulate N separate data signals from M separate antennas simultaneously. The multi-antenna processor is adapted to respond to changing channel conditions between two access points, so that it selectively kicks in if there is noise, interference, frequency fading, a need for an enhanced data rate, a need for an increased operating range, etc.