Aggregating and capturing subscriber traffic
    1.
    发明授权
    Aggregating and capturing subscriber traffic 有权
    聚合和捕获用户流量

    公开(公告)号:US08812347B2

    公开(公告)日:2014-08-19

    申请号:US12469909

    申请日:2009-05-21

    Abstract: System(s), method(s), and device(s) that can aggregate all or substantially all data traffic, such as wireless data traffic egressing to the Internet, at one or more regional aggregation hubs and capture a portion(s) of data traffic associated with a subscriber(s) of interest at the regional hub(s) are presented. Data traffic associated with subscribers can be aggregated at an access concentrator(s) and respective public Internet Protocol (IP) addresses can be given to respective subscribers. The data traffic can be aggregated at the regional hub(s) and data traffic associated with a subscriber(s) of interest can be identified based at least in part on the public IP address(es) of the respective subscriber(s) of interest. The data traffic associated with a subscriber(s) of interest can be captured and provided to a consumer (e.g., law enforcement, service provider) who desires such data.

    Abstract translation: 可以将所有或基本上所有数据流量(诸如出口到因特网的无线数据流量)聚集在一个或多个区域聚合集线器上的系统,方法和设备,并捕获一部分或多个 呈现与区域中心的一个或多个用户有关的数据业务。 与订户相关联的数据业务可以在接入集中器处聚合,并且可以向相应的订户分配相应的公共因特网协议(IP)地址。 可以在区域集线器处聚合数据业务,并且可以至少部分地基于相关用户的公共IP地址来识别与感兴趣的用户相关联的数据业务 。 可以捕获与感兴趣的用户相关联的数据流量并将其提供给希望这样的数据的消费者(例如,执法部门,服务提供商)。

    Verifying a lawful interception system
    3.
    发明授权
    Verifying a lawful interception system 有权
    验证合法的截取系统

    公开(公告)号:US07975046B2

    公开(公告)日:2011-07-05

    申请号:US12062206

    申请日:2008-04-03

    Applicant: Scott Sheppard

    Inventor: Scott Sheppard

    CPC classification number: H04L63/30

    Abstract: Methods, systems, and computer-readable media provide for verifying a lawful interception system. A first file and a second file are received. The first file is formed by recording data traffic at a computer as the data traffic generated at the computer is transmitted from the computer to a remote network via a broadband remote access server (BRAS), saving the recorded data traffic as a first packet capture and flat file export (PCAP) file, and exporting packet summary lines from the first PCAP file. The second file is formed by intercepting the data traffic as the data traffic egresses from a mediation system to a law enforcement agency (LEA) system, saving the intercepted data traffic as a second PCAP file, and exporting packet summary lines from the second PCAP file. The first file is compared with the second file to verify an accuracy of the mediation system.

    Abstract translation: 方法,系统和计算机可读介质提供了验证合法拦截系统。 接收第一个文件和第二个文件。 当计算机产生的数据业务经由宽带远程接入服务器(BRAS)从计算机发送到远程网络时,通过在计算机上记录数据流量来形成第一个文件,将记录的数据流量保存为第一分组捕获, 平面文件导出(PCAP)文件,并从第一个PCAP文件导出数据包摘要行。 第二个文件是通过在数据流量从中介系统向执法机构(LEA)系统出口时拦截数据流量形成的,将拦截的数据流量保存为第二个PCAP文件,并从第二个PCAP文件导出数据包摘要行 。 将第一个文件与第二个文件进行比较,以验证中介系统的准确性。

    Methods, systems and computer program products for integrating network traffic
    4.
    发明申请
    Methods, systems and computer program products for integrating network traffic 失效
    用于整合网络流量的方法,系统和计算机程序产品

    公开(公告)号:US20080181217A1

    公开(公告)日:2008-07-31

    申请号:US11700311

    申请日:2007-01-31

    CPC classification number: H04L45/50 H04L45/02 H04L45/04 H04L45/54

    Abstract: Methods, systems and computer program products for integrating data in a communications network received at provider (P) routers from provider edge (PE) routers having a plurality of different configurations are provided. Global collection and export parameters for the P routers are configured. A collector associated with the P routers is configured to maintain a netflow exported data table for the P routers based on the global collection and export parameters received from the P routers. P router text files are configured. The P router text files identify all P routers associated with the collector using Internet protocol (IP) addresses associated with each of the P routers. A destination PE router is located for a selected P router based on IP addresses in the P router text file associated with the selected P router such that the interface IP address of the selected P router is matched with the open shortest path first (OSPF) router identification of the destination PE router.

    Abstract translation: 提供了用于将数据集成在从具有多个不同配置的提供商边缘(PE)路由器的提供商(P)路由器处接收的通信网络中的方法,系统和计算机程序产品。 配置P路由器的全局收集和导出参数。 与P路由器相关联的收集器被配置为基于从P路由器接收的全局收集和导出参数来维护P路由器的净流输出数据表。 配置P路由器文本文件。 P路由器文本文件使用与每个P路由器相关联的因特网协议(IP)地址来标识与收集器相关联的所有P路由器。 基于与所选P路由器相关联的P路由器文本文件中的IP地址,为所选择的P路由器定位目的地PE路由器,使得所选择的P路由器的接口IP地址与开放最短路径优先(OSPF)路由器匹配 目的PE路由器的标识。

    Semiconductor devices including self aligned refractory contacts and methods of fabricating the same
    5.
    发明申请
    Semiconductor devices including self aligned refractory contacts and methods of fabricating the same 有权
    包括自对准耐火触点的半导体器件及其制造方法

    公开(公告)号:US20070269968A1

    公开(公告)日:2007-11-22

    申请号:US11434853

    申请日:2006-05-16

    CPC classification number: H01L29/7787 H01L21/3245 H01L29/2003 H01L29/66462

    Abstract: Methods of forming semiconductor devices are provided by forming a semiconductor layer on a semiconductor substrate. A mask is formed on the semiconductor layer. Ions having a first conductivity type are implanted into the semiconductor layer according to the mask to form implanted regions on the semiconductor layer. Metal layers are formed on the implanted regions according to the mask. The implanted regions and the metal layers are annealed in a single step to respectively activate the implanted ions in the implanted regions and provide ohmic contacts on the implanted regions. Related devices are also provided.

    Abstract translation: 通过在半导体衬底上形成半导体层来提供形成半导体器件的方法。 在半导体层上形成掩模。 具有第一导电类型的离子根据掩模注入到半导体层中,以在半导体层上形成注入区域。 根据掩模在注入区域上形成金属层。 注入区域和金属层在单个步骤中退火以分别激活注入区域中的注入离子并在注入区域上提供欧姆接触。 还提供了相关设备。

    Methods of fabricating nitride-based transistors with a cap layer and a recessed gate
    6.
    发明授权
    Methods of fabricating nitride-based transistors with a cap layer and a recessed gate 有权
    制造具有盖层和凹入栅极的基于氮化物的晶体管的方法

    公开(公告)号:US07238560B2

    公开(公告)日:2007-07-03

    申请号:US10897726

    申请日:2004-07-23

    Abstract: An anneal of a gate recess prior to formation of a gate contact, such as a Schottky contact, may reduce gate leakage and/or provide a high quality gate contact in a semiconductor device, such as a transistor. The use of an encapsulation layer during the anneal may further reduce damage to the semiconductor in the gate recess of the transistor. The anneal may be provided, for example, by an anneal of ohmic contacts of the device. Thus, high quality gate and ohmic contacts may be provided with reduced degradation of the gate region that may result from providing a recessed gate structure as a result of etch damage in forming the recess.

    Abstract translation: 在形成诸如肖特基接触之类的栅极接触之前的栅极凹槽的退火可以减少栅极泄漏和/或在诸如晶体管的半导体器件中提供高质量的栅极接触。 在退火期间使用封装层可以进一步降低对晶体管的栅极凹槽中的半导体的损坏。 退火可以例如通过器件的欧姆接触的退火来提供。 因此,可以提供高质量的栅极和欧姆接触,由于在形成凹槽时由于蚀刻损伤而提供凹陷的栅极结构可能导致栅极区域的降低。

    Switch mode power amplifier using MIS-HEMT with field plate extension
    7.
    发明申请
    Switch mode power amplifier using MIS-HEMT with field plate extension 有权
    开关模式功率放大器使用MIS-HEMT与现场板扩展

    公开(公告)号:US20070018210A1

    公开(公告)日:2007-01-25

    申请号:US11187171

    申请日:2005-07-21

    Applicant: Scott Sheppard

    Inventor: Scott Sheppard

    Abstract: Disclosed are a switch mode power amplifier and a field effect transistor especially suitable for use in a switch mode power amplifier. The transistor is preferably a compound high electron mobility transistor (HEMT) having a source terminal and a drain terminal with a gate terminal therebetween and positioned on a dielectric material. A field plate extends from the gate terminal over at least two layers of dielectric material towards the drain. The dielectric layers preferably comprise silicon oxide and silicon nitride. A third layer of silicon oxide can be provided with the layer of silicon nitride being positioned between layers of silicon oxide. Etch selectivity is utilized in etching recesses for the gate terminal.

    Abstract translation: 公开了特别适用于开关模式功率放大器的开关模式功率放大器和场效应晶体管。 晶体管优选为具有源极端子和漏极端子的复合高电子迁移率晶体管(HEMT),栅极端子位于其间并位于电介质材料上。 场板从栅极端子延伸至少两层电介质材料朝向漏极。 电介质层优选包括氧化硅和氮化硅。 可以提供第三层氧化硅层,该氮化硅层位于氧化硅层之间。 蚀刻选择性用于栅极端子的蚀刻凹槽。

    Integrated nitride and silicon carbide-based devices and methods of fabricating integrated nitride-based devices
    8.
    发明申请
    Integrated nitride and silicon carbide-based devices and methods of fabricating integrated nitride-based devices 有权
    基于氮化物和碳化硅的集成器件以及制造基于氮化物的集成器件的方法

    公开(公告)号:US20060289901A1

    公开(公告)日:2006-12-28

    申请号:US11410768

    申请日:2006-04-25

    Abstract: A monolithic electronic device includes a first nitride epitaxial structure including a plurality of nitride epitaxial layers. The plurality of nitride epitaxial layers include at least one common nitride epitaxial layer. A second nitride epitaxial structure is on the common nitride epitaxial layer of the first nitride epitaxial structure. A first plurality of electrical contacts is on the first epitaxial nitride structure and defines a first electronic device in the first nitride epitaxial structure. A second plurality of electrical contacts is on the first epitaxial nitride structure and defines a second electronic device in the second nitride epitaxial structure. A monolithic electronic device includes a bulk semi-insulating silicon carbide substrate having implanted source and drain regions and an implanted channel region between the source and drain regions, and a nitride epitaxial structure on the surface of the silicon carbide substrate. Corresponding methods are also disclosed.

    Abstract translation: 单片电子器件包括包括多个氮化物外延层的第一氮化物外延结构。 多个氮化物外延层包括至少一个共同的氮化物外延层。 第二氮化物外延结构在第一氮化物外延结构的公共氮化物外延层上。 第一多个电触点在第一外延氮化物结构上,并且限定第一氮化物外延结构中的第一电子器件。 第二多个电触点位于第一外延氮化物结构上,并且在第二氮化物外延结构中限定第二电子器件。 单片电子器件包括具有注入的源极和漏极区域以及源极和漏极区域之间的注入沟道区域的半体绝缘碳化硅衬底和在碳化硅衬底的表面上的氮化物外延结构。 还公开了相应的方法。

    Method of forming vias in silicon carbide and resulting devices and circuits
    9.
    发明授权
    Method of forming vias in silicon carbide and resulting devices and circuits 有权
    在碳化硅和所产生的器件和电路中形成通孔的方法

    公开(公告)号:US07125786B2

    公开(公告)日:2006-10-24

    申请号:US11067543

    申请日:2005-02-25

    Abstract: A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding that can otherwise cause undesired inductance. The method includes fabricating a semiconductor device in epitaxial layers on a surface of a silicon carbide substrate and with at least one metal contact for the device on the uppermost surface of the epitaxial layer. The opposite surface of the substrate is then ground and polished until it is substantially transparent. The method then includes masking the polished surface of the silicon carbide substrate to define a predetermined location for at least one via that is opposite the device metal contact on the uppermost surface of the epitaxial layer and etching the desired via in steps. The first etching step etches through the silicon carbide substrate at the desired masked location until the etch reaches the epitaxial layer. The second etching step etches through the epitaxial layer to the device contacts. Finally, metallizing the via provides an electrical path from the first surface of the substrate to the metal contact and to the device on the second surface of the substrate.

    Abstract translation: 公开了一种在碳化硅衬底上制造集成电路的方法,其消除了否则会导致不期望的电感的引线接合。 该方法包括在硅碳化物衬底的表面上制造外延层中的半导体器件,并且在外延层的最上表面上具有用于器件的至少一个金属接触。 然后将基板的相对表面研磨抛光直到基本透明。 该方法然后包括掩盖碳化硅衬底的抛光表面,以限定用于至少一个通孔的预定位置,其与外延层的最上表面上的器件金属接触相对,并在步骤中蚀刻所需的通孔。 第一蚀刻步骤在期望的掩蔽位置上蚀刻通过碳化硅衬底,直到蚀刻到达外延层。 第二蚀刻步骤通过外延层蚀刻到器件触点。 最后,通孔的金属化提供了从衬底的第一表面到金属接触件和衬底的第二表面上的器件的电路径。

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