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    Semiconductor devices
    2.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US11062764B1

    公开(公告)日：2021-07-13

    申请号：US16912350

    申请日：2020-06-25

    Applicant: SK hynix Inc.

    Inventor： Kwang Hun Lee

    IPC: G11C7/00 ,  G11C11/4096 ,  G11C11/4093

    Abstract: A semiconductor device includes a control signal generation circuit and an input/output control circuit. The control signal generation circuit enters a copy operation based on a combination of logic levels of first and second operation control signals and generates a transfer control signal according to a detection result of logic levels of bits included in first internal data during the copy operation. The input/output control circuit generates first data and second data by inverting or non-inverting the logic levels of the first internal data based on the transfer control signal.

    Input buffer circuit
    3.
    发明授权
    Input buffer circuit 有权

    公开(公告)号：US10211819B2

    公开(公告)日：2019-02-19

    申请号：US15924600

    申请日：2018-03-19

    Applicant: SK hynix Inc.

    Inventor： Kwang Hun Lee

    IPC: H03K5/15 ,  H03K5/00

    Abstract: An input buffer circuit is disclosed, which relates to a technology for a receiver circuit including a plurality of input buffers having different characteristics. The input buffer circuit includes a first buffer configured to output a first input signal by buffering a command address received based on a flag signal, a second buffer configured to output a second input signal by buffering the command address based on the flag signal, a first delay matching circuit configured to output a first matching signal by delaying the first input signal by a first delay time, a second delay matching circuit configured to output a second matching signal by delaying the second input signal by a second delay time, and a selection circuit configured to select any one of the first matching signal and the second matching signal based on a selection signal.

    Semiconductor apparatus
    5.
    发明授权
    Semiconductor apparatus 有权

    公开(公告)号：US09859884B2

    公开(公告)日：2018-01-02

    申请号：US15167164

    申请日：2016-05-27

    Applicant: SK hynix Inc.

    Inventor： Kwang Hun Lee

    IPC: H03K17/16 ,  H03K5/04 ,  H04L1/00

    CPC classification number: H03K17/162 ,  H03K5/04 ,  H03K19/00323 ,  H04L1/00

    Abstract: A semiconductor apparatus may include a noise determination circuit, a strobe signal control circuit, and a reception circuit. The noise determination circuit may sense and determine noise of a reference voltage, and generate an up control signal and a down control signal. The strobe signal control circuit may adjust a transition timing of a strobe signal in response to the up control signal and the down control signal, and output a control strobe signal. The reception circuit may generate internal data signal in response to external data signal, the reference voltage, and the control strobe signal.

    Data output method and semiconductor device using the data output method
    6.
    发明授权
    Data output method and semiconductor device using the data output method 有权

    公开(公告)号：US11062749B2

    公开(公告)日：2021-07-13

    申请号：US16905401

    申请日：2020-06-18

    Applicant: SK hynix Inc.

    Inventor： Kwang Hun Lee ,  Sang Sic Yoon

    IPC: G06F11/10 ,  G11C7/22 ,  G11C8/18 ,  G11C7/10 ,  G11C8/12

    Abstract: A semiconductor device includes a read control circuit configured to generate first and second output control signals including pulses which are selectively generated, from first and second strobe signals depending on burst information; and a data output circuit configured to latch first internal data depending on the pulse of the first output control signal, transfer second internal data at a time when the second output control signal level-transitions, and generate output data from the latched first internal data and the transferred second internal data.

    Calculation code generation circuit and digital correction circuit including the same
    7.
    发明授权
    Calculation code generation circuit and digital correction circuit including the same 有权

    公开(公告)号：US10355684B2

    公开(公告)日：2019-07-16

    申请号：US15657005

    申请日：2017-07-21

    Applicant: SK hynix Inc. ,  KUMOH NATIONAL INSTITUTE OF TECHNOLOGY INDUSTRY-ACADEMIC COOPERATION FOUNDATION

    Inventor： Young Chan Jang ,  Pil Ho Lee ,  Kwang Hun Lee ,  Hyun Bae Lee

    IPC: H03K5/24

    Abstract: A calculation code generation circuit performs calibration using a counter, and a digital correction circuit including the same. The calculation code generation circuit performs a calculation process according to first and second modes, the calculation process including generating a first code by sampling a first value of the count code, generating a second code by sampling a second value of the count code, generating first and second calculation codes using the first and second codes in the first and second modes, respectively, and generating, in a calibration disable state, a third calculation code using the first and second calculation codes generated in the first and second modes, respectively, to remove the influence of the comparison offset or comparison performance of a comparator, thereby removing a calibration error.

    Reference voltage generation circuit, receiver, semiconductor apparatus and system using the same
    8.
    发明授权
    Reference voltage generation circuit, receiver, semiconductor apparatus and system using the same 有权

    公开(公告)号：US10216239B2

    公开(公告)日：2019-02-26

    申请号：US15046732

    申请日：2016-02-18

    Applicant: SK hynix Inc.

    Inventor： Kwang Hun Lee

    IPC: G11C7/00 ,  G06F1/26

    Abstract: A reference voltage generation circuit may be provided. The reference voltage generation circuit may be configured to generate a reference voltage according to a voltage set code. The reference voltage generation circuit may include a voltage level stabilizer. The reference voltage generation circuit may be configured to deactivate the voltage level stabilizer when a level of the reference voltage changes based on the voltage set code.

    Input buffer circuit
    9.
    发明授权
    Input buffer circuit 有权

    公开(公告)号：US10116293B2

    公开(公告)日：2018-10-30

    申请号：US15499238

    申请日：2017-04-27

    Applicant: SK hynix Inc.

    Inventor： Kwang Hun Lee

    IPC: H03K5/15 ,  H03K5/00

    Abstract: An input buffer circuit is disclosed, which relates to a technology for a receiver circuit including a plurality of input buffers having different characteristics. The input buffer circuit includes a first buffer configured to output a first input signal by buffering a command address received based on a flag signal, a second buffer configured to output a second input signal by buffering the command address based on the flag signal, a first delay matching circuit configured to output a first matching signal by delaying the first input signal by a first delay time, a second delay matching circuit configured to output a second matching signal by delaying the second input signal by a second delay time, and a selection circuit configured to select any one of the first matching signal and the second matching signal based on a selection signal.

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