公开(公告)号：US09703628B2

公开(公告)日：2017-07-11

申请号：US14831442

申请日：2015-08-20

Applicant: SK hynix Inc.

Inventor： Ju Hyeon Han

IPC: G11C29/00 ,  G06F11/10 ,  G06F12/00 ,  G06F11/00 ,  G11C29/04

CPC classification number: G06F11/1048 ,  G06F11/00 ,  G06F12/00 ,  G11C2029/0411

Abstract: Disclosed is a memory device including: a plurality of memory blocks suitable for storing data; peripheral circuits suitable for temporarily storing data read from a selected memory block, performing a randomization operation to the read data, and performing an ECC decoding operation to the randomized data; and a control logic suitable for controlling the peripheral circuits to repeat the randomization operation and the ECC decoding operation until the ECC decoding operation is successful, and a system including the same.

公开(公告)号：US09646707B1

公开(公告)日：2017-05-09

申请号：US15240810

申请日：2016-08-18

Applicant: SK hynix Inc.

Inventor： Chan Woo Yang ,  Jong Won Park ,  Ju Hyeon Han

IPC: G11C16/10 ,  G11C16/26 ,  G11C16/08 ,  G11C16/16

CPC classification number: G11C16/26 ,  G11C11/5642 ,  G11C16/08 ,  G11C16/16

Abstract: A data storage device includes a nonvolatile memory device including a nonvolatile memory device including a plurality of memory blocks each having a plurality of memory cells and a controller suitable for determining whether a target memory block for a read operation among the memory blocks is an open block, adjusting a pass bias to be applied to unselected memory cells during the read operation for the target memory block, according to a result of the determination, and controlling the nonvolatile memory device to perform the read operation using the adjusted pass bias.

公开(公告)号：US11295830B2

公开(公告)日：2022-04-05

申请号：US16865039

申请日：2020-05-01

Applicant: SK hynix Inc.

Inventor： Ju Hyeon Han

IPC: G11C29/44 ,  G06F3/06 ,  G06F11/10 ,  G11C16/04 ,  G11C16/10 ,  G11C11/56

Abstract: There are provided a memory system and an operating method of the memory system. The memory system includes: a memory device including a plurality of memory blocks; and a memory controller for controlling the memory device to detect an initial bad block by performing an initial test operation on the plurality of memory blocks. The memory controller registers and manages, as a weak memory block, memory blocks physically adjacent to the detected initial bad block.

公开(公告)号：US09727401B2

公开(公告)日：2017-08-08

申请号：US14815143

申请日：2015-07-31

Applicant: SK hynix Inc.

Inventor： Ju Hyeon Han

IPC: G06F11/07

CPC classification number: G06F11/076 ,  G06F11/073

Abstract: Disclosed is a method of operating a semiconductor memory device including a plurality of pages, including: receiving a program command, an address, and program data; reading page data from a selected page corresponding to the address in response to the program command; determining whether the number of bits of data corresponding to a program state among the page data is greater than a threshold value; and outputting a state fail signal without performing a program operation on the selected page based on a result of the determination.

公开(公告)号：US11127475B2

公开(公告)日：2021-09-21

申请号：US16291713

申请日：2019-03-04

Applicant: SK hynix Inc.

Inventor： Ju Hyeon Han

IPC: G11C16/04 ,  G11C16/34 ,  G11C16/10 ,  G11C16/26 ,  G11C16/08 ,  G11C29/50 ,  G11C16/30

Abstract: Provided herein may be a memory device and a method of operating the same. The memory device may include: a memory block including a plurality of select transistors; a peripheral circuit configured to perform a program operation and a read operation on the memory block; and control logic configured to control the peripheral circuits to perform the program operation and the read operation, and to adjust and set a potential level of a select transistor operating voltage to be applied to the plurality of select transistors based on a threshold voltage monitoring operation on the plurality of select transistors.

公开(公告)号：US10249383B2

公开(公告)日：2019-04-02

申请号：US15447310

申请日：2017-03-02

Applicant: SK hynix Inc.

Inventor： Ju Hyeon Han ,  Jong Won Park ,  Chan Woo Yang

IPC: G11C29/00 ,  G11C29/50 ,  G06F11/10 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C29/02 ,  G11C29/42 ,  G11C29/52 ,  G11C16/34

Abstract: A data storage device includes a nonvolatile memory device; and a control unit suitable for controlling a program operation for memory cells of a page of the nonvolatile memory device, and processing a program fail in the case where the program operation fails, wherein the control unit adjusts a read voltage for discriminating an erase state and a program state having a threshold voltage most adjacent to the erase state, reads out data by applying the adjusted read voltage to the memory cells of the page, and performs an error handling operation to data stored in the memory cells of the page according to a result of comparing a reference value and a number of flipped bits of the data read out by applying the varied read voltage.

公开(公告)号：US09569142B2

公开(公告)日：2017-02-14

申请号：US14696003

申请日：2015-04-24

Applicant: SK hynix Inc.

Inventor： Ju Hyeon Han

IPC: G11C16/34 ,  G06F3/06 ,  G11C16/00 ,  G11C16/10

CPC classification number: G06F3/0679 ,  G06F3/0619 ,  G06F3/064 ,  G11C16/00 ,  G11C16/10 ,  G11C16/3431 ,  G11C16/3495

Abstract: A semiconductor device and a method of operating the same are provided. The method includes determining the degree of deterioration of a selected memory block, performing a program operation of the selected memory block in a first program operating condition when it is determined that the selected memory block is not deteriorated and performing the program operation of the selected memory block in a second program operating condition when it is determined that the selected memory is deteriorated, and updating the program operating time of the selected memory block.

Abstract translation: 提供半导体器件及其操作方法。 该方法包括：当确定所选择的存储块不恶化并执行所选存储器的编程操作时，确定所选存储块的劣化程度，在第一程序操作条件下执行所选存储块的编程操作 当确定所选择的存储器恶化并更新所选择的存储块的程序操作时间时，在第二程序操作条件下阻止。

公开(公告)号：US09564189B2

公开(公告)日：2017-02-07

申请号：US15066559

申请日：2016-03-10

Applicant: SK hynix Inc.

Inventor： Ju Hyeon Han

IPC: G11C7/00 ,  G11C7/20 ,  G11C16/34 ,  G11C11/56

CPC classification number: G11C16/3468 ,  G11C7/20 ,  G11C11/5621 ,  G11C11/5628 ,  G11C13/0069 ,  G11C16/10 ,  G11C16/3481 ,  G11C16/3486 ,  G11C29/1201 ,  G11C2013/0076 ,  G11C2211/5621 ,  G11C2211/5624 ,  G11C2216/14

Abstract: A method of programming a memory system includes: reading a target page included in a selected memory block in response to a program request when at least one of the pages included in the selected memory block contains data; and performing a program for the target page when, among the data bits included in the data read from the target page, the number of data bits having a first logic value is equal to or less than a preset value.

Abstract translation: 一种对存储器系统进行编程的方法包括：当所选择的存储器块中包含的至少一个页面包含数据时，响应于程序请求读取所选存储器块中包括的目标页面; 以及当从所述目标页面读取的数据中包括的数据位之中，具有第一逻辑值的数据位的数量等于或小于预设值时，执行所述目标页面的程序。