Abstract:
A method for manufacturing a metal oxide TFT device is provided. The method includes: selecting a substrate and forming a gate electrode on a first side of the substrate; sequentially depositing an insulating layer, a semiconductor layer, and a photoresist layer on the gate electrode; using the gate electrode as a photomask, exposing from a second side of the substrate and reserving the photoresist layer aligning to the gate electrode; depositing an electrode layer on the semiconductor layer and the reserved photoresist layer; stripping the reserved photoresist layer and lifting off the electrode layer stacked on the reserved photoresist layer; etching a part of the reserved electrode layer and the semiconductor layer, and forming a source electrode, a drain electrode, and a semiconductor island. The method realizes a self-alignment using the gate electrode as the photomask when forming the source, drain electrodes and the channel. Therefore, the manufacturing processes become simple and more accurate.
Abstract:
The present invention is applicable to the field of electronic component technologies and provides a manufacturing method of a self-aligned metal oxide TFT component, including: selecting a substrate and preparing a gate on the substrate; successively disposing an insulation layer, a transparent electrode layer, and a photoresist on the gate; using the gate as a mask to perform exposure from a back side of the substrate, so as to form a source and a drain that are aligned with the gate; depositing a metal oxide semiconductor layer on the transparent electrode layer; performing etching on the semiconductor layer, the source, and the drain, so that outer ends of the source and the drain are exposed out of the metal oxide semiconductor layer; and depositing a passivation layer and leading out the source and the drain. In the present invention, a transparent conductor is used as the electrode layer, and a bottom gate is used as a mask to perform back exposure, so as to perform etching on the source and the drain, thereby implementing a self-alignment between the source or the drain and the gate, effectively reducing parasitic capacitance, and improving component performance. The component is of a bottom-gate bottom-contact structure, and there is no need to manufacture an etch-stop layer, thereby simplifying a process, reducing use of a photolithographic mask, improving production efficiency, and improving an electrical property of the component.
Abstract:
The present invention is suitable to the field of electronic technology, and provides a method of manufacturing a thin film transistor and a pixel unit thereof, wherein when the thin film transistor is manufactured, the gate metal layer is used as a mask, and exposed from the back of the substrate to position the channel and the source and drain of the thin film transistor, so that the channel is self-aligned with the gate, and the source and drain are self-aligned with the gate and are symmetrical, and the thin film transistor thus manufactured has a small parasitic capacitance, and the circuit manufactured therewith is fast in operation, and less prone to occurring short circuit or open circuit. In the present invention, the characteristics that the channel is self-aligned with the gate, and the source and drain are self-aligned with the gate and are symmetrical avoid the alignment precision requirement on the mask plate in the production, thus reducing the need for the high precision lithographic apparatus, and reducing the costs and increasing the yield. In addition, the present process is suitable for manufacturing a pixel unit of a thin film transistor, the manufacturing process only requires four mask sets which do not require the critical alignment. As compared with other four mask processes which use the gray tone masks, the present process can increase the yield and reduce the costs.
Abstract:
The present invention provides a method of manufacturing a thin film transistor pixel unit, comprising: forming a metal oxide layer, a gate insulating layer, a gate metal layer and an etching barrier layer on a substrate, wherein the metal oxide layer is in a thin film transistor region; through a same mask, etching a part of the etching barrier layer, the gate metal layer and the gate insulating layer on the substrate for forming a gate region, source and drain regions for forming contact vias, a gate interface region, and a storage capacitor region, respectively. Through additional steps including etching, metallizing, and filling, a source contact via is formed in the source region, a drain contact via is formed in the drain region, and a connecting contact via is formed in the gate interface region, respectively.
Abstract:
Disclosed are a pixel circuit and a method for driving the pixel circuit. The pixel circuit includes a light-emitting diode; a driving transistor; a first transistor connected between a data line and the driving transistor, a gate electrode of the first transistor being connected to a first scanning line; a second transistor connected between a first power line and the driving transistor, a gate electrode of the second transistor being connected to a second scanning line; a third transistor connected between a gate electrode of the driving transistor and the second transistor, a gate electrode of the third transistor being connected to a third scanning line; and a driving capacitor connected between the gate electrode of the driving transistor and the first power line, in which the driving transistor is further connected to a second power line via the light-emitting diode.
Abstract:
A double-sided display and a method for controlling the same are provided. The double-sided display includes a plurality of pixel units and a plurality of circuits. The pixel units are disposed on each of a front side and a back side of the double-sided display, and the pixel units on the front side are opposite to the pixel units on the back side in a one-to-one manner. A pixel unit on the front side and a pixel unit on the back side opposite to the pixel unit on the front side are controlled by an identical circuit. Each of the circuits includes a switching transistor. The switching transistor includes a first input terminal connected to a scan line, a second input terminal connected to a data line, and an output terminal connected to the opposite pixel units on the front side and the back side.
Abstract:
The present invention provides a method of manufacturing a thin film transistor pixel unit, comprising: forming a metal oxide layer, a gate insulating layer, a gate metal layer and an etching barrier layer on a substrate, wherein the metal oxide layer is in a thin film transistor region; through a same mask, etching a part of the etching barrier layer, the gate metal layer and the gate insulating layer on the substrate for forming a gate region, source and drain regions for forming contact vias, a gate interface region, and a storage capacitor region, respectively. Through additional steps including etching, metallizing, and filling, a source contact via is formed in the source region, a drain contact via is formed in the drain region, and a connecting contact via is formed in the gate interface region, respectively.
Abstract:
A method for fabricating a flexible electronic device, including the steps of: providing channels on a rigid substrate; adhering a flexible substrate to the rigid substrate with an adhesive; fabricating an electronic device on the flexible substrate; injecting a chemical substance into the channels; and reacting the chemical substance with the adhesive and peeling the flexible substrate from the rigid substrate. The rigid substrate comprises a first surface, a second surface opposite the first surface, and a side wall extending between the first surface and the second surface. The channels are provided on the first surface of the rigid substrate. The channels are in communication with an injection port, the injection port is located on the side wall of the rigid substrate, and a portion of the side wall is located between the injection port and the first surface.
Abstract:
A capacitive touchscreen includes a substrate and a transparent conductive layer arranged on the substrate. The conductive layer includes a sensing area. The sensing area has a first side and a second side opposite to the first side. The capacitive touchscreen further includes multiple transparent and conductive first electrodes, multiple transparent and conductive second electrodes, and transparent and nonconductive patterns. Each first electrode includes a first trunk extending from the first side toward the second side. Each second electrode includes a second trunk and a wiring coupled to the second trunk. Both the second trunk and the wiring extend from the first side toward the second side, and each second trunk cooperates with a corresponding first trunks to be operable to sense a touched position. The transparent and nonconductive patterns are located between the first and second electrodes to electrically isolate the first electrodes from the second electrodes.
Abstract:
A thin film transistor (TFT) array substrate structure based on organic light-emitting diodes (OLEDs) may include multiple sets of TFT components, capacitors, common electrodes, and data signal lines, all of which are formed on a substrate. Each set of TFT components includes a driving TFT, and the driving TFT has a gate, a source, and a drain. A drain frame extends from the drain and surrounds a pixel block of the TFT array substrate structure, and a transparent conductive film is arranged in a region surrounded by the drain frame and is in contact with the drain frame.