公开(公告)号：US10770332B2

公开(公告)日：2020-09-08

申请号：US16293099

申请日：2019-03-05

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. Truhitte ,  James P. Letterman, Jr.

IPC: H01L21/78 ,  H01L21/683 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L23/36 ,  H01L23/495 ,  H01L25/065 ,  H01L25/10

Abstract: Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.

公开(公告)号：US10269609B2

公开(公告)日：2019-04-23

申请号：US15883625

申请日：2018-01-30

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. Truhitte ,  James P. Letterman, Jr.

IPC: H01L21/78 ,  H01L23/495 ,  H01L23/31 ,  H01L21/683 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L23/36 ,  H01L25/065 ,  H01L25/10

Abstract: Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.

公开(公告)号：US10756006B2

公开(公告)日：2020-08-25

申请号：US16230494

申请日：2018-12-21

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. Truhitte ,  Soon Wei Wang ,  Chee Hiong Chew

IPC: H01L23/495 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31

Abstract: A leadframe includes a frame, a die pad, a contact including a flank adjacent to the frame, a first tie bar between the frame and die pad, and a second tie bar between the die pad and contact. The leadframe is disposed over a carrier. A semiconductor die is disposed over the die pad. An encapsulant is deposited over the leadframe and semiconductor die including between the carrier and half-etched portions of the leadframe. A first trench is formed in the encapsulant to remove a portion of the frame and expose the flank of the contact. A conductive layer is formed over the flank by electroplating. A second trench is formed in the encapsulant through the second tie bar after forming the conductive layer.

公开(公告)号：US10199311B2

公开(公告)日：2019-02-05

申请号：US15415504

申请日：2017-01-25

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. Truhitte ,  Soon Wei Wang ,  Chee Hiong Chew

IPC: H01L21/48 ,  H01L23/495 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

Abstract: A leadframe includes a frame, a die pad, a contact including a flank adjacent to the frame, a first tie bar between the frame and die pad, and a second tie bar between the die pad and contact. The leadframe is disposed over a carrier. A semiconductor die is disposed over the die pad. An encapsulant is deposited over the leadframe and semiconductor die including between the carrier and half-etched portions of the leadframe. A first trench is formed in the encapsulant to remove a portion of the frame and expose the flank of the contact. A conductive layer is formed over the flank by electroplating. A second trench is formed in the encapsulant through the second tie bar after forming the conductive layer.

公开(公告)号：US10707111B2

公开(公告)日：2020-07-07

申请号：US16293201

申请日：2019-03-05

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. Truhitte ,  James P. Letterman, Jr.

IPC: H01L23/00 ,  H01L21/683 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48 ,  H01L23/36 ,  H01L23/495 ,  H01L25/065 ,  H01L25/10 ,  H01L21/78

Abstract: Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.

公开(公告)号：US09659876B1

公开(公告)日：2017-05-23

申请号：US15203599

申请日：2016-07-06

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. Truhitte

IPC: H01L21/302 ,  H01L23/544

CPC classification number: H01L23/544 ,  H01L2223/54406 ,  H01L2223/54433 ,  H01L2223/5448 ,  H01L2223/54486

Abstract: A method of wafer-scale marking includes coupling a first marking mask over a semiconductor wafer having unsingulated semiconductor devices thereon. The first marking mask has a plurality of first stencils therethrough and a surface of the wafer is plasma etched through the first stencils to form first markings in the surface. A second marking mask is coupled over the surface and includes a plurality of second stencils therethrough. The surface is plasma etched through the second stencils to form second markings in the surface. In implementations the first marking mask and second marking mask are simultaneously coupled over the surface and the first markings and second markings are simultaneously formed. In implementations a plurality of first windows of the first marking mask are aligned with the plurality of second stencils while a plurality of second windows of the second marking mask are aligned with the plurality of first stencils.

公开(公告)号：US10399756B2

公开(公告)日：2019-09-03

申请号：US16126614

申请日：2018-09-10

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. Truhitte

IPC: B65D73/02

Abstract: A carrier tape system, in some embodiments, comprises: a tape; a series of index holes along a length of said tape; a series of pockets along said length; a first series of standoff units along said length; and a second series of standoff units along said length, wherein the series of pockets is positioned between the first series of standoff units and the second series of standoff units, wherein the standoff units create a clearance space between the bottom surfaces of said pockets and the tape when said tape is wound on a reel.

公开(公告)号：US10103072B2

公开(公告)日：2018-10-16

申请号：US15240835

申请日：2016-08-18

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. Truhitte ,  James P. Letterman, Jr.

IPC: H01L21/66 ,  H01L21/268 ,  H01L23/00

Abstract: A method, in some embodiments, comprises: providing a component having first and second electrical nodes; determining that the component lacks multiple, functional electrical couplings between said first and second nodes; damaging at least part of the component as a result of said determination; and determining, as a result of said damage, that the component is defective.

公开(公告)号：US10093468B2

公开(公告)日：2018-10-09

申请号：US15158424

申请日：2016-05-18

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. Truhitte

IPC: B65D73/02

Abstract: A carrier tape system, in some embodiments, comprises: a tape; a series of index holes along a length of said tape; a series of pockets along said length; a first series of standoff units along said length; and a second series of standoff units along said length, wherein the series of pockets is positioned between the first series of standoff units and the second series of standoff units, wherein the standoff units create a clearance space between the bottom surfaces of said pockets and the tape when said tape is wound on a reel.

公开(公告)号：US11145581B2

公开(公告)日：2021-10-12

申请号：US16194734

申请日：2018-11-19

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Darrell D. Truhitte ,  James P. Letterman, Jr.

IPC: H01L23/495 ,  H01L23/498 ,  H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L21/60

Abstract: A leadless package with wettable flanks is formed by providing a substrate and plating a metal layer onto the substrate to form a contact on the substrate extending across a saw street. An encapsulant is deposited over the contact. The substrate is removed to expose the contact and encapsulant. The encapsulant and contact are singulated. In some embodiments, the substrate includes a ridge, and the contact is formed over the ridge.