-
公开(公告)号：US20220173747A1
公开(公告)日：2022-06-02
申请号：US17675730
申请日：2022-02-18
Applicant: Mythic, Inc.
Inventor： Laura Fick , Manar El-Chammas , Skylar Skrzyniarz , David Fick
Abstract: A mixed-signal integrated circuit that includes: a global reference signal source; a first summation node and a second summation node; a plurality of distinct pairs of current generating circuits arranged along the first summation node and the second summation node; a first current generating circuit of each of the plurality of distinct pairs that is arranged on the first summation node and a second current generating circuit of each of the plurality of distinct pairs is arranged on the second summation node; a common-mode current circuit that is arranged in electrical communication with each of the first and second summation nodes; where a local DAC adjusts a differential current between the first second summation nodes based on reference signals from the global reference source; and a comparator or a finite state machine that generates a binary output value current values obtained from the first and second summation nodes.
-
公开(公告)号：US10977339B2
公开(公告)日：2021-04-13
申请号：US16683515
申请日：2019-11-14
Applicant: Mythic, Inc.
Inventor： David Fick , Michael Henry , Laura Fick , Malav Parikh , Skylar Skrzyniarz , Scott Johnson , Pei-Ci Wu , Andrew Morten
Abstract: Systems and methods of configuring a fixed memory array of an integrated circuit with coefficients of one or more applications includes identifying a utilization constraint type of the fixed memory array from a plurality of distinct utilization constraint types based on computing attributes of the one or more applications; identifying at least one coefficient mapping technique from a plurality of distinct coefficient mapping techniques that addresses the utilization constraint type; configuring the fixed memory array according to the at least one coefficient mapping technique, wherein configuring the array includes at least setting within the array the coefficients of the one or more applications in an arrangement prescribed by the at least one coefficient mapping technique that optimizes a computational utilization of the fixed memory array.
-
公开(公告)号：US20200083897A1
公开(公告)日：2020-03-12
申请号：US16683553
申请日：2019-11-14
Applicant: Mythic, Inc.
Inventor： Laura Fick , Manar El-Chammas , Skylar Skrzyniarz , David Fick
Abstract: A mixed-signal integrated circuit that includes: a global reference signal source; a first summation node and a second summation node; a plurality of distinct pairs of current generating circuits arranged along the first summation node and the second summation node; a first current generating circuit of each of the plurality of distinct pairs that is arranged on the first summation node and a second current generating circuit of each of the plurality of distinct pairs is arranged on the second summation node; a common-mode current circuit that is arranged in electrical communication with each of the first and second summation nodes; where a local DAC adjusts a differential current between the first second summation nodes based on reference signals from the global reference source; and a comparator or a finite state machine that generates a binary output value current values obtained from the first and second summation nodes.
-
公开(公告)号：US20230359571A1
公开(公告)日：2023-11-09
申请号：US18217230
申请日：2023-06-30
Applicant: Mythic, Inc.
Inventor： Laura Fick , Manar El-Chammas , Skylar Skrzyniarz , David Fick
CPC classification number: G06F13/102 , G06F1/14 , G06N3/04 , H03M1/48 , G06F9/3001 , H03M1/662
Abstract: Systems and methods of implementing a mixed-signal integrated circuit includes sourcing, by a reference signal source, a plurality of analog reference signals along a shared signal communication path to a plurality of local accumulators; producing an electrical charge, at each of the plurality of local accumulators, based on each of the plurality of analog reference signals; adding or subtracting, by each of the plurality of local accumulators, the electrical charge to an energy storage device of each of the plurality of local accumulators over a predetermined period; summing along the shared communication path the electrical charge from the energy storage device of each of the plurality of local accumulators at an end of the predetermined period; and generating an output based on a sum of the electrical charge from each of the plurality of local accumulators.
-
公开(公告)号：US10903844B2
公开(公告)日：2021-01-26
申请号：US16683553
申请日：2019-11-14
Applicant: Mythic, Inc.
Inventor： Laura Fick , Manar El-Chammas , Skylar Skrzyniarz , David Fick
Abstract: A mixed-signal integrated circuit that includes: a global reference signal source; a first summation node and a second summation node; a plurality of distinct pairs of current generating circuits arranged along the first summation node and the second summation node; a first current generating circuit of each of the plurality of distinct pairs that is arranged on the first summation node and a second current generating circuit of each of the plurality of distinct pairs is arranged on the second summation node; a common-mode current circuit that is arranged in electrical communication with each of the first and second summation nodes; where a local DAC adjusts a differential current between the first second summation nodes based on reference signals from the global reference source; and a comparator or a finite state machine that generates a binary output value current values obtained from the first and second summation nodes.
-
Patent Agency Ranking
公开(公告)号：US10452745B2
公开(公告)日：2019-10-22
申请号：US16392979
申请日：2019-04-24
Applicant: Mythic, Inc.
Inventor： David Fick , Michael Henry , Laura Fick , Malav Parikh , Skylar Skrzyniarz , Scott Johnson , Pei-Ci Wu , Andrew Morten
Abstract: Systems and methods of configuring a fixed memory array of an integrated circuit with coefficients of one or more applications includes identifying a utilization constraint type of the fixed memory array from a plurality of distinct utilization constraint types based on computing attributes of the one or more applications; identifying at least one coefficient mapping technique from a plurality of distinct coefficient mapping techniques that addresses the utilization constraint type; configuring the fixed memory array according to the at least one coefficient mapping technique, wherein configuring the array includes at least setting within the array the coefficients of the one or more applications in an arrangement prescribed by the at least one coefficient mapping technique that optimizes a computational utilization of the fixed memory array.
-
公开(公告)号：US10389375B1
公开(公告)日：2019-08-20
申请号：US16285619
申请日：2019-02-26
Applicant: Mythic, Inc.
Inventor： Laura Fick , Manar El-Chammas , Skylar Skrzyniarz , David Fick
Abstract: A mixed-signal integrated circuit that includes: a global reference signal source; a first summation node and a second summation node; a plurality of distinct pairs of current generating circuits arranged along the first summation node and the second summation node; a first current generating circuit of each of the plurality of distinct pairs that is arranged on the first summation node and a second current generating circuit of each of the plurality of distinct pairs is arranged on the second summation node; a common-mode current circuit that is arranged in electrical communication with each of the first and second summation nodes; where a local DAC adjusts a differential current between the first second summation nodes based on reference signals from the global reference source; and a comparator or a finite state machine that generates a binary output value current values obtained from the first and second summation nodes.
-
公开(公告)号：US20190188241A1
公开(公告)日：2019-06-20
申请号：US16222277
申请日：2018-12-17
Applicant: Mythic, Inc.
Inventor： David Fick , Michael Henry , Laura Fick , Malav Parikh , Skylar Skrzyniarz , Scott Johnson , Pei-Ci Wu , Andrew Morten
Abstract: Systems and methods of configuring a fixed memory array of an integrated circuit with coefficients of one or more applications includes identifying a utilization constraint type of the fixed memory array from a plurality of distinct utilization constraint types based on computing attributes of the one or more applications; identifying at least one coefficient mapping technique from a plurality of distinct coefficient mapping techniques that addresses the utilization constraint type; configuring the fixed memory array according to the at least one coefficient mapping technique, wherein configuring the array includes at least setting within the array the coefficients of the one or more applications in an arrangement prescribed by the at least one coefficient mapping technique that optimizes a computational utilization of the fixed memory array.
-
公开(公告)号：US20220414025A1
公开(公告)日：2022-12-29
申请号：US17900363
申请日：2022-08-31
Applicant: Mythic, Inc.
Inventor： Laura Fick , Manar El-Chammas , Skylar Skrzyniarz , David Fick
Abstract: Systems and methods of implementing a mixed-signal integrated circuit includes sourcing, by a reference signal source, a plurality of analog reference signals along a shared signal communication path to a plurality of local accumulators; producing an electrical charge, at each of the plurality of local accumulators, based on each of the plurality of analog reference signals; adding or subtracting, by each of the plurality of local accumulators, the electrical charge to an energy storage device of each of the plurality of local accumulators over a predetermined period; summing along the shared communication path the electrical charge from the energy storage device of each of the plurality of local accumulators at an end of the predetermined period; and generating an output based on a sum of the electrical charge from each of the plurality of local accumulators.
-
公开(公告)号：US11467984B2
公开(公告)日：2022-10-11
申请号：US16280317
申请日：2019-02-20
Applicant: Mythic, Inc.
Inventor： Laura Fick , Manar El-Chammas , Skylar Skrzyniarz , David Fick
Abstract: Systems and methods of implementing a mixed-signal integrated circuit includes sourcing, by a reference signal source, a plurality of analog reference signals along a shared signal communication path to a plurality of local accumulators; producing an electrical charge, at each of the plurality of local accumulators, based on each of the plurality of analog reference signals; adding or subtracting, by each of the plurality of local accumulators, the electrical charge to an energy storage device of each of the plurality of local accumulators over a predetermined period; summing along the shared communication path the electrical charge from the energy storage device of each of the plurality of local accumulators at an end of the predetermined period; and generating an output based on a sum of the electrical charge from each of the plurality of local accumulators.
-
-
-
-
-
-
-
-
-
Search Results
25
records
(took 0.02 seconds)
