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    Burst-mode time-of-flight imaging
    1.
    发明授权
    Burst-mode time-of-flight imaging 有权
    突发模式飞行时间成像

    公开(公告)号：US09497440B2

    公开(公告)日：2016-11-15

    申请号：US13857946

    申请日：2013-04-05

    Applicant: MICROSOFT TECHNOLOGY LICENSING, LLC

    Inventor： Cyrus Bamji ,  Tamer Elkhatib ,  Swati Mehta ,  Zhanping Xu

    IPC: H04N13/02 ,  G01S17/36 ,  G01S17/89 ,  G01S7/486 ,  H01L27/146

    CPC classification number: H04N13/204 ,  G01S7/4863 ,  G01S7/4865 ,  G01S17/36 ,  G01S17/89 ,  H01L27/14609

    Abstract: An imager includes an emitter, an array of pixel elements, and driver logic. The emitter releases bursts of light pulses with pauses between bursts. Each element of the array has a finger gate biasable to attract charge to the surface, a reading node to collect the charge, and a transfer gate to admit such charge to the reading node and to deter such charge from being absorbed into the finger gate. The driver logic biases the finger gates with the modulated light pulses such that the finger gates of adjacent first and second elements cycle with unequal phase into and out of a charge-attracting state. To reduce the effects of ambient light on the imager, the driver logic is configured to bias the transfer gates so that the charge is admitted to the reading node only during the bursts and is prevented from reaching the reading node during the pauses.

    Abstract translation: 成像器包括发射器，像素元件阵列和驱动器逻辑。 发射器在脉冲串之间暂停时发射脉冲串。 该阵列的每个元件具有可偏置以将电荷吸引到表面的指状栅极，用于收集电荷的读取节点以及用于将该电荷允许到读取节点的传输门，并阻止该电荷被吸收到手指栅极中。 驱动器逻辑利用调制的光脉冲偏置手指门，使得相邻的第一和第二元件的指状栅极以不相等的相位进入和移出电荷吸引状态。 为了减少环境光对成像器的影响，驱动器逻辑被配置为偏置传输门，使得仅在突发期间才允许电荷进入读取节点，并且在暂停期间被阻止到达读取节点。

    Readout voltage uncertainty compensation in time-of-flight imaging pixels
    4.
    发明授权
    Readout voltage uncertainty compensation in time-of-flight imaging pixels 有权

    公开(公告)号：US10742912B2

    公开(公告)日：2020-08-11

    申请号：US16503896

    申请日：2019-07-05

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Cyrus Soli Bamji ,  Onur Can Akkaya ,  Tamer Elkhatib ,  Swati Mehta ,  Satyadev H. Nagaraja ,  Vijay Rajasekaran

    IPC: H04N5/363 ,  H01L27/146 ,  G01S7/481 ,  G01S17/89

    Abstract: Pixel arrangements in time-of-flight sensors are presented that include sensing elements that establish charges related to incident light, charge storage elements that accumulate integrated charges transferred from the sensing elements, and diffusion nodes configured to establish measurement voltages representative of the integrated charges that are dumped from the charge storage elements. The pixel arrangement includes analog domain output circuitry comprising a measurement capacitance element that stores the measurement voltage, and a reset capacitance element that stores a reset voltage established at the diffusion node during a reset phase performed prior to a measurement phase. The analog domain output circuitry subtracts the stored reset voltage from the stored measurement voltage for processing into a pixel output voltage that at least partially reduces readout voltage uncertainty of the pixel arrangement.

    Readout voltage uncertainty compensation in time-of-flight imaging pixels
    5.
    发明授权
    Readout voltage uncertainty compensation in time-of-flight imaging pixels 有权

    公开(公告)号：US10389957B2

    公开(公告)日：2019-08-20

    申请号：US15385198

    申请日：2016-12-20

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Cyrus Soli Bamji ,  Onur Can Akkaya ,  Tamer Elkhatib ,  Swati Mehta ,  Satyadev H. Nagaraja ,  Vijay Rajasekaran

    IPC: H04N5/363 ,  G01S17/89 ,  G01S7/481 ,  H01L27/146

    Abstract: Pixel arrangements in time-of-flight sensors are presented that include sensing elements that establish charges related to incident light, charge storage elements that accumulate integrated charges transferred from the sensing elements, and diffusion nodes configured to establish measurement voltages representative of the integrated charges that are dumped from the charge storage elements. The pixel arrangement includes analog domain output circuitry comprising a measurement capacitance element that stores the measurement voltage, and a reset capacitance element that stores a reset voltage established at the diffusion node during a reset phase performed prior to a measurement phase. The analog domain output circuitry subtracts the stored reset voltage from the stored measurement voltage for processing into a pixel output voltage that at least partially reduces readout voltage uncertainty of the pixel arrangement.

    READOUT VOLTAGE UNCERTAINTY COMPENSATION IN TIME-OF-FLIGHT IMAGING PIXELS
    6.
    发明申请
    READOUT VOLTAGE UNCERTAINTY COMPENSATION IN TIME-OF-FLIGHT IMAGING PIXELS 审中-公开

    公开(公告)号：US20190335124A1

    公开(公告)日：2019-10-31

    申请号：US16503896

    申请日：2019-07-05

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Cyrus Soli Bamji ,  Onur Can Akkaya ,  Tamer Elkhatib ,  Swati Mehta ,  Satyadev H. Nagaraja ,  Vijay Rajasekaran

    IPC: H04N5/363 ,  G01S7/481 ,  G01S17/89

    Abstract: Pixel arrangements in time-of-flight sensors are presented that include sensing elements that establish charges related to incident light, charge storage elements that accumulate integrated charges transferred from the sensing elements, and diffusion nodes configured to establish measurement voltages representative of the integrated charges that are dumped from the charge storage elements. The pixel arrangement includes analog domain output circuitry comprising a measurement capacitance element that stores the measurement voltage, and a reset capacitance element that stores a reset voltage established at the diffusion node during a reset phase performed prior to a measurement phase. The analog domain output circuitry subtracts the stored reset voltage from the stored measurement voltage for processing into a pixel output voltage that at least partially reduces readout voltage uncertainty of the pixel arrangement.

    CMOS Image Sensor With A Reduced Likelihood Of An Induced Electric Field In The Epitaxial Layer
    8.
    发明申请
    CMOS Image Sensor With A Reduced Likelihood Of An Induced Electric Field In The Epitaxial Layer 有权
    CMOS图像传感器在外延层中诱导电场的降低似然

    公开(公告)号：US20170005124A1

    公开(公告)日：2017-01-05

    申请号：US14788224

    申请日：2015-06-30

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Tamer Elkhatib ,  Vei-Han Chan ,  William Qian ,  Onur Can Akkaya ,  Swati Mehta ,  Cyrus Bamji

    IPC: H01L27/146

    CPC classification number: H01L27/14607 ,  G01S7/4816 ,  H01L21/0234 ,  H01L21/02348 ,  H01L21/30 ,  H01L27/14609 ,  H01L27/14632 ,  H01L27/14649 ,  H01L27/14685 ,  H01L27/14687 ,  H01L27/14689

    Abstract: A CMOS time-of-flight image sensor must be robust to interface traps and fixed charges which may be present due to fabrication and which may cause an undesired induced electric field in the silicon substrate. This undesired induced electrical field is reduced by introducing a hydrogen-enriched dielectric material. Further remedial techniques can include applying ultraviolet light and/or performing a plasma treatment. Another possible approach adds a passivation doping layer at a top of the detector as a shield against the undesired induced electric field. One or more of the above techniques can be used to prevent any unstable behavior of the time-of-flight sensor.

    Abstract translation: CMOS飞行时间图像传感器必须对由于制造可能存在的接口陷阱和固定电荷而鲁棒，并且可能在硅衬底中引起不期望的感应电场。 通过引入富氢介电材料来减少该不希望的感应电场。 进一步的补救技术可以包括施加紫外光和/或进行等离子体处理。 另一种可能的方法在检测器的顶部添加钝化掺杂层作为防止不期望的感应电场的屏蔽。 可以使用上述一种或多种技术来防止飞行时间传感器的任何不稳定的行为。

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