公开(公告)号：US20190131247A1

公开(公告)日：2019-05-02

申请号：US16043776

申请日：2018-07-24

Applicant: Microchip Technology Incorporated

Inventor： Man Kit Lam

IPC: H01L23/544 ,  H01L23/00 ,  H01L25/065

Abstract: Methods for providing a polymer coating on the scribe lines of a semiconductor wafer to reduce or eliminate chipping caused by mechanical saw cutting along the scribe lines are provided. A method of forming an array of separated integrated circuit dice may include forming a plurality of integrated circuits on a semiconductor wafer, defining a scribe line on the semiconductor wafer, forming a polymer layer on the scribe line, and sawing the semiconductor wafer along the scribe line, such that the saw passes through the polymer layer and at least partially through the semiconductor wafer, to define the array of separated integrated circuit dice, wherein the polymer layer on the scribe line reduces or eliminates chipping or other physical defects in the separated integrated circuit dice resulting from the sawing process.

公开(公告)号：US10553524B2

公开(公告)日：2020-02-04

申请号：US16058729

申请日：2018-08-08

Applicant: Microchip Technology Incorporated

Inventor： Man Kit Lam

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/433 ,  H01L21/48 ,  H01L23/31 ,  H01L21/56 ,  H02M7/00

Abstract: An integrated circuit (IC) package, e.g., a power MOSFET package, may include a lead frame including (a) a main lead frame structure including a plurality of leads and defining or lying in a main lead frame plane, and (b) an offset lead frame die-attach pad (DAP) defining or lying in an offset plane that is offset from the main lead frame plane. The power IC package may further include a semiconductor die having a first side attached to the offset lead frame DAP, and a conductive element attached to both (a) a second side of the semiconductor die and (b) the main lead frame structure. The lead frame including the offset DAP may emulate the functionality of a copper clip, thus eliminating the need for the copper clip. The power IC package may also exhibit enhanced heat dissipation capabilities.

公开(公告)号：US20190131216A1

公开(公告)日：2019-05-02

申请号：US16058729

申请日：2018-08-08

Applicant: Microchip Technology Incorporated

Inventor： Man Kit Lam

IPC: H01L23/495 ,  H01L23/00

Abstract: An integrated circuit (IC) package, e.g., a power MOSFET package, may include a lead frame including (a) a main lead frame structure including a plurality of leads and defining or lying in a main lead frame plane, and (b) an offset lead frame die-attach pad (DAP) defining or lying in an offset plane that is offset from the main lead frame plane. The power IC package may further include a semiconductor die having a first side attached to the offset lead frame DAP, and a conductive element attached to both (a) a second side of the semiconductor die and (b) the main lead frame structure. The lead frame including the offset DAP may emulate the functionality of a copper clip, thus eliminating the need for the copper clip. The power IC package may also exhibit enhanced heat dissipation capabilities.

公开(公告)号：US10903148B2

公开(公告)日：2021-01-26

申请号：US16058782

申请日：2018-08-08

Applicant: Microchip Technology Incorporated

Inventor： Man Kit Lam

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/495 ,  H01L25/00 ,  H01L25/16 ,  H01L23/00

Abstract: Methods are provided for forming an IC power package including a power MOSFET device, a microprocessor/driver, and/or other discrete electronics. A lead frame may be etched to form a half-etch lead frame defining component attach structures at the top side of the lead frame. A power MOSFET may be mounted to a die attach pad defined in the half-etch lead frame, and the structure may be overmolded. The top of the overmolded structure may be grinded to reduce a thickness of the power MOSFET and expose a top surface of the MOSFET through the surrounding mold compound. A conductive contact may be formed on a top surface of the MOSFET. Selected portions of the half-etch lead frame may be etched from the bottom-up to separate the MOSFET from other package components, and to define a plurality of package posts for solder-mounting the package to a PCB.

公开(公告)号：US20190311977A1

公开(公告)日：2019-10-10

申请号：US16058782

申请日：2018-08-08

Applicant: Microchip Technology Incorporated

Inventor： Man Kit Lam

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: Methods are provided for forming an IC power package including a power MOSFET device, a microprocessor/driver, and/or other discrete electronics. A lead frame may be etched to form a half-etch lead frame defining component attach structures at the top side of the lead frame. A power MOSFET may be mounted to a die attach pad defined in the half-etch lead frame, and the structure may be overmolded. The top of the overmolded structure may be grinded to reduce a thickness of the power MOSFET and expose a top surface of the MOSFET through the surrounding mold compound. A conductive contact may be formed on a top surface of the MOSFET. Selected portions of the half-etch lead frame may be etched from the bottom-up to separate the MOSFET from other package components, and to define a plurality of package posts for solder-mounting the package to a PCB.