公开(公告)号：US11552246B2

公开(公告)日：2023-01-10

申请号：US17153744

申请日：2021-01-20

Applicant: Massachusetts Institute of Technology

Inventor： Jeehwan Kim ,  Hanwool Yeun ,  Scott Tan ,  Peng Lin ,  Yongmo Park ,  Chanyeol Choi

IPC: H01L45/00 ,  H01L27/24

Abstract: Memristors, including memristors comprising a Schottky barrier, and related systems and methods are generally described.

公开(公告)号：US20210351033A1

公开(公告)日：2021-11-11

申请号：US17283625

申请日：2019-10-16

Applicant: Massachusetts Institute of Technology

Inventor： Jeehwan Kim ,  Wei Kong

IPC: H01L21/02

Abstract: Apparatus, systems, and methods for forming semiconductor materials (e.g., using nanofabrication) are generally described. In one example, a method comprises formation of a carbon buffer layer on a first substrate and a graphene layer on the carbon buffer layer by silicon sublimation, followed by removing the graphene layer so as to expose the carbon buffer layer and form a fabrication platform.

公开(公告)号：US20210327758A1

公开(公告)日：2021-10-21

申请号：US17270246

申请日：2019-08-23

Applicant: Massachusetts Institute of Technology

Inventor： Jeehwan Kim ,  Wei Kong ,  Jaewoo Shim

IPC: H01L21/78 ,  H01L21/02 ,  H01L29/66 ,  H01L21/443 ,  H01L21/04 ,  H01L21/285

Abstract: Embodiments of this disclosure include apparatus, systems, and methods for fabricating monolayers. In one example, a method includes forming a multilayer film having a plurality of monolayers of a two-dimensional (2D) material on a growth substrate. The multilayer film has a first side proximate the growth substrate and a second side opposite the first side.

公开(公告)号：US11063073B2

公开(公告)日：2021-07-13

申请号：US16487945

申请日：2018-02-23

Applicant: Massachusetts Institute of Technology

Inventor： Kyusang Lee ,  Jeehwan Kim

IPC: H01L27/146 ,  B32B37/26 ,  B32B38/18 ,  H01L21/683 ,  H01L31/0224 ,  H01L31/18

Abstract: A method of fabricating a curved focal plane array (FPA) includes forming an epitaxial layer including a semiconductor on a release layer. The release layer includes a two-dimensional (2D) material and is disposed on a first substrate. The method also includes forming a metal layer on the epitaxial layer and transferring the epitaxial layer and the metal layer to a second substrate including an elastomer. The method also includes fabricating a plurality of photodetectors from the epitaxial layer and bending the second substrate to form the curved FPA.

公开(公告)号：US10115894B2

公开(公告)日：2018-10-30

申请号：US15388785

申请日：2016-12-22

Applicant: Massachusetts Institute of Technology

Inventor： Jeehwan Kim ,  Shinhyun Choi

IPC: H01L23/52 ,  H01L45/00 ,  G11C13/00 ,  H01L27/24 ,  H01L29/06

Abstract: Electrical switching technologies employ the otherwise undesirable line defect in crystalline materials to form conductive filaments. A switching cell includes a crystalline layer disposed between an active electrode and another electrode. The crystalline layer has at least one channel, such as a line defect, extending from one surface of the crystalline layer to the other surface. Upon application of a voltage on the two electrodes, the active electrode provides metal ions that can migrate from the active electrode to the other electrode along the line defect, thereby forming a conductive filament. The switching cell can precisely locate the conductive filament within the line defect and increase the device-to-device switching uniformity.

公开(公告)号：US20240153763A1

公开(公告)日：2024-05-09

申请号：US18486471

申请日：2023-10-13

Applicant: Massachusetts Institute of Technology ,  The Government of the United States of America, as Represented by the Secretary of the Navy ,  ROHM Co. Ltd.

Inventor： Rachael L. Myers-Ward ,  Jeehwan Kim ,  Kuan Qiao ,  Wei Kong ,  David Kurt Gaskill ,  Takuji Maekawa ,  Noriyuki Masago

IPC: H01L21/02

CPC classification number: H01L21/02529 ,  H01L21/02378 ,  H01L21/02389 ,  H01L21/02433 ,  H01L21/02444 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02598 ,  H01L21/0262

Abstract: Systems and methods for growth of silicon carbide over a layer comprising graphene and/or hexagonal boron nitride, and related articles, are generally described. In some embodiments, a SiC film is fabricated over a layer comprising graphene and/or hexagonal boron nitride, which in turn is disposed over a substrate. The layer and/or the substrate may be lattice-matched with the SiC film to reduce defect density in the SiC film. The fabricated SiC film may then be removed from the substrate via, for example, a stressor attached to the SiC film. In certain cases, the layer serves as a reusable platform for growing SiC films and also serves a release layer that allows fast, precise, and repeatable release at the layer surface.

公开(公告)号：US20240071759A1

公开(公告)日：2024-02-29

申请号：US18238853

申请日：2023-08-28

Applicant: Massachusetts Institute of Technology

Inventor： Jeehwan Kim ,  Kiseok Kim ,  Sanghoon Bae

IPC: H01L21/02

CPC classification number: H01L21/02554 ,  H01L21/02557 ,  H01L21/0256 ,  H01L21/02639

Abstract: Two-dimensional (2D) materials and their heterostructures show a promising path for next generation electronics. Nevertheless, there are challenges with (i) controlling monolayer (ML)-by-ML 2D material growth, (ii) maintaining single-domain growth, and (iii) controlling the number of layers and crystallinity at the wafer-scale. The deterministic confined growth techniques disclosed here address these challenges simultaneously to produce wafer-scale single-domain 2D MLs and their heterostructures on arbitrary substrates. The growth of the first nuclei is confined by patterning SiO2 masks on 2-inch substrates to define selective or confined growth areas. Each growth area or trench is just a few microns wide and is filled with a single-domain ML before the second set of nuclei is introduced. Growing the second set of nuclei within the trenches yields an array of single-domain bilayers at the 2-inch wafer scale. Devices made with the single-domain bilayers exhibit excellent performance over the entire wafer.

公开(公告)号：US11355393B2

公开(公告)日：2022-06-07

申请号：US17270246

申请日：2019-08-23

Applicant: Massachusetts Institute of Technology

Inventor： Jeehwan Kim ,  Wei Kong ,  Jaewoo Shim

IPC: H01L21/78 ,  H01L21/02 ,  H01L21/04 ,  H01L21/285 ,  H01L21/443 ,  H01L29/66

Abstract: Embodiments of this disclosure include apparatus, systems, and methods for fabricating monolayers. In one example, a method includes forming a multilayer film having a plurality of monolayers of a two-dimensional (2D) material on a growth substrate. The multilayer film has a first side proximate the growth substrate and a second side opposite the first side.

公开(公告)号：US20240333254A1

公开(公告)日：2024-10-03

申请号：US18580593

申请日：2022-07-19

Applicant: Massachusetts Institute of Technology

Inventor： Sang-Gook Kim ,  Jeehwan Kim

IPC: H03H9/17 ,  H03H3/02

CPC classification number: H03H9/173 ,  H03H3/02

Abstract: Resonators comprising a single-crystalline semiconductor, and related systems and methods, are generally described.

公开(公告)号：US20220157661A1

公开(公告)日：2022-05-19

申请号：US17530870

申请日：2021-11-19

Applicant: Massachusetts Institute of Technology

Inventor： Jeehwan Kim ,  Sanghoon Bae ,  Yunjo Kim

IPC: H01L21/78 ,  C30B25/04 ,  C30B25/18 ,  C30B29/02 ,  H01L21/02

Abstract: Embodiments including apparatus, systems, and methods for nanofabrication are provided. In one example, a method of manufacturing a semiconductor device includes forming a two-dimensional (2D) layer comprising a 2D material on a first substrate and forming a plurality of holes in the 2D layer to create a patterned 2D layer. The method also includes forming a single-crystalline film on the patterned 2D layer and transferring the single-crystalline film onto a second substrate.