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公开(公告)号:US10255988B2
公开(公告)日:2019-04-09
申请号:US15939443
申请日:2018-03-29
Applicant: LAPIS SEMICONDUCTOR CO., LTD.
Inventor: Shuhei Kamano
IPC: G11C29/50 , G11C11/401 , G11C29/02 , G11C29/24
Abstract: A semiconductor memory device includes: a memory cell including a first cell that stores data, and a second cell that stores complementary data that is complementary to the data; a redundant memory cell including a third cell that stores margined complementary data in which a margin is added to the complementary data, and a fourth cell that stores margined data in which a margin is added to the data; and a controller that causes the data and the margined complementary data to be compared and a test of the first cell to be executed, and the complementary data and the margined data to be compared and a test of the second cell to be executed.
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公开(公告)号:US09865312B2
公开(公告)日:2018-01-09
申请号:US15417386
申请日:2017-01-27
Applicant: LAPIS Semiconductor Co., Ltd.
Inventor: Shuhei Kamano
CPC classification number: G11C7/1069 , G11C5/066 , G11C5/148 , G11C7/1006 , G11C7/1051 , G11C7/12 , G11C16/20 , G11C16/26 , G11C29/021 , G11C29/028 , G11C2029/0407
Abstract: A semiconductor device includes an output driver having a variable current driving ability, for outputting an amplified data signal to the outside through a transmission line; a nonvolatile memory having a specific area for storing output adjustment data to adjust the current driving ability of the output driver; an output adjustment data readout unit for reading out the output adjustment data from the specific area of the memory in response to powering on; and a current driving ability adjustment unit for adjusting the current driving ability of the output driver on the basis of the output adjustment data read out from the memory.
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