公开(公告)号：US11810620B2

公开(公告)日：2023-11-07

申请号：US17458067

申请日：2021-08-26

Applicant: KIOXIA CORPORATION

Inventor： Hiroyuki Takenaka ,  Akihiko Chiba ,  Teppei Higashitsuji ,  Kiyofumi Sakurai ,  Hiroaki Nakasa ,  Youichi Magome

IPC: G11C8/12 ,  G11C16/14 ,  G11C5/06 ,  G11C16/04 ,  G11C16/26 ,  G11C16/16 ,  G11C16/30 ,  G11C16/24

CPC classification number: G11C16/14 ,  G11C5/06 ,  G11C16/0483 ,  G11C16/16 ,  G11C16/24 ,  G11C16/26 ,  G11C16/30

Abstract: A semiconductor storage device includes a first semiconductor substrate, a second semiconductor substrate, a first memory cell and a second memory cell provided between the first semiconductor substrate and the second semiconductor substrate, a first word line electrically connected to the first memory cell, a second word line electrically connected to the second memory cell, a first transistor that is provided on the first semiconductor substrate and electrically connected between the first word line and a first wiring through which a voltage is applied to the first word line, and a second transistor that is provided on the semiconductor substrate and electrically connected between the second word line and a second wiring through which a voltage is applied to the second word line.

公开(公告)号：US11621278B2

公开(公告)日：2023-04-04

申请号：US17700951

申请日：2022-03-22

Applicant: KIOXIA CORPORATION

Inventor： Toshifumi Minami ,  Atsuhiro Sato ,  Keisuke Yonehama ,  Yasuyuki Baba ,  Hiroshi Shinohara ,  Hideyuki Kamata ,  Teppei Higashitsuji

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11578 ,  H01L27/11551 ,  H01L29/792 ,  H01L27/11563 ,  H01L27/11556

Abstract: A semiconductor memory device includes a conducting layer and an insulating layer that are disposed above a semiconductor substrate, a plurality of pillars that extend in a direction which crosses a surface of the semiconductor substrate, and a plate that is disposed between the plurality of pillars and extends in the same direction as the pillars. A surface of the plate, which faces the pillars, has convex portions and non-convex portions.

公开(公告)号：US12274065B2

公开(公告)日：2025-04-08

申请号：US18666035

申请日：2024-05-16

Applicant: Kioxia Corporation

Inventor： Toshifumi Minami ,  Atsuhiro Sato ,  Keisuke Yonehama ,  Yasuyuki Baba ,  Hiroshi Shinohara ,  Hideyuki Kamata ,  Teppei Higashitsuji

IPC: H10B43/27 ,  H01L29/792 ,  H10B41/20 ,  H10B41/27 ,  H10B43/00 ,  H10B43/10 ,  H10B43/20 ,  H10B43/35

Abstract: A semiconductor memory device includes a conducting layer and an insulating layer that are disposed above a semiconductor substrate, a plurality of pillars that extend in a direction which crosses a surface of the semiconductor substrate, and a plate that is disposed between the plurality of pillars and extends in the same direction as the pillars. A surface of the plate, which faces the pillars, has convex portions and non-convex portions.

公开(公告)号：US11315950B2

公开(公告)日：2022-04-26

申请号：US17021121

申请日：2020-09-15

Applicant: KIOXIA CORPORATION

Inventor： Toshifumi Minami ,  Atsuhiro Sato ,  Keisuke Yonehama ,  Yasuyuki Baba ,  Hiroshi Shinohara ,  Hideyuki Kamata ,  Teppei Higashitsuji

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11578 ,  H01L27/11551 ,  H01L27/11563 ,  H01L27/11556 ,  H01L29/792

Abstract: A semiconductor memory device includes a conducting layer and an insulating layer that are disposed above a semiconductor substrate, a plurality of pillars that extend in a direction which crosses a surface of the semiconductor substrate, and a plate that is disposed between the plurality of pillars and extends in the same direction as the pillars. A surface of the plate, which faces the pillars, has convex portions and non-convex portions.

公开(公告)号：US12183401B2

公开(公告)日：2024-12-31

申请号：US18480305

申请日：2023-10-03

Applicant: Kioxia Corporation

Inventor： Hiroyuki Takenaka ,  Akihiko Chiba ,  Teppei Higashitsuji ,  Kiyofumi Sakurai ,  Hiroaki Nakasa ,  Youichi Magome

IPC: G11C8/12 ,  G11C5/06 ,  G11C16/04 ,  G11C16/14 ,  G11C16/16 ,  G11C16/24 ,  G11C16/26 ,  G11C16/30

Abstract: A semiconductor storage device includes a first semiconductor substrate, a second semiconductor substrate, a first memory cell and a second memory cell provided between the first semiconductor substrate and the second semiconductor substrate, a first word line electrically connected to the first memory cell, a second word line electrically connected to the second memory cell, a first transistor that is provided on the first semiconductor substrate and electrically connected between the first word line and a first wiring through which a voltage is applied to the first word line, and a second transistor that is provided on the semiconductor substrate and electrically connected between the second word line and a second wiring through which a voltage is applied to the second word line.

公开(公告)号：US12022657B2

公开(公告)日：2024-06-25

申请号：US18176656

申请日：2023-03-01

Applicant: KIOXIA CORPORATION

Inventor： Toshifumi Minami ,  Atsuhiro Sato ,  Keisuke Yonehama ,  Yasuyuki Baba ,  Hiroshi Shinohara ,  Hideyuki Kamata ,  Teppei Higashitsuji

IPC: H10B43/27 ,  H01L29/792 ,  H10B41/20 ,  H10B41/27 ,  H10B43/00 ,  H10B43/10 ,  H10B43/20 ,  H10B43/35

CPC classification number: H10B43/27 ,  H01L29/7926 ,  H10B41/20 ,  H10B41/27 ,  H10B43/00 ,  H10B43/10 ,  H10B43/20 ,  H10B43/35

Abstract: A semiconductor memory device includes a conducting layer and an insulating layer that are disposed above a semiconductor substrate, a plurality of pillars that extend in a direction which crosses a surface of the semiconductor substrate, and a plate that is disposed between the plurality of pillars and extends in the same direction as the pillars. A surface of the plate, which faces the pillars, has convex portions and non-convex portions.