公开(公告)号：US20190088636A1

公开(公告)日：2019-03-21

申请号：US16197008

申请日：2018-11-20

Applicant: Invensas Corporation

Inventor： Nader Gamini

IPC: H01L25/18 ,  H01L25/10 ,  H01L23/498 ,  H01L21/48 ,  H01L25/00 ,  H01L25/065 ,  H01L23/552 ,  H01L23/66 ,  H01L23/36 ,  H01L25/16 ,  H05K1/18 ,  H05K1/03

Abstract: Laminated interposers and packages, with embedded trace interconnects are provided. An example process for making an interposer or package achieves vertical conductive vias in the package by depositing conductive traces on multiple wafers or panes, then laminating these substrates into a stack, thereby embedding the conductive traces. The laminated stack is sliced to dimensions of an interposer or electronic package. A side of the sliced stack is then used as the top of the interposer or package, rendering some of the horizontally laid traces into vertical conductive vias. The interposer or package can be finished or developed by adding redistribution layers on the top and bottom surfaces, and active and passive components. Electronic components can also be embedded in the laminated stack. Some of the stack layers can be active dies, such as memory controllers, memory storage arrays, and processors, to form a memory subsystem or self-contained computing device.

公开(公告)号：US20160379967A1

公开(公告)日：2016-12-29

申请号：US15187739

申请日：2016-06-20

Applicant: Invensas Corporation

Inventor： Nader Gamini

IPC: H01L25/18 ,  H01L23/498 ,  H01L25/065 ,  H01L23/66 ,  H01L23/00 ,  H05K1/18 ,  H01L23/538 ,  H01L23/552 ,  H01L23/60 ,  H01L23/367 ,  H05K3/46 ,  H05K3/40 ,  H05K1/11 ,  H05K1/02 ,  H05K3/00 ,  H01L21/48

CPC classification number: H01L25/18 ,  H01L21/481 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/36 ,  H01L23/49805 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/552 ,  H01L23/66 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2225/1023 ,  H01L2225/1064 ,  H01L2225/1094 ,  H01L2924/14 ,  H01L2924/143 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/15153 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K1/0306 ,  H05K1/186 ,  H05K2201/10378 ,  H05K2203/0235

Abstract: Laminated interposers and packages, with embedded trace interconnects are provided. An example process for making an interposer or package achieves vertical conductive vias in the package by depositing conductive traces on multiple wafers or panes, then laminating these substrates into a stack, thereby embedding the conductive traces. The laminated stack is sliced to dimensions of an interposer or electronic package. A side of the sliced stack is then used as the top of the interposer or package, rendering some of the horizontally laid traces into vertical conductive vias. The interposer or package can be finished or developed by adding redistribution layers on the top and bottom surfaces, and active and passive components. Electronic components can also be embedded in the laminated stack. Some of the stack layers can be active dies, such as memory controllers, memory storage arrays, and processors, to form a memory subsystem or self-contained computing device.

Abstract translation: 提供了具有嵌入式跟踪互连的层压插入器和封装。 用于制造插入器或封装件的示例性工艺通过在多个晶片或平板上沉积导电迹线，然后将这些衬底层叠到堆叠中，从而嵌入导电迹线，从而在封装中实现垂直导电通孔。 将层叠的叠层切成中介层或电子封装的尺寸。 然后将切片堆叠的一侧用作插入器或封装的顶部，将一些水平放置的迹线变成垂直导电通孔。 可以通过在顶部和底部表面以及主动和被动部件上添加再分布层来完成或开发中介层或封装。 电子元件也可嵌入叠层堆叠中。 一些堆叠层可以是活动管芯，例如存储器控制器，存储器存储阵列和处理器，以形成存储器子系统或独立的计算设备。

公开(公告)号：US10283492B2

公开(公告)日：2019-05-07

申请号：US15187739

申请日：2016-06-20

Applicant: Invensas Corporation

Inventor： Nader Gamini

IPC: H01L25/18 ,  H01L21/48 ,  H01L23/498 ,  H01L25/065 ,  H01L23/552 ,  H01L25/10 ,  H01L25/00 ,  H01L23/66 ,  H01L23/36 ,  H05K1/03 ,  H05K1/18 ,  H01L25/16

Abstract: Laminated interposers and packages, with embedded trace interconnects are provided. An example process for making an interposer or package achieves vertical conductive vias in the package by depositing conductive traces on multiple wafers or panes, then laminating these substrates into a stack, thereby embedding the conductive traces. The laminated stack is sliced to dimensions of an interposer or electronic package. A side of the sliced stack is then used as the top of the interposer or package, rendering some of the horizontally laid traces into vertical conductive vias. The interposer or package can be finished or developed by adding redistribution layers on the top and bottom surfaces, and active and passive components. Electronic components can also be embedded in the laminated stack. Some of the stack layers can be active dies, such as memory controllers, memory storage arrays, and processors, to form a memory subsystem or self-contained computing device.