公开(公告)号：US11264103B2

公开(公告)日：2022-03-01

申请号：US16554371

申请日：2019-08-28

Applicant: International Business Machines Corporation

Inventor： Nikolaos Papandreou ,  Charalampos Pozidis ,  Nikolas Ioannou ,  Roman Alexander Pletka ,  Radu Ioan Stoica ,  Sasa Tomic ,  Timothy Fisher ,  Aaron Daniel Fry ,  Andrew D. Walls

IPC: G11C16/26 ,  G11C16/04 ,  G11C11/56 ,  G11C16/34

Abstract: A computer-implemented method, according to one embodiment, includes: determining a current operating state of a block of memory. The block includes more than one type of page therein, and at least one read voltage is associated with each of the page types. The current operating state of the block is further used to produce a hybrid calibration scheme for the block which identifies a first subset of the read voltages, and a second subset of the read voltages. The read voltages in the second subset are further organized in one or more groupings. A unique read voltage offset value is calculated for each of the read voltages in the first subset, and a common read voltage offset value is also calculated for each grouping of read voltages in the second subset.

公开(公告)号：US11126360B2

公开(公告)日：2021-09-21

申请号：US16660627

申请日：2019-10-22

Applicant: International Business Machines Corporation

Inventor： Radu Ioan Stoica ,  Roman Alexander Pletka ,  Nikolas Ioannou ,  Nikolaos Papandreou ,  Sasa Tomic

IPC: G06F12/00 ,  G06F3/06

Abstract: A computer-implemented method, according to one embodiment, is for managing a plurality of blocks of memory in two or more pools. The computer-implemented method includes: maintaining a first subset of the plurality of blocks in a first pool, where the blocks maintained in the first pool are configured in single-level cell (SLC) mode. A second subset of the plurality of blocks is also maintained in a second pool, where the blocks maintained in the second pool are configured in multi-bit-per-cell mode. Current workload input/output (I/O) metrics are also identified during runtime. Moreover, a size of the first subset of blocks in the first pool and a size of the second subset of blocks in the second pool are adjusted based on the current workload I/O metrics.

公开(公告)号：US11119855B2

公开(公告)日：2021-09-14

申请号：US16663196

申请日：2019-10-24

Applicant: International Business Machines Corporation

Inventor： Nikolas Ioannou ,  Timothy Fisher ,  Roman Alexander Pletka ,  Nikolaos Papandreou ,  Radu Ioan Stoica ,  Sasa Tomic ,  Aaron Daniel Fry

IPC: G06F11/10 ,  G06F13/16 ,  G06F3/06 ,  G06F12/02

Abstract: A computer-implemented method, according to one embodiment, is for selectively storing parity data in different types of memory which include a higher performance memory and a lower performance memory. The computer-implemented method includes: receiving a write request, and determining whether the write request includes parity data. In response to determining that the write request includes parity data, a determination is made as to whether a write heat of the parity data is in a predetermined range. In response to determining that that write heat of the parity data is in the predetermined range, another determination is made as to whether the parity data has been read since a last time the parity data was updated. Furthermore, in response to determining that the parity data has been read since a last time the parity data was updated, the parity data is stored in the higher performance memory.

公开(公告)号：US11094383B2

公开(公告)日：2021-08-17

申请号：US16112392

申请日：2018-08-24

Applicant: International Business Machines Corporation

Inventor： Nikolaos Papandreou ,  Sasa Tomic ,  Roman A. Pletka ,  Nikolas Ioannou ,  Charalampos Pozidis ,  Aaron D. Fry ,  Timothy J. Fisher

IPC: G11C16/26 ,  G06F11/07 ,  G11C16/04 ,  G11C16/34

Abstract: A computer-implemented method, according to one embodiment, includes: detecting that a calibration of a first page group has been triggered, and evaluating a hierarchical page mapping to determine whether the first page group correlates to one or more other page groups in non-volatile memory. In response to determining that the first page group does correlate to one or more other page groups in the non-volatile memory, a determination is made as to whether to promote at least one of the one or more other page groups for calibration. In response to determining to promote at least one of the one or more other page groups for calibration, the first page group and the at least one of the one or more other page groups are calibrated. Moreover, each of the page groups includes one or more pages in non-volatile memory.

公开(公告)号：US11016693B2

公开(公告)日：2021-05-25

申请号：US16014938

申请日：2018-06-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Roman A. Pletka ,  Sasa Tomic ,  Nikolaos Papandreou ,  Nikolas Ioannou ,  Aaron D. Fry ,  Timothy Fisher

IPC: G06F3/06

Abstract: In at least one embodiment, a controller of a non-volatile memory having a plurality of blocks of physical memory estimates a current value of a block health metric of the particular block based on a previous value of the block health metric and a reference block wear curve. The controller assigns the particular block a health grade based on the estimated current value of the block health metric and performs data placement in the block in accordance with the assigned health grade. The controller may calibrate a set of read threshold voltages of the particular block prior to estimating the current value of the block health metric.

公开(公告)号：US20210134378A1

公开(公告)日：2021-05-06

申请号：US17149592

申请日：2021-01-14

Applicant: International Business Machines Corporation

Inventor： Nikolaos Papandreou ,  Charalampos Pozidis ,  Nikolas Ioannou ,  Roman Alexander Pletka ,  Radu Ioan Stoica ,  Sasa Tomic ,  Timothy Fisher ,  Aaron Daniel Fry

IPC: G11C16/34 ,  G11C16/08 ,  G06F11/07 ,  G11C16/26

Abstract: A computer-implemented method, according to one approach, is for calibrating read voltages associated with a block of memory having more than one word-line therein. The computer-implemented method includes: for each of the word-lines in the block: calculating an absolute shift value for a reference read voltage associated with the given word-line. A relative shift value is also determined for each of the remaining read voltages associated with the given word-line, and the relative shift values are determined with respect to the reference read voltage. Moreover, each of the read voltages associated with the given word-line are adjusted using the absolute shift value and each of the respective relative shift values.

公开(公告)号：US20210124488A1

公开(公告)日：2021-04-29

申请号：US16667702

申请日：2019-10-29

Applicant: International Business Machines Corporation

Inventor： Radu Ioan Stoica ,  Roman Alexander Pletka ,  Timothy Fisher ,  Nikolaos Papandreou ,  Sasa Tomic ,  Nikolas Ioannou ,  Aaron Daniel Fry ,  Charalampos Pozidis ,  Andrew D. Walls

IPC: G06F3/06 ,  G06F9/30

Abstract: A computer-implemented method, according to one embodiment, includes: maintaining a first subset of the plurality of blocks in a first pool, where the blocks maintained in the first pool are configured in SLC mode. A second subset of the plurality of blocks is maintained in a second pool, where the blocks maintained in the second pool are configured in multi-bit-per-cell mode. A current I/O rate for the memory is identified during runtime, and a determination is made as to whether the current I/O rate is outside a first range. In response to determining that the current I/O rate is not outside the first range, the blocks maintained in the first pool are used to satisfy incoming host writes. Moreover, in response to determining that the current I/O rate is outside the first range, the blocks maintained in the second pool are used to satisfy incoming host writes.

公开(公告)号：US10977181B2

公开(公告)日：2021-04-13

申请号：US16508140

申请日：2019-07-10

Applicant: International Business Machines Corporation

Inventor： Roman Alexander Pletka ,  Timothy Fisher ,  Aaron Daniel Fry ,  Nikolaos Papandreou ,  Nikolas Ioannou ,  Sasa Tomic ,  Radu Ioan Stoica ,  Charalampos Pozidis ,  Andrew D. Walls

IPC: G06F12/0871 ,  G06F12/02

Abstract: A computer-implemented method, according to one approach, includes: receiving write requests, accumulating the write requests in a destage buffer, and determining a current read heat value of each logical page which corresponds to the write requests. Each of the write requests is assigned to a respective write queue based on the current read heat value of each logical page which corresponds to the write requests. Moreover, each of the write queues correspond to a different page stripe which includes physical pages, the physical pages included in each of the respective page stripes being of a same type. Furthermore, data in the write requests is destaged from the write queues to their respective page stripes. Other systems, methods, and computer program products are described in additional approaches.

公开(公告)号：US10963327B2

公开(公告)日：2021-03-30

申请号：US16417453

申请日：2019-05-20

Applicant: International Business Machines Corporation

Inventor： Charles J. Camp ,  Timothy J. Fisher ,  Aaron D. Fry ,  Nikolas Ioannou ,  Roman Pletka ,  Sasa Tomic

IPC: G06F11/07 ,  G06F3/06 ,  G06F11/10 ,  G11C29/52 ,  G06F11/36

Abstract: Non-volatile memory block management. A method according to one embodiment includes calculating an error count margin threshold for each of the at least some non-volatile memory blocks of a plurality of non-volatile memory blocks. A determination is made as to whether the error count margin threshold of any of the at least some of the non-volatile memory blocks has been exceeded. A memory block management function is triggered upon determining that the error count margin threshold of any of the at least some of the non-volatile memory blocks has been exceeded.

公开(公告)号：US10956317B2

公开(公告)日：2021-03-23

申请号：US16272665

申请日：2019-02-11

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Roman A. Pletka ,  Nikolaos Papandreou ,  Sasa Tomic ,  Nikolas Ioannou ,  Aaron D. Fry ,  Timothy Fisher

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F12/02 ,  G06F3/06

Abstract: A non-volatile memory includes a plurality of blocks of physical memory, including a target block and at least one source block containing at least some valid data and some invalid data. Responsive to determining to perform garbage collection for the non-volatile memory, the controller transfers valid data from the at least one source block to the target block. The controller ends garbage collection on the at least one source block with at least some valid data present in the at least one source block and all interfaces of the target block closed at the boundary of independent layers. In at least some embodiments, the target block may be configured to store more bits per cell than the at least one source block.