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    Power switching module and electronic power device integrating said module
    2.
    发明授权
    Power switching module and electronic power device integrating said module 有权

    公开(公告)号：US10998831B2

    公开(公告)日：2021-05-04

    申请号：US16971614

    申请日：2019-02-22

    Applicant: INSTITUT VEDECOM

    Inventor： Friedbald Kiel

    IPC: H01L23/051 ,  H02M7/00 ,  H01L23/40 ,  H01L25/16 ,  H05K7/20 ,  H01L23/00

    Abstract: The power module comprises an electronic board (EB), in which at least one power switching branch is integrated, a capacitor (CE) and at least three DC power supply busbars (B1, B2, B3), wherein the electronic board is mounted between a first busbar (B1) and a second busbar (B2) and the capacitor is mounted between the second busbar (B2) and a third busbar (B3) and the electronic board, the capacitor and the busbars comprise electric contact faces allowing assembly, of the “press pack” type, of the electronic board and of the capacitor.

    Method for the integration of power chips and bus-bars forming heat sinks
    4.
    发明授权
    Method for the integration of power chips and bus-bars forming heat sinks 有权

    公开(公告)号：US10804183B2

    公开(公告)日：2020-10-13

    申请号：US16470516

    申请日：2017-12-06

    Applicant: INSTITUT VEDECOM

    Inventor： Friedbald Kiel

    IPC: H01L23/473 ,  H01L23/373 ,  H01L23/498 ,  H01L23/538 ,  H01L25/18 ,  H01L23/00

    Abstract: The method for producing a preform integrating at least one electronic chip included between insulating and/or conductive laminated internal layers; mechanically securing metal bus-bar segments at given spaced-apart positions on opposing upper and lower faces of the preform, using dielectric portions of a resin prepreg; and for each of the upper and lower opposing faces, electrodepositing a metal layer in order to interconnect bus-bar segments secured to the face in question and an electrode of the electronic chip, thereby forming an electronic power circuit comprising bus-bars forming heat sinks.

    Power switching module, converter integrating the latter and manufacturing method
    6.
    发明授权
    Power switching module, converter integrating the latter and manufacturing method 有权

    公开(公告)号：US10734361B2

    公开(公告)日：2020-08-04

    申请号：US16468259

    申请日：2017-12-05

    Applicant: INSTITUT VEDECOM ,  ELVIA PCB

    Inventor： Friedbald Kiel ,  Olivier Belnoue

    IPC: H01L25/065 ,  H01L23/473 ,  H01L23/48 ,  H01L23/498 ,  H02M3/155

    Abstract: The power switching module includes first and second subassemblies that are superimposed on top of each other to form a stack and that comprise first and second electronic power switches forming a bridging arm, respectively. The module comprises a metal central sheet (LW7) and first and second metal end sheets (LW2, LW12) forming top and bottom ends of the stack. According to the invention, the module also comprises first, second and third metal terminal rods (1, 2, 3) that extend through the stack and open onto at least one of the top and bottom ends thereof, the first, second and third rods being in electrical continuity with the first and second metal end sheets and the metal central sheet, respectively.

    Power switching modular element and dismountable assembly of a plurality of modular elements
    8.
    发明授权
    Power switching modular element and dismountable assembly of a plurality of modular elements 有权

    公开(公告)号：US11094618B2

    公开(公告)日：2021-08-17

    申请号：US17043558

    申请日：2019-03-29

    Applicant: INSTITUT VEDECOM

    Inventor： Friedbald Kiel

    IPC: H01L23/495 ,  H01L23/373 ,  H01L23/473 ,  H01L23/00 ,  H01L25/07

    Abstract: The invention relates to a modular element (2) comprising a stratification of first and second electroconductive plates (PH2, PB2) which are separated by an intermediate dielectric layer (CD2) and at least one electronic power switching chip (CP1, CP2) which is implanted between the first and second plates, the chip having a upper face comprising a first power electrode and a switching control electrode and a lower face comprising a second power electrode, and the first and second power electrodes being in electrical continuity respectively with the first and second plates. According to the invention, the modular element comprises a plurality of openings (OG2, OA2, OB2, OC2, OD2) extending into the stratification from outer surfaces of the first and second plates and perpendicularly to said outer surfaces, the plurality of openings comprising at least one first opening (OG2) communicating with the switching control electrode and at least one second opening (OA2, OB2) passing through the entire stratification, the first and second openings each comprising a dielectric layer (DE2) and an electroconductive layer (CI2), and the electroconductive layer of the first opening being electrically connected to the switching control electrode.

    Assembly of bus bars forming a casing and heat dissipator for an electronic power device
    9.
    发明授权
    Assembly of bus bars forming a casing and heat dissipator for an electronic power device 有权

    公开(公告)号：US11081970B2

    公开(公告)日：2021-08-03

    申请号：US16975079

    申请日：2019-02-22

    Applicant: INSTITUT VEDECOM

    Inventor： Friedbald Kiel

    IPC: H05K7/14 ,  H05K7/20 ,  H01L23/473 ,  H02M7/00 ,  H02G5/10

    Abstract: The assembly of bus bars according to the invention comprises a plurality of sectors of bus bars (S1 to S6) which are arranged, in a connected manner and with electrical contact, around a central axis (C) and upper and lower closing plates (BPD) which are perpendicular to the central axis, the sectors of bus bars each comprising an external portion of bus bar (B11 to B16) and at least one internal portion of bus bar (B21 to B26, B31 to B36) which delimit a plurality of internal volumes, the upper and lower closing plates being in contact against upper and lower faces of the portions of bus bar, respectively, and the portions of bus bar comprising a plurality of electrical contact faces of the type referred to as “press pack”.

    Parallelisable method for integrating power chips and power electronics
    10.
    发明授权
    Parallelisable method for integrating power chips and power electronics 有权

    公开(公告)号：US10734368B2

    公开(公告)日：2020-08-04

    申请号：US16468448

    申请日：2017-12-05

    Applicant: INSTITUT VEDECOM

    Inventor： Friedbald Kiel

    IPC: H01L25/18 ,  H01L25/11 ,  H01L23/538 ,  H03K17/60 ,  H01L23/31 ,  H01L23/498

    Abstract: The method comprises the steps of 1) producing first and second blanks (EB1) including reserved-space defining means (HM1, HM2), by laminating insulating and conductive inner layers (PP, CP) on copper plates forming a base (MB1), at least one electronic chip being sandwiched between the blanks, said blanks being produced such that their upper lamination surfaces have matching profiles, 2) stacking and fitting the blanks via their matching profiles, and 3) press-fitting the blanks to form a laminated sub-assembly for an integrated power electronics device. The method uses IMS-type techniques.

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