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公开(公告)号:US11647641B2
公开(公告)日:2023-05-09
申请号:US17113095
申请日:2020-12-06
Applicant: IMEC VZW
Inventor: Jiwon Lee , Pierre Boulenc , Kris Myny
CPC classification number: H10K39/32 , H01L27/14614 , H04N25/50 , H04N25/79 , H01L27/14641 , H01L27/14649 , H10K19/20 , H10K30/152
Abstract: A photo-sensitive device comprises: an active layer configured to generate charges in response to incident light; a charge transport layer arranged below the active layer, wherein the charge transport layer comprises a first portion and a second portion being laterally displaced in relation to the first portion; a gate separated by a dielectric material from the charge transport layer, wherein said gate is arranged below the first portion and configured to control a potential thereof; and a transfer gate, which is separated by a dielectric material from a transfer portion of the charge transport layer between the first portion and the second portion, wherein the transfer gate is configured to control transfer of accumulated charges in the first portion to the second portion for read-out of detected light.
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公开(公告)号:US12279911B2
公开(公告)日:2025-04-22
申请号:US18042243
申请日:2021-07-01
Applicant: IMEC VZW
Inventor: Florian De Roose , Kris Myny
IPC: A61B8/00
Abstract: This patent disclosure relates to an ultrasound transducer including an array of ultrasound transducing elements, a plurality of transducer drive lines. The ultrasound transducer further includes an array of control circuits, wherein each individual control circuit includes a drive switch and a memory element, the drive switch comprising at least one thin-film transistor, the memory element being configured to store and control the state of the drive switch. The ultrasound transducer further configured so each individual ultrasound transducing element of the array of ultrasound transducing elements has one associated control circuit of the array of control circuits and one associated transducer drive line of the plurality of transducer drive lines, and wherein the ultrasound transducer is configured to, for each individual ultrasound transducing element, drive the individual ultrasound transducing element by the associated transducer drive line when the drive switch of the associated control circuit is in the on-state.
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公开(公告)号:US20200007130A1
公开(公告)日:2020-01-02
申请号:US16450046
申请日:2019-06-24
Applicant: IMEC VZW
Inventor: Kris Myny
IPC: H03K19/0944 , H03K19/017
Abstract: The disclosure relates to a logic circuit. The logic circuit comprises a first thin film transistor, TFT, having a gate connected to an input of the logic circuit, and a drain connected to an output of the logic circuit. The logic circuit further comprises a second TFT having a source connected to the output of the logic circuit. The logic circuit further comprises a third TFT having a gate connected to the input of the logic circuit, a source connected to the source of the second TFT, and a drain connected to a gate of the second TFT. The logic circuit further comprises a fourth TFT having a gate connected to the output of the logic circuit, and a source connected to the gate of the second TFT and the drain of the third TFT.
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公开(公告)号:US11799563B2
公开(公告)日:2023-10-24
申请号:US17209548
申请日:2021-03-23
Applicant: IMEC VZW , Katholieke Universiteit Leuven, KU LEUVEN R & D
Inventor: Jonas Pelgrims , Kris Myny , Wim Dehaene
IPC: H04B11/00
CPC classification number: H04B11/00
Abstract: A method of generating ultrasound by driving an array of ultrasonic transducers comprises a charge transfer procedure. The charge transfer procedure comprises switching a terminal of a first ultrasonic transducer of the array, at a first electric potential, to a charge distribution bus; switching a terminal of a second ultrasonic transducer of the array, at a second electric potential different than the first potential, to the charge distribution bus; and allowing charge to flow between the first ultrasonic transducer and the second ultrasonic transducer through the charge distribution bus.
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公开(公告)号:US20190175018A1
公开(公告)日:2019-06-13
申请号:US16211105
申请日:2018-12-05
Applicant: IMEC VZW , Stichting IMEC Nederland
Inventor: Salvatore Polito , Kris Myny
Abstract: A system for sensing a parameter of a living being may comprise a thin film transistor (TFT) unit being configured for attachment to a body part of the living being. The TFT unit may comprise at least one sensor with associated sensor circuitry for sensing the parameter of the living being. The system may further comprise an electronic unit, wherein the electronic unit and the TFT unit are configured for (i) detachably physically connecting the electronic unit to the TFT unit or (ii) arranging the electronic unit on the body part in physical contact with the TFT unit, and wherein the TFT unit and the electronic unit interface over a wireless contact for powering the TFT unit by the electronic unit and for communicating sensing results from the TFT unit to the electronic unit.
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公开(公告)号:US20230309966A1
公开(公告)日:2023-10-05
申请号:US18042243
申请日:2021-07-01
Applicant: IMEC VZW
Inventor: Florian De Roose , Kris Myny
IPC: A61B8/00
CPC classification number: A61B8/4494 , A61B8/4488 , A61B8/4281
Abstract: This patent disclosure relates to an ultrasound transducer including an array of ultrasound transducing elements, a plurality of transducer drive lines. The ultrasound transducer further includes an array of control circuits, wherein each individual control circuit includes a drive switch and a memory element, the drive switch comprising at least one thin-film transistor, the memory element being configured to store and control the state of the drive switch. The ultrasound transducer further configured so each individual ultrasound transducing element of the array of ultrasound transducing elements has one associated control circuit of the array of control circuits and one associated transducer drive line of the plurality of transducer drive lines, and wherein the ultrasound transducer is configured to, for each individual ultrasound transducing element, drive the individual ultrasound transducing element by the associated transducer drive line when the drive switch of the associated control circuit is in the on-state.
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公开(公告)号:US20220349749A1
公开(公告)日:2022-11-03
申请号:US17723970
申请日:2022-04-19
Applicant: IMEC VZW , Katholieke Universiteit Leuven, KU LEUVEN R&D
Inventor: Aris Siskos , Florian De Roose , Kris Myny , Wim Dehaene
IPC: G01J1/44 , H03F3/16 , H04N5/3745
Abstract: A charge sensor element includes a charge collecting detector configured to generate an intensity signal indicative of an amount of charge at an internal charge sensor element node, an amplifier transistor that is electrically connected to the internal charge sensor element node and configured to amplify the intensity signal, and a reset transistor that is electrically connected to the internal charge sensor element node and configured to reset the intensity signal. The amplifier transistor or the reset transistor includes a front gate and a back gate that are configured to control the amplifier transistor or the reset transistor.
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公开(公告)号:US20220201821A1
公开(公告)日:2022-06-23
申请号:US17546718
申请日:2021-12-09
Applicant: IMEC VZW , Katholieke Universiteit Leuven, KU LEUVEN R&D
Inventor: Lynn Verschueren , Kris Myny , Jan Genoe , Wim Dehaene , Wim Van Eessen , Patrick Willem
IPC: H05B45/397 , G09G3/32 , H05B45/44
Abstract: A pixel circuit for driving a light-emitting diode (LED) comprises a current-mirror, comprising a primary current path and a secondary current path, arranged to mirror a current through the primary current path to the secondary current path. The current through the primary current path is settable by switching a reference current into the primary current path through a reference current line. The secondary current path is configured to drive the LED. The pixel circuit also includes a switch component arranged to switch the LED to and from the secondary current path based on one or more switch control lines.
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公开(公告)号:US20220199002A1
公开(公告)日:2022-06-23
申请号:US17554929
申请日:2021-12-17
Applicant: Imec vzw , Katholieke Universiteit Leuven, KU LEUVEN R&D
Inventor: Lynn Verschueren , Kris Myny , Jan Genoe , Wim Dehaene
IPC: G09G3/32
Abstract: A compensated current mirror circuit comprises a current mirror with a primary current path and a secondary current path, configured to mirror a current through the primary current path to the secondary current path. The current is settable by switching a reference current through a reference current line into the primary current path. A primary current mirror transistor is connected in series with the primary current path. A secondary current mirror transistor is connected in series with the secondary current path. A gate of the primary current mirror transistor is connected to a gate of the secondary current mirror transistor at a current mirror node. A compensation block is connected to a back gate of the secondary current mirror transistor and to one or more compensation control lines, and is configured to apply a compensation signal at the back gate based on the compensation control lines.
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公开(公告)号:US11271283B2
公开(公告)日:2022-03-08
申请号:US16766994
申请日:2018-12-21
Applicant: IMEC VZW
Inventor: Alexander Mityashin , Soeren Steudel , Kris Myny , Nikolaos Papadopoulos , Vlatko Milosevski , Paul Heremans
Abstract: Example embodiments relate to monolithically integrated antenna devices. One embodiment includes a monolithically integrated antenna device that includes a substrate having a first surface and a second surface. The monolithically integrated antenna device also includes a transistor component layer that includes at least one electronic component therein. Further, the monolithically integrated antenna device includes at least one antenna structure formed on the substrate or the transistor component layer. The antenna structure is configured to operate in a frequency range of between 30 kHz and 2.4 GHz. The substrate is configured to have a size that is the same or larger than the at least one antenna structure. The at least one antenna structure is formed in a stack with the transistor component layer and the substrate. The monolithically integrated antenna device is configured to shield the at least one electronic component in the transistor component layer from electromagnetic interference.
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