公开(公告)号：US20100188905A1

公开(公告)日：2010-07-29

申请号：US12358721

申请日：2009-01-23

Applicant: Gerhard Poeppel ,  Hans-Joerg Timme ,  Werner Robl

Inventor： Gerhard Poeppel ,  Hans-Joerg Timme ,  Werner Robl

IPC: G11C15/02 ,  H01L29/66

CPC classification number: H01L29/66984 ,  B82Y25/00 ,  H01F10/3254

Abstract: According to an embodiment of the present invention, a spin device includes an intermediate semiconductor region arranged between a first terminal and a second terminal, wherein the first terminal is adapted to provide a current having a first degree of spin polarization to the intermediate semiconductor region, and wherein the second terminal is adapted to output the current having a second degree of spin polarization. The spin device further includes a spin selective scattering structure abutting the intermediate semiconductor region, the spin selective scattering structure being adapted such that the first degree of spin polarization is altered to be the second degree, wherein the spin selective scattering structure comprises a control electrode being electrically insulated from the intermediate semiconductor region, and wherein the control electrode is adapted to apply an electrical field perpendicular to a direction of the current through the intermediate semiconductor region to control a magnitude of the current.

Abstract translation: 根据本发明的实施例，自旋装置包括布置在第一端子和第二端子之间的中间半导体区域，其中第一端子适于向中间半导体区域提供具有第一自旋极化度的电流， 并且其中所述第二端子适于输出具有第二自旋极化度的电流。 自旋装置还包括邻接中间半导体区域的自旋选择性散射结构，自旋选择性散射结构适于使第一自旋极化程度改变为第二程度，其中自旋选择性散射结构包括控制电极 与中间半导体区域电绝缘，并且其中控制电极适于施加垂直于通过中间半导体区域的电流的方向的电场以控制电流的大小。

公开(公告)号：US07974120B2

公开(公告)日：2011-07-05

申请号：US12358721

申请日：2009-01-23

Applicant: Gerhard Poeppel ,  Hans-Joerg Timme ,  Werner Robl

Inventor： Gerhard Poeppel ,  Hans-Joerg Timme ,  Werner Robl

IPC: G11C11/00

CPC classification number: H01L29/66984 ,  B82Y25/00 ,  H01F10/3254

Abstract: According to an embodiment of the present invention, a spin device includes an intermediate semiconductor region arranged between a first terminal and a second terminal, wherein the first terminal is adapted to provide a current having a first degree of spin polarization to the intermediate semiconductor region, and wherein the second terminal is adapted to output the current having a second degree of spin polarization. The spin device further includes a spin selective scattering structure abutting the intermediate semiconductor region, the spin selective scattering structure being adapted such that the first degree of spin polarization is altered to be the second degree, wherein the spin selective scattering structure comprises a control electrode being electrically insulated from the intermediate semiconductor region, and wherein the control electrode is adapted to apply an electrical field perpendicular to a direction of the current through the intermediate semiconductor region to control a magnitude of the current.

Abstract translation: 根据本发明的实施例，自旋装置包括布置在第一端子和第二端子之间的中间半导体区域，其中第一端子适于向中间半导体区域提供具有第一自旋极化度的电流， 并且其中所述第二端子适于输出具有第二自旋极化度的电流。 自旋装置还包括邻接中间半导体区域的自旋选择性散射结构，自旋选择性散射结构适于使第一自旋极化程度改变为第二程度，其中自旋选择性散射结构包括控制电极 与中间半导体区域电绝缘，并且其中控制电极适于施加垂直于通过中间半导体区域的电流的方向的电场以控制电流的大小。

公开(公告)号：US08338317B2

公开(公告)日：2012-12-25

申请号：US13080813

申请日：2011-04-06

Applicant: Manfred Engelhardt ,  Hans-Joerg Timme ,  Ivan Nikitn ,  Manfred Frank ,  Thomas Kunstmann ,  Werner Robl ,  Guenther Ruhl

Inventor： Manfred Engelhardt ,  Hans-Joerg Timme ,  Ivan Nikitn ,  Manfred Frank ,  Thomas Kunstmann ,  Werner Robl ,  Guenther Ruhl

IPC: H01L21/00

CPC classification number: H01L33/405 ,  C23C4/08 ,  C23C4/134 ,  H01L21/02115 ,  H01L21/02118 ,  H01L21/02203 ,  H01L21/02263 ,  H01L21/0331 ,  H01L21/2855 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/76885 ,  H01L24/05 ,  H01L24/06 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/743 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/074 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/04026 ,  H01L2224/04105 ,  H01L2224/05166 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/27418 ,  H01L2224/27622 ,  H01L2224/29111 ,  H01L2224/29118 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/83191 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2224/8381 ,  H01L2224/8382 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/181 ,  H05H1/42 ,  H05K2203/1344 ,  H01L2924/00 ,  H01L2224/27 ,  H01L2924/0105

Abstract: According to various embodiments, a method for processing a semiconductor wafer or die is provided including supplying particles to a plasma such that the particles are activated by the plasma and spraying the activated particles on the semiconductor wafer or die to generate a particle layer on the semiconductor wafer or die.

Abstract translation: 根据各种实施例，提供了一种用于处理半导体晶片或裸片的方法，包括向等离子体供应颗粒，使得颗粒被等离子体激活并将活化的颗粒喷射在半导体晶片或裸片上，以在半导体上产生颗粒层 晶片或模具。

公开(公告)号：US20120256323A1

公开(公告)日：2012-10-11

申请号：US13080813

申请日：2011-04-06

Applicant: Manfred Engelhardt ,  Hans-Joerg Timme ,  Ivan Nikitn ,  Manfred Frank ,  Thomas Kunstmann ,  Werner Robl ,  Guenther Ruhl

Inventor： Manfred Engelhardt ,  Hans-Joerg Timme ,  Ivan Nikitn ,  Manfred Frank ,  Thomas Kunstmann ,  Werner Robl ,  Guenther Ruhl

IPC: H01L23/485 ,  H01L21/768 ,  B05B5/03

CPC classification number: H01L33/405 ,  C23C4/08 ,  C23C4/134 ,  H01L21/02115 ,  H01L21/02118 ,  H01L21/02203 ,  H01L21/02263 ,  H01L21/0331 ,  H01L21/2855 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/76885 ,  H01L24/05 ,  H01L24/06 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/743 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/074 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/04026 ,  H01L2224/04105 ,  H01L2224/05166 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/27418 ,  H01L2224/27622 ,  H01L2224/29111 ,  H01L2224/29118 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/83191 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2224/8381 ,  H01L2224/8382 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/181 ,  H05H1/42 ,  H05K2203/1344 ,  H01L2924/00 ,  H01L2224/27 ,  H01L2924/0105

Abstract: According to various embodiments, a method for processing a semiconductor wafer or die is provided including supplying particles to a plasma such that the particles are activated by the plasma and spraying the activated particles on the semiconductor wafer or die to generate a particle layer on the semiconductor wafer or die.

Abstract translation: 根据各种实施例，提供了一种用于处理半导体晶片或裸片的方法，包括向等离子体供应颗粒，使得颗粒被等离子体激活并将活化的颗粒喷射在半导体晶片或裸片上，以在半导体上产生颗粒层 晶片或模具。

公开(公告)号：US08334202B2

公开(公告)日：2012-12-18

申请号：US12611609

申请日：2009-11-03

Applicant: Jens Pohl ,  Hans-Joachim Barth ,  Gottfried Beer ,  Rainer Steiner ,  Werner Robl ,  Mathias Vaupel

Inventor： Jens Pohl ,  Hans-Joachim Barth ,  Gottfried Beer ,  Rainer Steiner ,  Werner Robl ,  Mathias Vaupel

IPC: H01L23/48

CPC classification number: H01L23/5389 ,  H01L21/486 ,  H01L21/76873 ,  H01L21/76879 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/82 ,  H01L24/97 ,  H01L2221/1089 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/00

Abstract: A method for fabricating a device includes providing a substrate including at least one contact and applying a dielectric layer over the substrate. The method includes applying a first seed layer over the dielectric layer, applying an inert layer over the seed layer, and structuring the inert layer, the first seed layer, and the dielectric layer to expose at least a portion of the contact. The method includes applying a second seed layer over exposed portions of the structured dielectric layer and the contact such that the second seed layer makes electrical contact with the structured first seed layer. The method includes electroplating a metal on the second seed layer.

Abstract translation: 一种用于制造器件的方法包括提供包括至少一个接触的衬底并在衬底上施加电介质层。 该方法包括在电介质层上施加第一种子层，在种子层上施加惰性层，以及构造惰性层，第一种子层和电介质层以暴露至少一部分接触。 该方法包括在结构化介电层和触点的暴露部分上施加第二种子层，使得第二籽晶层与结构化的第一籽晶层电接触。 该方法包括在第二种子层上电镀金属。

公开(公告)号：US20060001162A1

公开(公告)日：2006-01-05

申请号：US11084724

申请日：2005-03-18

Applicant: Ronald Schutz ,  Werner Robl ,  Rajeev Malik ,  Lawrence Clevenger ,  Oleg Gluschenkov ,  Cyril Cabral ,  Roy Iggulden ,  Yun-Yu Wang ,  Keith Wong ,  Irene McStay

Inventor： Ronald Schutz ,  Werner Robl ,  Rajeev Malik ,  Lawrence Clevenger ,  Oleg Gluschenkov ,  Cyril Cabral ,  Roy Iggulden ,  Yun-Yu Wang ,  Keith Wong ,  Irene McStay

IPC: H01L23/48 ,  H01L21/4763

CPC classification number: H01L21/7685 ,  H01L21/28052 ,  H01L21/28061 ,  H01L21/76838 ,  H01L21/76855 ,  H01L21/823828 ,  H01L21/823842 ,  H01L29/4941 ,  H01L29/51 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78 ,  H01L2221/1078

Abstract: A conductive structure in an integrated circuit (12), and a method of forming the structure, is provided that includes a polysilicon layer (30), a thin layer containing titanium over the polysilicon, a tungsten nitride layer (34) over the titanium-containing layer and a tungsten layer over the tungsten nitride layer. The structure also includes a silicon nitride interfacial region (38) between the polysilicon layer and the titanium-containing layer. The structure withstands high-temperature processing without substantial formation of metal silicides in the polysilicon layer (30) and the tungsten layer (32), and provides low interface resistance between the tungsten layer and the polysilicon layer.

Abstract translation: 提供集成电路（12）中的导电结构和形成该结构的方法，其包括多晶硅层（30），在多晶硅上含有钛的薄层，在钛 - 钛层上的氮化钨层（34） 并且在氮化钨层上形成钨层。 该结构还包括在多晶硅层和含钛层之间的氮化硅界面区域（38）。 该结构经受高温处理，而在多晶硅层（30）和钨层（32）中基本不形成金属硅化物，并且在钨层和多晶硅层之间提供低的界面电阻。

公开(公告)号：US06794282B2

公开(公告)日：2004-09-21

申请号：US10305063

申请日：2002-11-27

Applicant: Thomas Goebel ,  Werner Robl ,  Rajeev Malik ,  Mihel Seitz

Inventor： Thomas Goebel ,  Werner Robl ,  Rajeev Malik ,  Mihel Seitz

IPC: H01L2144

CPC classification number: H01L27/10888 ,  H01L21/76882

Abstract: A method of forming a semiconductor device includes providing a semiconductor device including a conductor formed thereon. A dielectric layer is formed over the conductor and a recess is formed in the dielectric layer by removing a portion of the dielectric layer to expose at least a portion of the conductor. A first layer of aluminum is deposited over the top surface of the dielectric, along the sidewalls of the dielectric layer and over the exposed portion of the conductor without altering the temperature of the semiconductor device. A second layer of aluminum is deposited over the first layer of aluminum at a temperature greater than about 300° C. A third layer of aluminum is deposited over the second layer of aluminum so as to completely fill the recess in the dielectric layer. The third layer of aluminum is slow deposited at a temperature greater than about 300° C.

Abstract translation: 形成半导体器件的方法包括提供包括形成在其上的导体的半导体器件。 在导体上形成电介质层，并且通过去除电介质层的一部分以露出导体的至少一部分，在电介质层中形成凹陷。 沿着电介质层的侧壁并在导体的暴露部分之上沉积在电介质的顶表面上的第一层铝，而不改变半导体器件的温度。 在大于约300℃的温度下，在第一层铝上沉积第二层铝。第三层铝沉积在第二层铝上，以便完全填充介电层中的凹槽。 第三层铝在大于约300℃的温度下缓慢沉积

公开(公告)号：US06720212B2

公开(公告)日：2004-04-13

申请号：US10098840

申请日：2002-03-14

Applicant: Werner Robl ,  Thomas Goebel ,  Axel Christoph Brintzinger ,  Gerald Friese

Inventor： Werner Robl ,  Thomas Goebel ,  Axel Christoph Brintzinger ,  Gerald Friese

IPC: H01L2182

CPC classification number: H01L24/12 ,  H01L23/3114 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05548 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

Abstract: Disclosed is a method of ball grid array packaging, comprising the steps of providing a semiconductor die having a metal conductors thereon, covering said metal conductors with an insulative layer, etching through said insulative layer so as to provide one or more openings to said metal conductors, depositing a compliant material layer, etching through said compliant material layer so as to provide one or more openings to said metal conductors, depositing a substantially homogenous conductive layer, patterning said conductive layer so as to bring at least one of said metal conductors in electrical contact with one or more pads, each said pad comprising a portion of said conductive layer disposed upon said compliant material, and providing solder balls disposed upon said pads. Also disclosed is the apparatus made from the method.

Abstract translation: 公开了一种球栅阵列封装的方法，包括以下步骤：提供其上具有金属导体的半导体管芯，用绝缘层覆盖所述金属导体，蚀刻穿过所述绝缘层，以便向所述金属导体提供一个或多个开口 沉积柔性材料层，蚀刻穿过所述柔性材料层，以便向所述金属导体提供一个或多个开口;沉积基本上均匀的导电层;图案化所述导电层，以将所述金属导体中的至少一个导入电 与一个或多个焊盘接触，每个所述焊盘包括设置在所述柔性材料上的所述导电层的一部分，以及设置在所述焊盘上的焊球。 还公开了由该方法制成的装置。

公开(公告)号：US20130278372A1

公开(公告)日：2013-10-24

申请号：US13452075

申请日：2012-04-20

Applicant: Matthias Stecher ,  Markus Menath ,  Andreas Zankl ,  Werner Robl

Inventor： Matthias Stecher ,  Markus Menath ,  Andreas Zankl ,  Werner Robl

IPC: H01F5/00

CPC classification number: H01L28/10 ,  H01F27/2804 ,  H01F2017/0086 ,  H01L23/5225 ,  H01L23/5227 ,  H01L23/62 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor component has integrated a coreless transformer with a first connection contact, a second connection contact, an electrically conductive spiral first coil, an electrically conductive first ring, and an electrically conductive second ring. The electrically conductive spiral first coil is electrically connected between the first connection contact and the second connection contact. The electrically conductive first ring surrounds the first coil and one or both of the first connection contact and the second connection contact. The electrically conductive second ring is arranged between the first coil and the first ring, electrically connected to the first coil, and surrounds the first coil and one or both of the first connection contact and the second connection contact.

Abstract translation: 半导体部件集成了无芯变压器与第一连接触点，第二连接触点，导电螺旋第一线圈，导电第一环和导电第二环。 导电螺旋第一线圈电连接在第一连接触点和第二连接触点之间。 导电的第一环围绕第一线圈和第一连接触点和第二连接触点中的一个或两个。 导电的第二环被布置在第一线圈和第一环之间，电连接到第一线圈，并且包围第一线圈以及第一连接触点和第二连接触点中的一个或两者。

公开(公告)号：US20130147047A1

公开(公告)日：2013-06-13

申请号：US13315642

申请日：2011-12-09

Applicant: Thomas Detzel ,  Johann Gross ,  Robert Illing ,  Maximilian Krug ,  Sven Gustav Lanzerstorfer ,  Michael Nelhiebel ,  Werner Robl ,  Michael Rogalli ,  Stefan Woehlert

Inventor： Thomas Detzel ,  Johann Gross ,  Robert Illing ,  Maximilian Krug ,  Sven Gustav Lanzerstorfer ,  Michael Nelhiebel ,  Werner Robl ,  Michael Rogalli ,  Stefan Woehlert

IPC: H01L23/48 ,  H01L21/28

CPC classification number: H01L23/3735 ,  H01L21/2885 ,  H01L21/4882 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit includes a base element and a copper element over the base element, the copper element having a thickness of at least 5 μm and a ratio of average grain size to thickness of less than 0.7.

Abstract translation: 集成电路包括在基底元件上的基底元件和铜元件，铜元件具有至少5μm的厚度，并且平均晶粒尺寸与厚度之比小于0.7。