EMBEDDED COPPER STRUCTURE FOR MICROELECTRONICS PACKAGE

    公开(公告)号:US20220238482A1

    公开(公告)日:2022-07-28

    申请号:US17668921

    申请日:2022-02-10

    Applicant: FLEX LTD

    Abstract: An electronic component and a method of manufacturing an electronic component, the method including surface mounting electronic components to a printed circuit board (PCB), applying a flip-chip die integrated circuit (IC) to the PCB and underfilling the flip-chip IC to secure the PCB. The method also includes sintering a copper block to the PCB, where the copper block is in thermal communication with the IC and acts as a thermal path for removing heat generated by the flip-chip IC.

    EMBEDDED COPPER STRUCTURE FOR MICROELECTRONICS PACKAGE

    公开(公告)号:US20210125958A1

    公开(公告)日:2021-04-29

    申请号:US16709750

    申请日:2019-12-10

    Applicant: FLEX LTD

    Abstract: An electronic component and a method of manufacturing an electronic component, the method including surface mounting electronic components to a printed circuit board (PCB), applying a flip-chip die integrated circuit (IC) to the PCB and underfilling the flip-chip IC to secure the PCB. The method also includes sintering a copper block to the PCB, where the copper block is in thermal communication with the IC and acts as a thermal path for removing heat generated by the flip-chip IC.

    Embedded copper structure for microelectronics package

    公开(公告)号:US11270974B2

    公开(公告)日:2022-03-08

    申请号:US16709750

    申请日:2019-12-10

    Applicant: FLEX LTD

    Abstract: An electronic component and a method of manufacturing an electronic component, the method including surface mounting electronic components to a printed circuit board (PCB), applying a flip-chip die integrated circuit (IC) to the PCB and underfilling the flip-chip IC to secure the PCB. The method also includes sintering a copper block to the PCB, where the copper block is in thermal communication with the IC and acts as a thermal path for removing heat generated by the flip-chip IC.

    Devices, systems, and methods for stacked die packages

    公开(公告)号:US12243850B2

    公开(公告)日:2025-03-04

    申请号:US17392995

    申请日:2021-08-03

    Applicant: Flex Ltd.

    Abstract: A package includes a first chip stack. The first chip stack includes a first chip including first bonding structures, a second chip including second bonding structures facing the first bonding structures and bonded to the first bonding structures, and a first electrical contact on the second chip. At least a portion of the first electrical contact does not overlap with the first chip in a plan view.

Patent Agency Ranking