公开(公告)号：US20220240829A1

公开(公告)日：2022-08-04

申请号：US17584076

申请日：2022-01-25

Applicant: BioSig Technologies, Inc.

Inventor： Budimir S. Drakulic ,  Sina Fakhar ,  Thomas G. Foxall ,  Branislav Vlajinic

IPC: A61B5/30 ,  A61B5/00 ,  A61B5/0245 ,  A61B5/318 ,  A61B5/308

Abstract: Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

公开(公告)号：US11265031B2

公开(公告)日：2022-03-01

申请号：US17091357

申请日：2020-11-06

Applicant: BIOSIG Technologies, Inc.

Inventor： Budimir S. Drakulic ,  Sina Fakhar ,  Thomas G. Foxall ,  Branislav Vlajinic

IPC: H04B1/10 ,  H04B1/04

Abstract: Systems, methods, and computer program product embodiments are disclosed for removing any fixed frequency interfering signal from an input signal without introducing artifacts that are not part of the original signal of interest. An embodiment operates by using a virtual buffer with a length that matches a length of one cycle of an interfering signal. The embodiment extracts the interfering signal into the virtual buffer. For a sample in the next cycle of the interfering signal that corresponds to a virtual memory location for the virtual buffer, the embodiment can update one or more physical memory locations of the virtual buffer that are in the vicinity of the virtual memory location. This use of virtual buffer can remove any interfering signal without creating the artifacts associated with conventional notch filters.

公开(公告)号：US11229391B2

公开(公告)日：2022-01-25

申请号：US17130842

申请日：2020-12-22

Applicant: BioSig Technologies, Inc.

Inventor： Budimir S. Drakulic ,  Sina Fakhar ,  Thomas G. Foxall ,  Branislav Vlajinic

IPC: A61B5/30 ,  A61B5/00 ,  A61B5/0245 ,  A61B5/318 ,  A61B5/308 ,  H04L12/26 ,  H04L12/863 ,  G16H40/63 ,  A61B18/00 ,  H02H9/04 ,  H03F3/45 ,  H03F3/68 ,  H03K5/125 ,  A61B5/0215 ,  A61B5/024 ,  A61B5/0538 ,  A61B18/14 ,  A61B5/361 ,  A61B5/363 ,  A61B5/352 ,  A61B5/366

Abstract: Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

公开(公告)号：US10924424B2

公开(公告)日：2021-02-16

申请号：US16447275

申请日：2019-06-20

Applicant: BioSig Technologies, Inc.

Inventor： Budimir S. Drakulic ,  Sina Fakhar ,  Thomas G. Foxall ,  Branislav Vlajinic

IPC: H04L12/863 ,  H04L12/26 ,  A61B5/00 ,  A61B5/0402 ,  G16H40/63 ,  A61B5/0428 ,  H03F3/45 ,  H03K5/125 ,  A61B5/0215 ,  A61B5/0245 ,  A61B5/046 ,  A61B5/0464 ,  A61B18/14 ,  H03H17/02 ,  A61B18/00 ,  H02H9/04 ,  H03F3/68 ,  A61B5/024 ,  A61B5/0456 ,  A61B5/0472 ,  A61B5/0538

Abstract: Systems, methods, and computer program product embodiments are disclosed for processing and displaying multiple signals in near real-time. An embodiment operates by processing, using a first digital signal processor (DSP) of a first signal module, a first packet associated with a first signal. The embodiment also processes, using a second DSP of a second signal module, a second packet associated with a second signal. The embodiment equalizes a first processing delay associated with the first DSP with a second processing delay associated with the second DSP such that the first DSP completes processing of the first packet approximately simultaneously with the second DSP completing processing of the second packet. The embodiment then displays the processed first packet approximately simultaneously with the display of the processed second packet.

公开(公告)号：US11617529B2

公开(公告)日：2023-04-04

申请号：US17477213

申请日：2021-09-16

Applicant: BioSig Technologies, Inc.

Inventor： Budimir S. Drakulic ,  Sina Fakhar ,  Thomas G. Foxall ,  Branislav Vlajinic

IPC: A61B5/00 ,  A61B5/30 ,  A61B5/0245 ,  A61B5/318 ,  A61B5/308 ,  H04L43/02 ,  H04L47/50 ,  G16H40/63 ,  A61B18/00 ,  H02H9/04 ,  H03F3/45 ,  H03F3/68 ,  H03K5/125 ,  A61B5/0215 ,  A61B5/024 ,  A61B5/0538 ,  A61B18/14 ,  A61B5/361 ,  A61B5/363 ,  A61B5/352 ,  A61B5/366

Abstract: Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

公开(公告)号：US20210112014A1

公开(公告)日：2021-04-15

申请号：US17130842

申请日：2020-12-22

Applicant: BioSig Technologies, Inc.

Inventor： Budimir S. Drakulic ,  Sina Fakhar ,  Thomas G. Foxall ,  Branislav Vlajinic

IPC: H04L12/863 ,  H04L12/26 ,  A61B5/00 ,  G16H40/63 ,  H03F3/45 ,  H03K5/125 ,  A61B5/0215 ,  A61B5/0245 ,  A61B18/14 ,  A61B5/30 ,  A61B5/318 ,  A61B5/361 ,  A61B5/363

Abstract: Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

公开(公告)号：US20200022591A1

公开(公告)日：2020-01-23

申请号：US16584167

申请日：2019-09-26

Applicant: BioSig Technologies, Inc. ,  Mayo Foundation for Medical Education and Research

Inventor： Budimir S. DRAKULIC ,  Sina Fakhar ,  Thomas G. Foxall ,  Branislav VLAJINIC ,  Samuel J. ASIRVATHAM

IPC: A61B5/0215 ,  A61B5/0245 ,  A61B18/14 ,  A61B5/046 ,  A61B5/0464

Abstract: Systems, methods, and computer program product embodiments are disclosed for performing electrophysiology (EP) signal processing. An embodiment includes an electrocardiogram (ECG) circuit board configured to process an ECG signal. The embodiment further includes a plurality of intracardiac (IC) circuit boards, each configured to process a corresponding IC signal. The embodiment further includes a communications interface communicatively coupled to a remote device, and a processor, coupled to the ECG circuit board, the plurality of IC circuit boards, and the communications interface. The processor is configured to receive, via the communications interface, feedback from the remote device. The processor is further configured to control, via the communication interface, the remote device based on the ECG signal, the IC signals, or the feedback from the remote device.

公开(公告)号：USD864980S1

公开(公告)日：2019-10-29

申请号：US29659191

申请日：2018-08-07

Applicant: BioSig Technologies, Inc.

Designer： Budimir S. Drakulic ,  Sina Fakhar ,  Thomas G. Foxall ,  Branislav Vlajinic

公开(公告)号：US11123003B2

公开(公告)日：2021-09-21

申请号：US17065566

申请日：2020-10-08

Applicant: BioSig Technologies, Inc.

Inventor： Budimir S. Drakulic ,  Sina Fakhar ,  Thomas G. Foxall ,  Branislav Vlajinic

IPC: H03K5/125 ,  A61B5/30 ,  A61B5/00 ,  A61B5/0245 ,  A61B5/318 ,  A61B5/308 ,  H04L12/26 ,  H04L12/863 ,  G16H40/63 ,  A61B18/00 ,  H02H9/04 ,  H03F3/45 ,  H03F3/68 ,  A61B5/0215 ,  A61B5/024 ,  A61B5/0538 ,  A61B18/14 ,  A61B5/361 ,  A61B5/363 ,  A61B5/352 ,  A61B5/366

Abstract: Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

公开(公告)号：US10986033B2

公开(公告)日：2021-04-20

申请号：US16661433

申请日：2019-10-23

Applicant: BioSig Technologies, Inc.

Inventor： Budimir S. Drakulic ,  Sina Fakhar ,  Thomas G. Foxall ,  Branislav Vlajinic

IPC: A61B5/00 ,  G16H40/63 ,  H04L12/863 ,  H04L12/26 ,  H03F3/45 ,  H03K5/125 ,  A61B5/0215 ,  A61B5/0245 ,  A61B18/14 ,  A61B5/30 ,  A61B5/318 ,  A61B5/361 ,  A61B5/363 ,  A61B18/00 ,  H02H9/04 ,  H03F3/68 ,  A61B5/024 ,  A61B5/0538 ,  A61B5/352 ,  A61B5/366

Abstract: Systems, apparatus, and methods are disclosed for processing biomedical signals. An electrophysiology (EP) system includes a differential circuit to process the biomedical signals; a differential amplifier circuit to amplify an output of the differential circuit; an analog-to-digital converter to digitize an output of the differential amplifier circuit; a communication module to interface between the analog-to-digital converter and a digital processing stage having a plurality of signal modules; and at least one processor to execute the plurality of signal modules, applying digital signal processing to the output from the analog-to-digital converter, to extract features of interest of the biomedical signals.