公开(公告)号：US09886330B2

公开(公告)日：2018-02-06

申请号：US14501126

申请日：2014-09-30

Applicant: BULL

Inventor： Sylvain Jeaugey ,  Zoltan Menyhart ,  Frederic Temporelli

IPC: G06F9/46 ,  G06F9/45 ,  G06F9/50 ,  G06F9/44 ,  G06F9/54

CPC classification number: G06F9/542 ,  G06F9/5027 ,  G06F9/5044 ,  G06F9/5088 ,  G06F2209/509 ,  G06F2209/547

Abstract: A data-processing system (DTS) includes a central hardware unit (CPU) and an additional hardware unit (HW), the central hardware unit (CPU) being adapted to execute a task by a processing thread (TM), and to trigger offloading of execution of a first part (P1a, P1b, P2) of the task to the additional hardware unit (HW); and wherein the additional hardware unit is adapted to call on functionalities of the central hardware unit (CPU), triggered by the first part, and the central hardware unit (CPU) executes a second part (P2) of the task forming a sub-part of the first part by a service processing thread (TS).