公开(公告)号：US20240364264A1

公开(公告)日：2024-10-31

申请号：US18309533

申请日：2023-04-28

Applicant: Analog Devices, Inc.

Inventor： Hsin-Chang Lin

IPC: H03B19/14 ,  H03L7/18 ,  H04B1/18

CPC classification number: H03B19/14 ,  H03L7/18 ,  H04B1/18

Abstract: Aspects of this disclosure relate to a frequency multiplier with a transmission line in an input matching network. The frequency multiplier can multiply a frequency of a radio frequency input signal. The transmission line can provide a second harmonic trap. The transmission line can be electrically connected between input terminals of a pair of balanced transistors of the frequency multiplier.

公开(公告)号：US11862864B2

公开(公告)日：2024-01-02

申请号：US17546879

申请日：2021-12-09

Applicant: Analog Devices, Inc.

Inventor： Hsin-Chang Lin

IPC: H03H11/22 ,  H03H11/36 ,  H01Q3/26

CPC classification number: H01Q3/2694 ,  H03H11/22 ,  H03H11/362

Abstract: Systems, devices, and methods related to phase shifters are provided. An example true time-delay (TTD) phase shifter structure includes a signal conductive line disposed on a first layer of the structure; a first switchable ground plane comprising a first conductive plane disposed on a second layer of the structure; a second switchable ground plane comprising a second conductive plane disposed on a third layer of the structure, where the first, second, and third layers are separate layers of the structure; a first switch coupled between the first switchable ground plane and a first ground element, the first ground element disposed on the second layer; and a second switch coupled between the second switchable ground plane and a second ground element, the second ground element disposed on the third layer.