公开(公告)号：US12009317B2

公开(公告)日：2024-06-11

申请号：US17321139

申请日：2021-05-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung Yen ,  Bernd Karl Appelt ,  Kay Stefan Essig

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/433

CPC classification number: H01L23/562 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/433 ,  H01L23/49548

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a substrate, a semiconductor device, an encapsulant, a balance structure, and a warpage-resistant layer. The semiconductor device is disposed on the substrate. The encapsulant encapsulates the semiconductor device. The balance structure is on the semiconductor device and contacting the encapsulant. The warpage-resistant layer is between the semiconductor device and the balance structure. The encapsulant contacts a lateral surface of the warpage-resistant layer.

公开(公告)号：US11545406B2

公开(公告)日：2023-01-03

申请号：US17066407

申请日：2020-10-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung Yen ,  Bernd Karl Appelt ,  Kay Stefan Essig

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00

Abstract: A substrate structure, a semiconductor package structure including the same and a method for manufacturing the same are provided. The substrate structure includes a first passivation layer, a first circuit layer and a first protection layer. The first passivation layer has a first surface and a second surface opposite to the first surface. The first circuit layer has an outer lateral surface. A first portion of the first circuit layer is disposed in the first passivation layer. The first protection layer is disposed on a second portion of the first circuit layer and exposed from the first surface of the first passivation layer. The outer lateral surface of the first circuit layer is covered by the first passivation layer or the first protection layer.

公开(公告)号：US11145624B2

公开(公告)日：2021-10-12

申请号：US16523787

申请日：2019-07-26

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung Yen ,  Bernd Karl Appelt ,  Kay Stefan Essig

IPC: H01L25/065 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L21/56

Abstract: A semiconductor device package includes a substrate, a stacked structure and an encapsulation layer. The substrate includes a circuit layer, a first surface and a second surface opposite to the first surface. The substrate defines at least one cavity through the substrate. The stacked structure includes a first semiconductor die disposed on the first surface and electrically connected on the circuit layer, and at least one second semiconductor die stacked on the first semiconductor die and electrically connected to the first semiconductor die. The second semiconductor die is at least partially inserted into the cavity. The encapsulation layer is disposed in the cavity and at least entirely encapsulating the second semiconductor die.

公开(公告)号：US10005660B1

公开(公告)日：2018-06-26

申请号：US15433793

申请日：2017-02-15

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Kay Stefan Essig

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00238 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2201/0278 ,  B81C2203/0792

Abstract: The present disclosure relates to a semiconductor package device. The semiconductor package device includes a carrier, a first Micro Electro Mechanical Systems (MEMS) and a first electronic component. The carrier has a first surface and a second surface opposite the first surface. The MEMS is disposed in the carrier. The first MEMS is exposed from the first surface of the carrier and is exposed from the second surface of the carrier. The first electronic component is disposed on the first surface of the carrier and is electrically connected to the first MEMS.

公开(公告)号：US11705401B2

公开(公告)日：2023-07-18

申请号：US17225832

申请日：2021-04-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung Yen ,  Bernd Karl Appelt ,  Kay Stefan Essig

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L23/49 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/4889 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/16227 ,  H01L2224/48195 ,  H01L2924/19103 ,  H01L2924/19105

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a substrate and a first passive device. The substrate has a first surface and a second surface opposite to the first surface. The first passive device includes a first terminal and a second terminal, wherein the first terminal is closer to the first surface than to the second surface, and the second terminal is closer to the second surface than to the first surface.

公开(公告)号：US11682656B2

公开(公告)日：2023-06-20

申请号：US17499646

申请日：2021-10-12

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung Yen ,  Bernd Karl Appelt ,  Kay Stefan Essig

IPC: H01L25/065 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L21/56

CPC classification number: H01L25/0657 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/81 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16227

Abstract: A semiconductor device package includes a substrate, a stacked structure and an encapsulation layer. The substrate includes a circuit layer, a first surface and a second surface opposite to the first surface. The substrate defines at least one cavity through the substrate. The stacked structure includes a first semiconductor die disposed on the first surface and electrically connected on the circuit layer, and at least one second semiconductor die stacked on the first semiconductor die and electrically connected to the first semiconductor die. The second semiconductor die is at least partially inserted into the cavity. The encapsulation layer is disposed in the cavity and at least entirely encapsulating the second semiconductor die.

公开(公告)号：US11437247B2

公开(公告)日：2022-09-06

申请号：US16933813

申请日：2020-07-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Kay Stefan Essig ,  Jean Marc Yannou ,  Bradford Factor

IPC: H01L23/492 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/065 ,  H01L23/498

Abstract: A semiconductor package structure and a method of manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a conductive base, a first semiconductor die, a first conductive pillar, and a first encapsulant. The conductive base has a first surface. The first semiconductor die is disposed on the first surface of the conductive base. The first conductive pillar is disposed on the first semiconductor die. The first encapsulant is disposed on the first surface of the conductive base. The first encapsulant encapsulates the first semiconductor die. The first encapsulant includes an opening defined by the first conductive pillar.

公开(公告)号：US11881448B2

公开(公告)日：2024-01-23

申请号：US17315067

申请日：2021-05-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung Yen ,  Bernd Karl Appelt ,  Kay Stefan Essig

IPC: H01L23/498 ,  H01L21/48

CPC classification number: H01L23/49838 ,  H01L21/4814 ,  H01L23/49822

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first package and a second package. The first package includes a first substrate, an electronic component, a trace layer, and a first conductive structure. The first substrate has a first surface and a second surface opposite to the first surface. The electronic component is embedded in the first substrate. The trace layer has an uppermost conductive layer embedded in the first substrate and exposed from the first surface of the first substrate. The first conductive structure electrically connects the trace layer to the second surface of the first substrate. The second package is disposed on the first surface of the first substrate of the first package.

公开(公告)号：US10978312B2

公开(公告)日：2021-04-13

申请号：US16403393

申请日：2019-05-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung Yen ,  Bernd Karl Appelt ,  Kay Stefan Essig

IPC: H01L21/48 ,  H01L23/495 ,  H01L23/552 ,  H01L21/56 ,  H01Q1/22 ,  H01Q1/52 ,  H01L25/18 ,  H01L25/04 ,  H01L25/16

Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a carrier having a first surface and a second surface opposite to the first surface, an encapsulant, and an antenna. The encapsulant is disposed on the first surface of the carrier. The antenna is disposed on the encapsulant. The antenna includes a seed layer and a conductive layer.

公开(公告)号：US10217728B2

公开(公告)日：2019-02-26

申请号：US15359403

申请日：2016-11-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Bernd Karl Appelt ,  Kay Stefan Essig ,  You-Lung Yen

IPC: H01L23/02 ,  H01L25/10 ,  H01L25/065 ,  H01L25/00

Abstract: A semiconductor package includes a first semiconductor die, a first encapsulant, a first redistribution layer, a second encapsulant and a patterned conductive layer. The first encapsulant encloses the first semiconductor die and has a top surface and a lateral surface. The first redistribution layer is disposed on the top surface of the first encapsulant and electrically connected to the first semiconductor die, wherein a portion of the first redistribution layer is exposed from the lateral surface of the first encapsulant. The second encapsulant covers the first encapsulant and the first redistribution layer. The patterned conductive layer is disposed on at least one of the lateral surface of the first encapsulant or a lateral surface of the second encapsulant, and is electrically connected to the first redistribution layer.