公开(公告)号：US20160351092A1

公开(公告)日：2016-12-01

申请号：US15002369

申请日：2016-01-20

Applicant: AU Optronics Corp

Inventor： Chang-Chan Chen ,  Wen-Pin Hsu ,  Pin-Miao Liu

IPC: G09G3/00 ,  G09G3/32

CPC classification number: G09G3/3233 ,  G09G2330/10 ,  H01L25/0753 ,  H01L27/3244 ,  H01L2251/568

Abstract: A method for repairing a display panel includes the following steps. A display panel is provided. The display panel includes a substrate and a plurality of pixel units. The pixel units are disposed on the substrate, wherein each pixel unit includes at least one bonding pad, at least one light-emitting device and at least one first substitutive bonding pad. The bonding pad is disposed on the substrate. The light-emitting unit is disposed on the bonding pad and is electrically connected to the bonding pad. The first substitutive bonding pad is disposed on the substrate. A defect detecting process is performed to detect whether the light-emitting device of each pixel unit is defective or not. A repairing process is performed to form a first substitutive light-emitting device on the first substitutive bonding pad when a light-emitting device of a pixel unit is found defective.

Abstract translation: 一种维修显示面板的方法包括以下步骤。 提供显示面板。 显示面板包括基板和多个像素单元。 像素单元设置在基板上，其中每个像素单元包括至少一个焊盘，至少一个发光器件和至少一个第一替代焊盘。 接合焊盘设置在基板上。 发光单元设置在焊盘上并电连接到焊盘。 第一替代焊盘设置在基板上。 执行缺陷检测处理以检测每个像素单元的发光装置是否有缺陷。 当发现像素单元的发光装置有缺陷时，执行修复处理以在第一替代焊盘上形成第一替代发光器件。

公开(公告)号：US10373579B2

公开(公告)日：2019-08-06

申请号：US15614791

申请日：2017-06-06

Applicant: AU OPTRONICS CORP.

Inventor： Chun-Fan Chung ,  Tien-Lun Ting ,  Chia-Chi Tsai ,  Ming-Hung Tu ,  Chien-Huang Liao ,  Yu-Chieh Chen ,  Pin-Miao Liu

IPC: G09G3/36 ,  G09G5/00

Abstract: In an exemplary flat display apparatus and control circuit and method for controlling the flat display apparatus, the flat display apparatus includes a plurality of gate driving units, each of which controls the operation of a scan line in the flat display apparatus. The flat display apparatus provides a first gate high level voltage signal and a second gate high level voltage signal to the gate driving units such that the first and second gate high level voltage signals are used as voltage signals transmitted to corresponding scan lines. The first and second gate high level voltage signals respectively include a falling edge with a slope. Duration time of the falling edge of the first gate high level voltage signal is longer than that of the falling edge of the second gate high level voltage signal.

公开(公告)号：US09697793B2

公开(公告)日：2017-07-04

申请号：US14590414

申请日：2015-01-06

Applicant: AU OPTRONICS CORP.

Inventor： Chun-Fan Chung ,  Tien-Lun Ting ,  Chia-Chi Tsai ,  Ming-Hung Tu ,  Chien-Huang Liao ,  Yu-Chieh Chen ,  Pin-Miao Liu

IPC: G06F3/038 ,  G09G5/00 ,  G09G3/36

CPC classification number: G09G5/00 ,  G09G3/3674 ,  G09G2300/0413 ,  G09G2310/0267 ,  G09G2310/066 ,  G09G2310/08 ,  G09G2320/0219 ,  G09G2320/0223

Abstract: In an exemplary flat display apparatus and control circuit and method for controlling the flat display apparatus, the flat display apparatus includes a plurality of gate driving units, each of which controls the operation of a scan line in the flat display apparatus. The flat display apparatus provides a first gate high level voltage signal and a second gate high level voltage signal to the gate driving units such that the first and second gate high level voltage signals are used as voltage signals transmitted to corresponding scan lines. The first and second gate high level voltage signals respectively include a falling edge with a slope. Duration time of the falling edge of the first gate high level voltage signal is longer than that of the falling edge of the second gate high level voltage signal.