Method for testing a partially assembled multi-die device, integrated circuit die and multi-die device
    1.
    发明授权
    Method for testing a partially assembled multi-die device, integrated circuit die and multi-die device 有权
    用于测试部分组装的多芯片器件,集成电路管芯和多管芯器件的方法

    公开(公告)号:US08829940B2

    公开(公告)日:2014-09-09

    申请号:US13120793

    申请日:2009-09-26

    Abstract: The present invention discloses a method of testing a partially assembled multi-die device (1) by providing a carrier (300) comprising a device-level test data input (12) and a device-level test data output (18); placing a first die on the carrier, the first die having a test access port (100c) comprising a primary test data input (142), a secondary test data input (144) and a test data output (152), the test access port being controlled by a test access port controller (110); communicatively coupling the secondary test data input (144) of the first die to the device-level test data input (12), and the test data output (152) of the first die to the device-level test data output (18); providing the first die with configuration information to bring the first die in a state in which the first die accepts test instructions from its secondary test data input (144); testing the first die, said testing including providing the secondary test data input (144) of the first die with test instructions through the device-level test data input (12); and collecting a test result for the first die on the device-level test data output (18). Consequently, a die of a partially assembled multi-die device such as a System-in-Package may be tested using its integrated boundary scan test architecture.

    Abstract translation: 本发明公开了一种通过提供包括设备级测试数据输入(12)和设备级测试数据输出(18)的载波(300)来测试部分组装的多芯片器件(1)的方法; 将第一管芯放置在载体上,第一管芯具有包括主测试数据输入(142),次测试数据输入(144)和测试数据输出(152)的测试访问端口(100c),测试访问端口 由测试访问端口控制器(110)控制; 将第一管芯的次级测试数据输入(144)与器件级测试数据输入(12)和第一管芯的测试数据输出(152)通信耦合到器件级测试数据输出(18); 向所述第一管芯提供配置信息以使所述第一管芯处于其第一管芯从其次检测数据输入端接收测试指令的状态(144); 所述测试包括通过设备级测试数据输入(12)提供具有测试指令的第一芯片的辅助测试数据输入(144); 并在设备级测试数据输出(18)上收集第一个管芯的测试结果。 因此,可以使用其集成的边界扫描测试架构来测试诸如系统级封装的部分组装的多管芯器件的管芯。

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