Invention Grant
- Patent Title: Double processing offloading to additional and central processing units
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Application No.: US14501126Application Date: 2014-09-30
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Publication No.: US09886330B2Publication Date: 2018-02-06
- Inventor: Sylvain Jeaugey , Zoltan Menyhart , Frederic Temporelli
- Applicant: BULL
- Applicant Address: FR Les Clayes sous Bois
- Assignee: BULL
- Current Assignee: BULL
- Current Assignee Address: FR Les Clayes sous Bois
- Agency: Young & Thompson
- Priority: FR1359501 20131001
- Main IPC: G06F9/46
- IPC: G06F9/46 ; G06F9/45 ; G06F9/50 ; G06F9/44 ; G06F9/54

Abstract:
A data-processing system (DTS) includes a central hardware unit (CPU) and an additional hardware unit (HW), the central hardware unit (CPU) being adapted to execute a task by a processing thread (TM), and to trigger offloading of execution of a first part (P1a, P1b, P2) of the task to the additional hardware unit (HW); and wherein the additional hardware unit is adapted to call on functionalities of the central hardware unit (CPU), triggered by the first part, and the central hardware unit (CPU) executes a second part (P2) of the task forming a sub-part of the first part by a service processing thread (TS).
Public/Granted literature
- US20150095920A1 DOUBLE PROCESSING OFFLOADING TO ADDITIONAL AND CENTRAL PROCESSING UNITS Public/Granted day:2015-04-02
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