Invention Grant
US09536964B2 Method for forming via profile of interconnect structure of semiconductor device structure 有权
用于形成半导体器件结构的互连结构的通孔轮廓的方法

Method for forming via profile of interconnect structure of semiconductor device structure
Abstract:
A method for forming the semiconductor device structure is provided. The method includes forming a first metal layer over a substrate and forming a dielectric layer over the first metal layer. The method includes forming an antireflection layer over the dielectric layer, forming a hard mask layer over the antireflection layer and forming a patterned photoresist layer over the hard mask layer. The method includes etching a portion of the antireflection layer by performing a first etching process and etching through the antireflection layer and etching a portion of the dielectric layer by performing a second etching process. The method includes etching through the dielectric layer by performing a third etching process to form a via portion on the first metal layer. The via portion includes a first sidewall and a second sidewall, and the slope of the first sidewall is different from that of the second sidewall.
Information query
Patent Agency Ranking
0/0