Invention Grant
US09412851B2 Method for fabricating semiconductor device including a patterned multi-layered dielectric film with an exposed edge
有权
一种制造半导体器件的方法，包括具有暴露边缘的图案化多层电介质膜
- Patent Title: Method for fabricating semiconductor device including a patterned multi-layered dielectric film with an exposed edge
- Patent Title (中): 一种制造半导体器件的方法，包括具有暴露边缘的图案化多层电介质膜
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Application No.: US14138153Application Date: 2013-12-23
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Publication No.: US09412851B2Publication Date: 2016-08-09
- Inventor: Yu-Chun Chang , Ping-Chia Shih , Chi-Cheng Huang , Kuo-Lung Li , Kun-I Chou , Chung-Che Huang , Chia-Cheng Hsu , Mu-Jia Liu
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L21/4763 ; H01L29/66 ; H01L27/115
Abstract:
A method for fabricating a semiconductor device includes forming a patterned multi-layered dielectric film on a substrate; forming a patterned stack on the patterned multi-layered dielectric film so that an edge of the patterned multi-layered dielectric film is exposed from the patterned stack; forming a cover layer to cover a part of the substrate and expose the patterned stack and the exposed edge of the patterned multi-layered dielectric film; removing at least a part of the exposed edge of the patterned multi-layered dielectric film by using the cover layer and the patterned stack as an etching mask; and performing an ion implantation process by using the cover layer as an etching mask so as to form a doped region.
Public/Granted literature
- US20150179748A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE Public/Granted day:2015-06-25
Information query
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