Invention Grant
- Patent Title: Method of patterning a feature of a semiconductor device
- Patent Title (中): 图案化半导体器件的特征的方法
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Application No.: US13959524Application Date: 2013-08-05
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Publication No.: US09054159B2Publication Date: 2015-06-09
- Inventor: Yen-Chun Huang , Ming-Feng Shieh , Ken-Hsien Hsieh , Chih-Ming Lai , Ru-Gun Liu , Tsai-Sheng Gau
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boones, LLP
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/768

Abstract:
A method including forming a first pattern having a first and second feature is described. A masking layer is formed over the first and second features. An opening is patterned in the masking layer. The opening can extend over at least one of the first and second features. The patterned opening is then used to form a third feature (filled trench) between the first and second features. A second pattern is then formed that includes a fourth feature and fifth feature each having an edge defined by the third feature. The first, second, fourth and fifth features may then be used to pattern an underlying layer over the semiconductor substrate.
Public/Granted literature
- US20140273446A1 Method of Patterning a Feature of a Semiconductor Device Public/Granted day:2014-09-18
Information query
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