A power factor correction circuit steps up and power-factor-corrects a rectified voltage, which has been rectified from an AC input voltage of an AC power source Vin, through an ON/OFF operation of a switching element Q1 and supplies a stepped-up output voltage to a DC-DC converter that is driven with a first pulse signal. The power factor correction circuit includes a delay circuit to receive the first pulse signal whose pulse width corresponds to an output voltage of the DC-DC converter, generate, in response to an ON pulse of the first pulse signal, a delay pulse signal whose pulse width corresponds to the rectified voltage, and synthesize the first pulse signal and the delay pulse signal into a second pulse signal. The power factor correction circuit also includes a driver to drive the switching element according to the second pulse signal.